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Commit dccfd1e4 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC DT updates from Olof Johansson:
 "Device tree and bindings updates for 3.12.

  General additions of various on-chip and on-board peripherals on
  various platforms as support gets added.  Some of the bigger changes
  are:

   - Addition of (new) PCI-e support on Tegra.
   - More Tegra4 support, including PMC configuration for Dalmore.
   - Addition of a new board for Exynos4 (trats2) and more bindings for
     4x12 IP.
   - Addition of Allwinner A20 and A31 SoC and board files.
   - Move of the ST Ericsson device tree files to now use ste-* prefix.
   - More move of hardware description of shmobile platforms to DT.
   - Two new board dts files for Freescale MXs"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (177 commits)
  dts: Rename DW APB timer compatible strings
  dts: Deprecate ALTR as a vendor prefix
  of: add vendor prefix for Altera Corp.
  ARM: at91/dt: sam9x5ek: add sound configuration
  ARM: at91/dt: sam9x5ek: enable SSC
  ARM: at91/dt: sam9x5ek: add WM8731 codec
  ARM: at91/dt: sam9x5: add SSC DMA parameters
  ARM: at91/dt: add at91rm9200 PQFP package version
  ARM: at91: at91rm9200: set default mmc0 pinctrl-names
  ARM: at91: at91sam9n12: correct pin number of gpio-key
  ARM: at91: at91sam9n12: add qt1070 support
  ARM: at91: at91sam9n12: add pinctrl of TWI
  ARM: at91: Add PMU support for sama5d3
  ARM: at91: at91sam9260: add missing pinctrl-names on mmc
  ARM: tegra: configure power off for Dalmore
  ARM: DT: binding fixup to align with vendor-prefixes.txt (DT)
  ARM: dts: add sdio blocks to bcm28155-ap board
  ARM: dts: align sdio numbers to HW definition
  ARM: sun7i: Add Olimex A20-Olinuxino-Micro support
  ARM: sun7i: Add Allwinner A20 DTSI
  ...
parents 8e73e367 56e9e0f3
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Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
View file @ dccfd1e4
......@@ -6,4 +6,5 @@ bcm11351, bcm28145, bcm28155 SoCs) shall have the following properties:
Required root node property:
compatible = "bcm,bcm11351";
compatible = "brcm,bcm11351";
DEPRECATED: compatible = "bcm,bcm11351";
Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt → Documentation/devicetree/bindings/arm/bcm/kona-timer.txt
View file @ dccfd1e4
......@@ -4,14 +4,15 @@ This timer is used in the following Broadcom SoCs:
BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
Required properties:
- compatible : "bcm,kona-timer"
- compatible : "brcm,kona-timer"
- DEPRECATED: compatible : "bcm,kona-timer"
- reg : Register range for the timer
- interrupts : interrupt for the timer
- clock-frequency: frequency that the clock operates
Example:
timer@35006000 {
compatible = "bcm,kona-timer";
compatible = "brcm,kona-timer";
reg = <0x35006000 0x1000>;
interrupts = <0x0 7 0x4>;
clock-frequency = <32768>;
......
Documentation/devicetree/bindings/arm/bcm/kona-wdt.txt 0 → 100644
View file @ dccfd1e4
Broadcom Kona Family Watchdog Timer
-----------------------------------
This watchdog timer is used in the following Broadcom SoCs:
BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
Required properties:
- compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
- reg: memory address & range
Example:
watchdog@35002f40 {
compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
reg = <0x35002f40 0x6c>;
};
Documentation/devicetree/bindings/media/s5p-mfc.txt
View file @ dccfd1e4
......@@ -16,9 +16,9 @@ Required properties:
mapped region.
- interrupts : MFC interrupt number to the CPU.
- clocks : from common clock binding: handle to mfc clocks.
- clock-names : from common clock binding: must contain "sclk_mfc" and "mfc",
corresponding to entries in the clocks property.
- clocks : from common clock binding: handle to mfc clock.
- clock-names : from common clock binding: must contain "mfc",
corresponding to entry in the clocks property.
- samsung,mfc-r : Base address of the first memory bank used by MFC
for DMA contiguous memory allocation and its size.
......@@ -38,8 +38,8 @@ mfc: codec@13400000 {
reg = <0x13400000 0x10000>;
interrupts = <0 94 0>;
samsung,power-domain = <&pd_mfc>;
clocks = <&clock 170>, <&clock 273>;
clock-names = "sclk_mfc", "mfc";
clocks = <&clock 273>;
clock-names = "mfc";
};
Board specific DT entry:
......
Documentation/devicetree/bindings/misc/smc.txt
View file @ dccfd1e4
......@@ -4,11 +4,12 @@ This binding defines the location of the bounce buffer
used for non-secure to secure communications.
Required properties:
- compatible : "bcm,kona-smc"
- compatible : "brcm,kona-smc"
- DEPRECATED: compatible : "bcm,kona-smc"
- reg : Location and size of bounce buffer
Example:
smc@0x3404c000 {
compatible = "bcm,bcm11351-smc", "bcm,kona-smc";
compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
reg = <0x3404c000 0x400>; //1 KiB in SRAM
};
Documentation/devicetree/bindings/mmc/bcm,kona-sdhci.txt → Documentation/devicetree/bindings/mmc/kona-sdhci.txt
View file @ dccfd1e4
......@@ -4,12 +4,13 @@ This file documents differences between the core properties in mmc.txt
and the properties present in the bcm281xx SDHCI
Required properties:
- compatible : Should be "bcm,kona-sdhci"
- compatible : Should be "brcm,kona-sdhci"
- DEPRECATED: compatible : Should be "bcm,kona-sdhci"
Example:
sdio2: sdio@0x3f1a0000 {
compatible = "bcm,kona-sdhci";
compatible = "brcm,kona-sdhci";
reg = <0x3f1a0000 0x10000>;
interrupts = <0x0 74 0x4>;
};
......
Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt
View file @ dccfd1e4
......@@ -80,6 +80,17 @@ Valid values for pin and group names are:
dbg, sdio3, spi, uaa, uab, uart2, uart3, sdio1, ddc, gma, gme, gmf, gmg,
gmh, owr, uda.
Valid values for nvidia,functions are:
blink, cec, cldvfs, clk12, cpu, dap, dap1, dap2, dev3, displaya,
displaya_alt, displayb, dtv, emc_dll, extperiph1, extperiph2,
extperiph3, gmi, gmi_alt, hda, hsi, i2c1, i2c2, i2c3, i2c4, i2cpwr,
i2s0, i2s1, i2s2, i2s3, i2s4, irda, kbc, nand, nand_alt, owr, pmi,
pwm0, pwm1, pwm2, pwm3, pwron, reset_out_n, rsvd1, rsvd2, rsvd3,
rsvd4, sdmmc1, sdmmc2, sdmmc3, sdmmc4, soc, spdif, spi1, spi2, spi3,
spi4, spi5, spi6, sysclk, trace, uarta, uartb, uartc, uartd, ulpi,
usb, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6, vi, vi_alt1, vi_alt3
Example:
pinmux: pinmux {
......
Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt
View file @ dccfd1e4
......@@ -103,6 +103,17 @@ Valid values for pin and group names are:
drive_gma, drive_gmb, drive_gmc, drive_gmd, drive_gme, drive_owr,
drive_uda.
Valid values for nvidia,functions are:
ahb_clk, apb_clk, audio_sync, crt, dap1, dap2, dap3, dap4, dap5,
displaya, displayb, emc_test0_dll, emc_test1_dll, gmi, gmi_int,
hdmi, i2cp, i2c1, i2c2, i2c3, ide, irda, kbc, mio, mipi_hs, nand,
osc, owr, pcie, plla_out, pllc_out1, pllm_out1, pllp_out2, pllp_out3,
pllp_out4, pwm, pwr_intr, pwr_on, rsvd1, rsvd2, rsvd3, rsvd4, rtck,
sdio1, sdio2, sdio3, sdio4, sflash, spdif, spi1, spi2, spi2_alt,
spi3, spi4, trace, twc, uarta, uartb, uartc, uartd, uarte, ulpi,
vi, vi_sensor_clk, xio
Example:
pinctrl@70000000 {
......
Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt
View file @ dccfd1e4
......@@ -91,6 +91,18 @@ Valid values for pin and group names are:
gmh, gpv, lcd1, lcd2, owr, sdio1, sdio2, sdio3, spi, uaa, uab, uart2,
uart3, uda, vi1.
Valid values for nvidia,functions are:
blink, cec, clk_12m_out, clk_32k_in, core_pwr_req, cpu_pwr_req, crt,
dap, ddr, dev3, displaya, displayb, dtv, extperiph1, extperiph2,
extperiph3, gmi, gmi_alt, hda, hdcp, hdmi, hsi, i2c1, i2c2, i2c3,
i2c4, i2cpwr, i2s0, i2s1, i2s2, i2s3, i2s4, invalid, kbc, mio, nand,
nand_alt, owr, pcie, pwm0, pwm1, pwm2, pwm3, pwr_int_n, rsvd1, rsvd2,
rsvd3, rsvd4, rtck, sata, sdmmc1, sdmmc2, sdmmc3, sdmmc4, spdif, spi1,
spi2, spi2_alt, spi3, spi4, spi5, spi6, sysclk, test, trace, uarta,
uartb, uartc, uartd, uarte, ulpi, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6,
vi, vi_alt1, vi_alt2, vi_alt3
Example:
pinctrl@70000000 {
......
Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt
View file @ dccfd1e4
ST Ericsson Nomadik pinmux controller
Required properties:
- compatible: "stericsson,nmk-pinctrl", "stericsson,nmk-pinctrl-db8540",
"stericsson,nmk-pinctrl-stn8815"
- compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
"stericsson,stn8815-pinctrl"
- reg: Should contain the register physical address and length of the PRCMU.
Please refer to pinctrl-bindings.txt in this directory for details of the
......@@ -68,7 +68,7 @@ Optional subnode-properties:
Example board file extract:
pinctrl@80157000 {
compatible = "stericsson,nmk-pinctrl";
compatible = "stericsson,db8500-pinctrl";
reg = <0x80157000 0x2000>;
pinctrl-names = "default";
......
Documentation/devicetree/bindings/rtc/dw-apb.txt
View file @ dccfd1e4
* Designware APB timer
Required properties:
- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
- compatible: One of:
"snps,dw-apb-timer"
"snps,dw-apb-timer-sp" <DEPRECATED>
"snps,dw-apb-timer-osc" <DEPRECATED>
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: IRQ line for the timer.
......@@ -20,23 +23,8 @@ systems may use one.
Example:
timer1: timer@ffc09000 {
compatible = "snps,dw-apb-timer-sp";
interrupts = <0 168 4>;
clock-frequency = <200000000>;
reg = <0xffc09000 0x1000>;
};
timer2: timer@ffd00000 {
compatible = "snps,dw-apb-timer-osc";
interrupts = <0 169 4>;
clock-frequency = <200000000>;
reg = <0xffd00000 0x1000>;
};
timer3: timer@ffe00000 {
compatible = "snps,dw-apb-timer-osc";
timer@ffe00000 {
compatible = "snps,dw-apb-timer";
interrupts = <0 170 4>;
reg = <0xffe00000 0x1000>;
clocks = <&timer_clk>, <&timer_pclk>;
......
Documentation/devicetree/bindings/serial/altera_jtaguart.txt
View file @ dccfd1e4
Altera JTAG UART
Required properties:
- compatible : should be "ALTR,juart-1.0"
- compatible : should be "ALTR,juart-1.0" <DEPRECATED>
- compatible : should be "altr,juart-1.0"
Documentation/devicetree/bindings/serial/altera_uart.txt
View file @ dccfd1e4
Altera UART
Required properties:
- compatible : should be "ALTR,uart-1.0"
- compatible : should be "ALTR,uart-1.0" <DEPRECATED>
- compatible : should be "altr,uart-1.0"
Optional properties:
- clock-frequency : frequency of the clock input to the UART
Documentation/devicetree/bindings/serio/altera_ps2.txt
View file @ dccfd1e4
Altera UP PS/2 controller
Required properties:
- compatible : should be "ALTR,ps2-1.0".
- compatible : should be "ALTR,ps2-1.0". <DEPRECATED>
- compatible : should be "altr,ps2-1.0".
Documentation/devicetree/bindings/spi/spi_altera.txt
View file @ dccfd1e4
Altera SPI
Required properties:
- compatible : should be "ALTR,spi-1.0".
- compatible : should be "ALTR,spi-1.0". <DEPRECATED>
- compatible : should be "altr,spi-1.0".
Documentation/devicetree/bindings/vendor-prefixes.txt
View file @ dccfd1e4
......@@ -7,6 +7,7 @@ ad Avionic Design GmbH
adi Analog Devices, Inc.
aeroflexgaisler Aeroflex Gaisler AB
ak Asahi Kasei Corp.
altr Altera Corp.
amcc Applied Micro Circuits Corporation (APM, formally AMCC)
apm Applied Micro Circuits Corporation (APM)
arm ARM Ltd.
......
arch/arm/Makefile
View file @ dccfd1e4
......@@ -190,6 +190,7 @@ machine-$(CONFIG_ARCH_S5PV210) += s5pv210
machine-$(CONFIG_ARCH_SA1100) += sa1100
machine-$(CONFIG_ARCH_SHARK) += shark
machine-$(CONFIG_ARCH_SHMOBILE) += shmobile
machine-$(CONFIG_ARCH_SHMOBILE_MULTI) += shmobile
machine-$(CONFIG_ARCH_SIRF) += prima2
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_ARCH_STI) += sti
......
arch/arm/boot/dts/Makefile
View file @ dccfd1e4
......@@ -42,7 +42,8 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \
bcm28155-ap.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
da850-evm.dtb
dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
......@@ -53,13 +54,14 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos4210-trats.dtb \
exynos4210-universal_c210.dtb \
exynos4412-odroidx.dtb \
exynos4412-smdk4412.dtb \
exynos4412-origen.dtb \
exynos4412-smdk4412.dtb \
exynos4412-trats2.dtb \
exynos5250-arndale.dtb \
exynos5440-sd5v1.dtb \
exynos5250-smdk5250.dtb \
exynos5250-snow.dtb \
exynos5420-smdk5420.dtb \
exynos5440-sd5v1.dtb \
exynos5440-ssdk5440.dtb
dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
ecx-2000.dtb
......@@ -143,7 +145,9 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
imx28-cfa10037.dtb \
imx28-cfa10049.dtb \
imx28-cfa10055.dtb \
imx28-cfa10056.dtb \
imx28-cfa10057.dtb \
imx28-cfa10058.dtb \
imx28-evk.dtb \
imx28-m28evk.dtb \
imx28-sps1.dtb \
......@@ -176,13 +180,14 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am43x-epos-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
hrefprev60.dtb \
hrefv60plus.dtb \
ccu8540.dtb \
ccu9540.dtb
dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
ste-hrefprev60.dtb \
ste-hrefv60plus.dtb \
ste-ccu8540.dtb \
ste-ccu9540.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
emev2-kzm9d-reference.dtb \
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
r8a7740-armadillo800eva-reference.dtb \
......@@ -192,6 +197,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
sh73a0-kzm9g-reference.dtb \
r8a73a4-ape6evm.dtb \
sh7372-mackerel.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
socfpga_vt.dtb
dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
......@@ -206,11 +212,14 @@ dtb-$(CONFIG_ARCH_STI)+= stih415-b2000.dtb \
stih415-b2020.dtb \
stih416-b2020.dtb
dtb-$(CONFIG_ARCH_SUNXI) += \
sun4i-a10-a1000.dtb \
sun4i-a10-cubieboard.dtb \
sun4i-a10-mini-xplus.dtb \
sun4i-a10-hackberry.dtb \
sun5i-a10s-olinuxino-micro.dtb \
sun5i-a13-olinuxino.dtb
sun5i-a13-olinuxino.dtb \
sun6i-a31-colombus.dtb \
sun7i-a20-olinuxino-micro.dtb
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-iris-512.dtb \
tegra20-medcom-wide.dtb \
......@@ -224,8 +233,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra30-beaver.dtb \
tegra30-cardhu-a02.dtb \
tegra30-cardhu-a04.dtb \
tegra114-dalmore.dtb \
tegra114-pluto.dtb
tegra114-dalmore.dtb
dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
versatile-pb.dtb
dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
......
arch/arm/boot/dts/at91rm9200.dtsi
View file @ dccfd1e4
......@@ -120,6 +120,7 @@ mmc0: mmc@fffb4000 {
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
status = "disabled";
};
......
arch/arm/boot/dts/at91rm9200_pqfp.dtsi 0 → 100644
View file @ dccfd1e4
/*
* at91rm9200_pqfp.dtsi - Device Tree Include file for AT91RM9200 PQFP family SoC
*
* Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 or later.
*/
#include "at91rm9200.dtsi"
/ {
compatible = "atmel,at91rm9200-pqfp", "atmel,at91rm9200";
};
&pioD {
status = "disabled";
};
arch/arm/boot/dts/at91sam9260.dtsi
View file @ dccfd1e4
......@@ -572,6 +572,7 @@ mmc0: mmc@fffa8000 {
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
status = "disabled";
};
......
arch/arm/boot/dts/at91sam9n12.dtsi
View file @ dccfd1e4
......@@ -291,6 +291,22 @@ AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
};
};
i2c0 {
pinctrl_i2c0: i2c0-0 {
atmel,pins =
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
i2c1 {
pinctrl_i2c1: i2c1-0 {
atmel,pins =
<AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
};
};
tcb0 {
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
......@@ -471,6 +487,8 @@ i2c0: i2c@f8010000 {
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>;
status = "disabled";
};
......@@ -483,6 +501,8 @@ i2c1: i2c@f8014000 {
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "disabled";
};
......
arch/arm/boot/dts/at91sam9n12ek.dts
View file @ dccfd1e4
......@@ -40,6 +40,15 @@ dbgu: serial@fffff200 {
i2c0: i2c@f8010000 {
status = "okay";
qt1070: keyboard@1b {
compatible = "qt1070";
reg = <0x1b>;
interrupt-parent = <&pioA>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qt1070_irq>;
};
};
i2c1: i2c@f8014000 {
......@@ -66,6 +75,13 @@ pinctrl_board_mmc0: mmc0-board {
<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PA7 gpio CD pin pull up and deglitch */
};
};
qt1070 {
pinctrl_qt1070_irq: qt1070_irq {
atmel,pins =
<AT91_PIOA 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
};
};
spi0: spi@f0000000 {
......@@ -121,7 +137,7 @@ gpio_keys {
enter {
label = "Enter";
gpios = <&pioB 4 GPIO_ACTIVE_LOW>;
gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
};
......
arch/arm/boot/dts/at91sam9x5.dtsi
View file @ dccfd1e4
......@@ -542,6 +542,9 @@ ssc0: ssc@f0010000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf0010000 0x4000>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
<&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
......
arch/arm/boot/dts/at91sam9x5ek.dtsi
View file @ dccfd1e4
......@@ -59,6 +59,11 @@ usb2: gadget@f803c000 {
i2c0: i2c@f8010000 {
status = "okay";
wm8731: wm8731@1a {
compatible = "wm8731";
reg = <0x1a>;
};
};
pinctrl@fffff400 {
......@@ -90,6 +95,10 @@ m25p80@0 {
watchdog@fffffe40 {
status = "okay";
};
ssc0: ssc@f0010000 {
status = "okay";
};
};
usb0: ohci@00600000 {
......@@ -105,4 +114,19 @@ usb1: ehci@00700000 {
status = "okay";
};
};
sound {
compatible = "atmel,sam9x5-wm8731-audio";
atmel,model = "wm8731 @ AT91SAM9X5EK";
atmel,audio-routing =
"Headphone Jack", "RHPOUT",
"Headphone Jack", "LHPOUT",
"LLINEIN", "Line In Jack",
"RLINEIN", "Line In Jack";
atmel,ssc-controller = <&ssc0>;
atmel,audio-codec = <&wm8731>;
};
};
arch/arm/boot/dts/bcm11351-brt.dts
View file @ dccfd1e4
......@@ -17,7 +17,7 @@
/ {
model = "BCM11351 BRT board";
compatible = "bcm,bcm11351-brt", "bcm,bcm11351";
compatible = "brcm,bcm11351-brt", "brcm,bcm11351";
memory {
reg = <0x80000000 0x40000000>; /* 1 GB */
......@@ -27,18 +27,18 @@ uart@3e000000 {
status = "okay";
};
sdio0: sdio@0x3f180000 {
sdio1: sdio@3f180000 {
max-frequency = <48000000>;
status = "okay";
};
sdio1: sdio@0x3f190000 {
sdio2: sdio@3f190000 {
non-removable;
max-frequency = <48000000>;
status = "okay";
};
sdio3: sdio@0x3f1b0000 {
sdio4: sdio@3f1b0000 {
max-frequency = <48000000>;
status = "okay";
};
......
arch/arm/boot/dts/bcm11351.dtsi
View file @ dccfd1e4
/*
* Copyright (C) 2012 Broadcom Corporation
* Copyright (C) 2012-2013 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
......@@ -18,7 +18,7 @@
/ {
model = "BCM11351 SoC";
compatible = "bcm,bcm11351";
compatible = "brcm,bcm11351";
interrupt-parent = <&gic>;
chosen {
......@@ -35,12 +35,12 @@ gic: interrupt-controller@3ff00100 {
};
smc@0x3404c000 {
compatible = "bcm,bcm11351-smc", "bcm,kona-smc";
compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
};
uart@3e000000 {
compatible = "bcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e000000 0x1000>;
clock-frequency = <13000000>;
......@@ -50,42 +50,47 @@ uart@3e000000 {
};
L2: l2-cache {
compatible = "bcm,bcm11351-a2-pl310-cache";
compatible = "brcm,bcm11351-a2-pl310-cache";
reg = <0x3ff20000 0x1000>;
cache-unified;
cache-level = <2>;
};
watchdog@35002f40 {
compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
reg = <0x35002f40 0x6c>;
};
timer@35006000 {
compatible = "bcm,kona-timer";
compatible = "brcm,kona-timer";
reg = <0x35006000 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <32768>;
};
sdio0: sdio@0x3f180000 {
compatible = "bcm,kona-sdhci";
sdio1: sdio@3f180000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f180000 0x10000>;
interrupts = <0x0 77 0x4>;
status = "disabled";
};
sdio1: sdio@0x3f190000 {
compatible = "bcm,kona-sdhci";
sdio2: sdio@3f190000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f190000 0x10000>;
interrupts = <0x0 76 0x4>;
status = "disabled";
};
sdio2: sdio@0x3f1a0000 {
compatible = "bcm,kona-sdhci";
sdio3: sdio@3f1a0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1a0000 0x10000>;
interrupts = <0x0 74 0x4>;
status = "disabled";
};
sdio3: sdio@0x3f1b0000 {
compatible = "bcm,kona-sdhci";
sdio4: sdio@3f1b0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1b0000 0x10000>;
interrupts = <0x0 73 0x4>;
status = "disabled";
......
arch/arm/boot/dts/bcm28155-ap.dts 0 → 100644
View file @ dccfd1e4
/*
* Copyright (C) 2013 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "bcm11351.dtsi"
/ {
model = "BCM28155 AP board";
compatible = "brcm,bcm28155-ap", "brcm,bcm11351";
memory {
reg = <0x80000000 0x40000000>; /* 1 GB */
};
uart@3e000000 {
status = "okay";
};
sdio1: sdio@3f180000 {
max-frequency = <48000000>;
status = "okay";
};
sdio2: sdio@3f190000 {
non-removable;
max-frequency = <48000000>;
status = "okay";
};
sdio4: sdio@3f1b0000 {
max-frequency = <48000000>;
status = "okay";
};
};
arch/arm/boot/dts/emev2-kzm9d-reference.dts 0 → 100644
View file @ dccfd1e4
/*
* Device Tree Source for the KZM9D board
*
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
/include/ "emev2.dtsi"
/ {
model = "EMEV2 KZM9D Board";
compatible = "renesas,kzm9d-reference", "renesas,emev2";
memory {
device_type = "memory";
reg = <0x40000000 0x8000000>;
};
chosen {
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
};
reg_1p8v: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_3p3v: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
lan9220@20000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x20000000 0x10000>;
phy-mode = "mii";
interrupt-parent = <&gpio0>;
interrupts = <1 1>; /* active high */
reg-io-width = <4>;
smsc,irq-active-high;
smsc,irq-push-pull;
vddvario-supply = <&reg_1p8v>;
vdd33a-supply = <&reg_3p3v>;
};
};
arch/arm/boot/dts/emev2-kzm9d.dts
View file @ dccfd1e4
......@@ -21,6 +21,6 @@ memory {
};
chosen {
bootargs = "console=tty0 console=ttyS1,115200n81 earlyprintk=serial8250-em.1,115200n81 mem=128M@0x40000000 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
};
};
arch/arm/boot/dts/emev2.dtsi
View file @ dccfd1e4
......@@ -14,6 +14,14 @@ / {
compatible = "renesas,emev2";
interrupt-parent = <&gic>;
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
......@@ -67,4 +75,55 @@ uart@e1050000 {
reg = <0xe1050000 0x38>;
interrupts = <0 11 0>;
};
gpio0: gpio@e0050000 {
compatible = "renesas,em-gio";
reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
interrupts = <0 67 0>, <0 68 0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio1: gpio@e0050080 {
compatible = "renesas,em-gio";
reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
interrupts = <0 69 0>, <0 70 0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@e0050100 {
compatible = "renesas,em-gio";
reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
interrupts = <0 71 0>, <0 72 0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio3: gpio@e0050180 {
compatible = "renesas,em-gio";
reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
interrupts = <0 73 0>, <0 74 0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio4: gpio@e0050200 {
compatible = "renesas,em-gio";
reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
interrupts = <0 75 0>, <0 76 0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <31>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
arch/arm/boot/dts/exynos4.dtsi
View file @ dccfd1e4
......@@ -36,6 +36,12 @@ aliases {
i2c5 = &i2c_5;
i2c6 = &i2c_6;
i2c7 = &i2c_7;
csis0 = &csis_0;
csis1 = &csis_1;
fimc0 = &fimc_0;
fimc1 = &fimc_1;
fimc2 = &fimc_2;
fimc3 = &fimc_3;
};
chipid@10000000 {
......@@ -92,6 +98,88 @@ sys_reg: sysreg {
reg = <0x10010000 0x400>;
};
camera {
compatible = "samsung,fimc", "simple-bus";
status = "disabled";
#address-cells = <1>;
#size-cells = <1>;
ranges;
clock_cam: clock-controller {
#clock-cells = <1>;
};
fimc_0: fimc@11800000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11800000 0x1000>;
interrupts = <0 84 0>;
clocks = <&clock 256>, <&clock 128>;
clock-names = "fimc", "sclk_fimc";
samsung,power-domain = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
fimc_1: fimc@11810000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11810000 0x1000>;
interrupts = <0 85 0>;
clocks = <&clock 257>, <&clock 129>;
clock-names = "fimc", "sclk_fimc";
samsung,power-domain = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
fimc_2: fimc@11820000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11820000 0x1000>;
interrupts = <0 86 0>;
clocks = <&clock 258>, <&clock 130>;
clock-names = "fimc", "sclk_fimc";
samsung,power-domain = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
fimc_3: fimc@11830000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11830000 0x1000>;
interrupts = <0 87 0>;
clocks = <&clock 259>, <&clock 131>;
clock-names = "fimc", "sclk_fimc";
samsung,power-domain = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
csis_0: csis@11880000 {
compatible = "samsung,exynos4210-csis";
reg = <0x11880000 0x4000>;
interrupts = <0 78 0>;
clocks = <&clock 260>, <&clock 134>;
clock-names = "csis", "sclk_csis";
bus-width = <4>;
samsung,power-domain = <&pd_cam>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
csis_1: csis@11890000 {
compatible = "samsung,exynos4210-csis";
reg = <0x11890000 0x4000>;
interrupts = <0 80 0>;
clocks = <&clock 261>, <&clock 135>;
clock-names = "csis", "sclk_csis";
bus-width = <2>;
samsung,power-domain = <&pd_cam>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
watchdog@10060000 {
compatible = "samsung,s3c2410-wdt";
reg = <0x10060000 0x100>;
......@@ -155,13 +243,31 @@ sdhci@12540000 {
status = "disabled";
};
ehci@12580000 {
compatible = "samsung,exynos4210-ehci";
reg = <0x12580000 0x100>;
interrupts = <0 70 0>;
clocks = <&clock 304>;
clock-names = "usbhost";
status = "disabled";
};
ohci@12590000 {
compatible = "samsung,exynos4210-ohci";
reg = <0x12590000 0x100>;
interrupts = <0 70 0>;
clocks = <&clock 304>;
clock-names = "usbhost";
status = "disabled";
};
mfc: codec@13400000 {
compatible = "samsung,mfc-v5";
reg = <0x13400000 0x10000>;
interrupts = <0 94 0>;
samsung,power-domain = <&pd_mfc>;
clocks = <&clock 170>, <&clock 273>;
clock-names = "sclk_mfc", "mfc";
clocks = <&clock 273>;
clock-names = "mfc";
status = "disabled";
};
......@@ -297,8 +403,8 @@ spi_0: spi@13920000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13920000 0x100>;
interrupts = <0 66 0>;
tx-dma-channel = <&pdma0 7>; /* preliminary */
rx-dma-channel = <&pdma0 6>; /* preliminary */
dmas = <&pdma0 7>, <&pdma0 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 327>, <&clock 159>;
......@@ -312,8 +418,8 @@ spi_1: spi@13930000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13930000 0x100>;
interrupts = <0 67 0>;
tx-dma-channel = <&pdma1 7>; /* preliminary */
rx-dma-channel = <&pdma1 6>; /* preliminary */
dmas = <&pdma1 7>, <&pdma1 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 328>, <&clock 160>;
......@@ -327,8 +433,8 @@ spi_2: spi@13940000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13940000 0x100>;
interrupts = <0 68 0>;
tx-dma-channel = <&pdma0 9>; /* preliminary */
rx-dma-channel = <&pdma0 8>; /* preliminary */
dmas = <&pdma0 9>, <&pdma0 8>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 329>, <&clock 161>;
......
arch/arm/boot/dts/exynos4210-pinctrl.dtsi
View file @ dccfd1e4
......@@ -797,6 +797,29 @@ eint31: ext-int31 {
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
cam_port_a_io: cam-port-a-io {
samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
"gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
"gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
cam_port_a_clk_active: cam-port-a-clk-active {
samsung,pins = "gpj1-3";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
cam_port_a_clk_idle: cam-port-a-clk-idle {
samsung,pins = "gpj1-3";
samsung,pin-function = <0>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
pinctrl@03860000 {
......
arch/arm/boot/dts/exynos4210-trats.dts
View file @ dccfd1e4
......@@ -30,7 +30,10 @@ chosen {
bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
};
vemmc_reg: voltage-regulator@0 {
regulators {
compatible = "simple-bus";
vemmc_reg: regulator-0 {
compatible = "regulator-fixed";
regulator-name = "VMEM_VDD_2.8V";
regulator-min-microvolt = <2800000>;
......@@ -39,6 +42,52 @@ vemmc_reg: voltage-regulator@0 {
enable-active-high;
};
tsp_reg: regulator-1 {
compatible = "regulator-fixed";
regulator-name = "TSP_FIXED_VOLTAGES";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpl0 3 0>;
enable-active-high;
};
cam_af_28v_reg: regulator-2 {
compatible = "regulator-fixed";
regulator-name = "8M_AF_2.8V_EN";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpk1 1 0>;
enable-active-high;
};
cam_io_en_reg: regulator-3 {
compatible = "regulator-fixed";
regulator-name = "CAM_IO_EN";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpe2 1 0>;
enable-active-high;
};
cam_io_12v_reg: regulator-4 {
compatible = "regulator-fixed";
regulator-name = "8M_1.2V_EN";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&gpe2 5 0>;
enable-active-high;
};
vt_core_15v_reg: regulator-5 {
compatible = "regulator-fixed";
regulator-name = "VT_CORE_1.5V";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&gpe2 2 0>;
enable-active-high;
};
};
sdhci_emmc: sdhci@12510000 {
bus-width = <8>;
non-removable;
......@@ -97,15 +146,6 @@ ok-key {
};
};
tsp_reg: voltage-regulator {
compatible = "regulator-fixed";
regulator-name = "TSP_FIXED_VOLTAGES";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpl0 3 0>;
enable-active-high;
};
i2c@13890000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
......@@ -218,6 +258,12 @@ vpll_reg: LDO10 {
regulator-always-on;
};
vtcam_reg: LDO12 {
regulator-name = "VT_CAM_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcclcd_reg: LDO13 {
regulator-name = "VCC_3.3V_LCD";
regulator-min-microvolt = <3300000>;
......@@ -301,4 +347,26 @@ xusbxti {
clock-frequency = <24000000>;
};
};
camera {
pinctrl-names = "default";
pinctrl-0 = <>;
status = "okay";
fimc_0: fimc@11800000 {
status = "okay";
};
fimc_1: fimc@11810000 {
status = "okay";
};
fimc_2: fimc@11820000 {
status = "okay";
};
fimc_3: fimc@11830000 {
status = "okay";
};
};
};
arch/arm/boot/dts/exynos4210.dtsi
View file @ dccfd1e4
......@@ -125,4 +125,34 @@ g2d@12800000 {
clock-names = "sclk_fimg2d", "fimg2d";
status = "disabled";
};
camera {
clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
fimc_0: fimc@11800000 {
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,cam-if;
};
fimc_1: fimc@11810000 {
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,cam-if;
};
fimc_2: fimc@11820000 {
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,lcd-wb;
};
fimc_3: fimc@11830000 {
samsung,pix-limits = <1920 8192 1366 1920>;
samsung,rotators = <0>;
samsung,mainscaler-ext;
samsung,lcd-wb;
};
};
};
arch/arm/boot/dts/exynos4412-origen.dts
View file @ dccfd1e4
......@@ -27,6 +27,11 @@ chosen {
bootargs ="console=ttySAC2,115200";
};
firmware@0203F000 {
compatible = "samsung,secure-firmware";
reg = <0x0203F000 0x1000>;
};
mmc_reg: voltage-regulator {
compatible = "regulator-fixed";
regulator-name = "VMEM_VDD_2.8V";
......
arch/arm/boot/dts/exynos4412-trats2.dts 0 → 100644
View file @ dccfd1e4
This diff is collapsed.
arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
View file @ dccfd1e4
......@@ -401,13 +401,26 @@ lcd_ldi: lcd-ldi {
samsung,pin-drv = <0>;
};
cam_port_a: cam-port-a {
cam_port_a_io: cam-port-a-io {
samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
"gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
"gpj1-0", "gpj1-1", "gpj1-2", "gpj1-3",
"gpj1-4";
"gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
cam_port_a_clk_active: cam-port-a-clk-active {
samsung,pins = "gpj1-3";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
cam_port_a_clk_idle: cam-port-a-clk-idle {
samsung,pins = "gpj1-3";
samsung,pin-function = <0>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
......@@ -778,16 +791,29 @@ sd3_bus4: sd3-bus-width4 {
samsung,pin-drv = <3>;
};
cam_port_b: cam-port-b {
cam_port_b_io: cam-port-b-io {
samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
"gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
"gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1",
"gpm2-2";
"gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
cam_port_b_clk_active: cam-port-b-clk-active {
samsung,pins = "gpm2-2";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
cam_port_b_clk_idle: cam-port-b-clk-idle {
samsung,pins = "gpm2-2";
samsung,pin-function = <0>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
eint0: ext-int0 {
samsung,pins = "gpx0-0";
samsung,pin-function = <0xf>;
......@@ -822,6 +848,27 @@ eint31: ext-int31 {
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
fimc_is_i2c0: fimc-is-i2c0 {
samsung,pins = "gpm4-0", "gpm4-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
fimc_is_i2c1: fimc-is-i2c1 {
samsung,pins = "gpm4-2", "gpm4-3";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
fimc_is_uart: fimc-is-uart {
samsung,pins = "gpm3-5", "gpm3-7";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
};
pinctrl@03860000 {
......
arch/arm/boot/dts/exynos4x12.dtsi
View file @ dccfd1e4
......@@ -26,6 +26,13 @@ aliases {
pinctrl1 = &pinctrl_1;
pinctrl2 = &pinctrl_2;
pinctrl3 = &pinctrl_3;
fimc-lite0 = &fimc_lite_0;
fimc-lite1 = &fimc_lite_1;
};
pd_isp: isp-power-domain@10023CA0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
};
clock: clock-controller@10030000 {
......@@ -73,4 +80,100 @@ g2d@10800000 {
clock-names = "sclk_fimg2d", "fimg2d";
status = "disabled";
};
camera {
clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
fimc_0: fimc@11800000 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,cam-if;
};
fimc_1: fimc@11810000 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,cam-if;
};
fimc_2: fimc@11820000 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,lcd-wb;
samsung,cam-if;
};
fimc_3: fimc@11830000 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <1920 8192 1366 1920>;
samsung,rotators = <0>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,lcd-wb;
};
fimc_lite_0: fimc-lite@12390000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x12390000 0x1000>;
interrupts = <0 105 0>;
samsung,power-domain = <&pd_isp>;
clocks = <&clock 353>;
clock-names = "flite";
status = "disabled";
};
fimc_lite_1: fimc-lite@123A0000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x123A0000 0x1000>;
interrupts = <0 106 0>;
samsung,power-domain = <&pd_isp>;
clocks = <&clock 354>;
clock-names = "flite";
status = "disabled";
};
fimc_is: fimc-is@12000000 {
compatible = "samsung,exynos4212-fimc-is", "simple-bus";
reg = <0x12000000 0x260000>;
interrupts = <0 90 0>, <0 95 0>;
samsung,power-domain = <&pd_isp>;
clocks = <&clock 353>, <&clock 354>, <&clock 355>,
<&clock 356>, <&clock 17>, <&clock 357>,
<&clock 358>, <&clock 359>, <&clock 360>,
<&clock 450>,<&clock 451>, <&clock 452>,
<&clock 453>, <&clock 176>, <&clock 13>,
<&clock 454>, <&clock 395>, <&clock 455>;
clock-names = "lite0", "lite1", "ppmuispx",
"ppmuispmx", "mpll", "isp",
"drc", "fd", "mcuisp",
"ispdiv0", "ispdiv1", "mcuispdiv0",
"mcuispdiv1", "uart", "aclk200",
"div_aclk200", "aclk400mcuisp",
"div_aclk400mcuisp";
#address-cells = <1>;
#size-cells = <1>;
ranges;
status = "disabled";
pmu {
reg = <0x10020000 0x3000>;
};
i2c1_isp: i2c-isp@12140000 {
compatible = "samsung,exynos4212-i2c-isp";
reg = <0x12140000 0x100>;
clocks = <&clock 370>;
clock-names = "i2c_isp";
#address-cells = <1>;
#size-cells = <0>;
};
};
};
};
arch/arm/boot/dts/exynos5.dtsi
View file @ dccfd1e4
......@@ -108,4 +108,23 @@ watchdog {
interrupts = <0 42 0>;
status = "disabled";
};
fimd@14400000 {
compatible = "samsung,exynos5250-fimd";
interrupt-parent = <&combiner>;
reg = <0x14400000 0x40000>;
interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = <18 4>, <18 5>, <18 6>;
status = "disabled";
};
dp-controller@145B0000 {
compatible = "samsung,exynos5-dp";
reg = <0x145B0000 0x1000>;
interrupts = <10 3>;
interrupt-parent = <&combiner>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
arch/arm/boot/dts/exynos5250-arndale.dts
View file @ dccfd1e4
......@@ -11,6 +11,7 @@
/dts-v1/;
#include "exynos5250.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Insignal Arndale evaluation board based on EXYNOS5250";
......@@ -37,6 +38,28 @@ i2c@12C60000 {
s5m8767_pmic@66 {
compatible = "samsung,s5m8767-pmic";
reg = <0x66>;
interrupt-parent = <&gpx3>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
vinb1-supply = <&main_dc_reg>;
vinb2-supply = <&main_dc_reg>;
vinb3-supply = <&main_dc_reg>;
vinb4-supply = <&main_dc_reg>;
vinb5-supply = <&main_dc_reg>;
vinb6-supply = <&main_dc_reg>;
vinb7-supply = <&main_dc_reg>;
vinb8-supply = <&main_dc_reg>;
vinb9-supply = <&main_dc_reg>;
vinl1-supply = <&buck7_reg>;
vinl2-supply = <&buck7_reg>;
vinl3-supply = <&buck7_reg>;
vinl4-supply = <&main_dc_reg>;
vinl5-supply = <&main_dc_reg>;
vinl6-supply = <&main_dc_reg>;
vinl7-supply = <&main_dc_reg>;
vinl8-supply = <&buck8_reg>;
vinl9-supply = <&buck8_reg>;
s5m8767,pmic-buck2-dvs-voltage = <1300000>;
s5m8767,pmic-buck3-dvs-voltage = <1100000>;
......@@ -276,6 +299,16 @@ buck5_reg: BUCK5 {
op_mode = <1>;
};
buck7_reg: BUCK7 {
regulator-name = "PVDD_BUCK7";
regulator-always-on;
};
buck8_reg: BUCK8 {
regulator-name = "PVDD_BUCK8";
regulator-always-on;
};
buck9_reg: BUCK9 {
regulator-name = "VDD_33_OFF_EXT1";
regulator-min-microvolt = <750000>;
......@@ -295,7 +328,22 @@ i2c@12C80000 {
};
i2c@12C90000 {
status = "disabled";
wm1811a@1a {
compatible = "wlf,wm1811";
reg = <0x1a>;
AVDD2-supply = <&main_dc_reg>;
CPVDD-supply = <&main_dc_reg>;
DBVDD1-supply = <&main_dc_reg>;
DBVDD2-supply = <&main_dc_reg>;
DBVDD3-supply = <&main_dc_reg>;
LDO1VDD-supply = <&main_dc_reg>;
SPKVDD1-supply = <&main_dc_reg>;
SPKVDD2-supply = <&main_dc_reg>;
wlf,ldo1ena = <&gpb0 0 0>;
wlf,ldo2ena = <&gpb0 1 0>;
};
};
i2c@12CA0000 {
......@@ -429,6 +477,16 @@ hdmi {
vdd-supply = <&ldo8_reg>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
main_dc_reg: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "MAIN_DC";
};
mmc_reg: voltage-regulator {
compatible = "regulator-fixed";
regulator-name = "VDD_33ON_2.8V";
......@@ -442,6 +500,7 @@ reg_hdmi_en: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "hdmi-en";
};
};
fixed-rate-clocks {
xxti {
......@@ -450,16 +509,18 @@ xxti {
};
};
dp-controller {
dp-controller@145B0000 {
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <4>;
status = "okay";
};
fimd: fimd@14400000 {
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing@0 {
......@@ -480,4 +541,22 @@ timing0: timing@0 {
rtc {
status = "okay";
};
usb_hub_bus {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
// SMSC USB3503 connected in hardware only mode as a PHY
usb_hub: usb_hub {
compatible = "smsc,usb3503a";
reset-gpios = <&gpx3 5 1>;
connect-gpios = <&gpd1 7 1>;
};
};
usb@12110000 {
usb-phy = <&usb2_phy>;
};
};
arch/arm/boot/dts/exynos5250-smdk5250.dts
View file @ dccfd1e4
......@@ -250,7 +250,7 @@ usb@12110000 {
samsung,vbus-gpio = <&gpx2 6 0>;
};
dp-controller {
dp-controller@145B0000 {
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
......@@ -260,8 +260,11 @@ dp-controller {
pinctrl-names = "default";
pinctrl-0 = <&dp_hpd>;
status = "okay";
};
fimd@14400000 {
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing@0 {
......@@ -277,6 +280,7 @@ timing0: timing@0 {
vsync-len = <4>;
};
};
};
fixed-rate-clocks {
xxti {
......
arch/arm/boot/dts/exynos5250.dtsi
View file @ dccfd1e4
......@@ -163,11 +163,21 @@ watchdog {
clock-names = "watchdog";
};
g2d@10850000 {
compatible = "samsung,exynos5250-g2d";
reg = <0x10850000 0x1000>;
interrupts = <0 91 0>;
clocks = <&clock 345>;
clock-names = "fimg2d";
};
codec@11000000 {
compatible = "samsung,mfc-v6";
reg = <0x11000000 0x10000>;
interrupts = <0 96 0>;
samsung,power-domain = <&pd_mfc>;
clocks = <&clock 266>;
clock-names = "mfc";
};
rtc {
......@@ -611,28 +621,20 @@ mixer {
interrupts = <0 94 0>;
};
dp-controller {
compatible = "samsung,exynos5-dp";
reg = <0x145b0000 0x1000>;
interrupts = <10 3>;
interrupt-parent = <&combiner>;
dp_phy: video-phy@10040720 {
compatible = "samsung,exynos5250-dp-video-phy";
reg = <0x10040720 4>;
#phy-cells = <0>;
};
dp-controller@145B0000 {
clocks = <&clock 342>;
clock-names = "dp";
#address-cells = <1>;
#size-cells = <0>;
dptx-phy {
reg = <0x10040720>;
samsung,enable-mask = <1>;
};
phys = <&dp_phy>;
phy-names = "dp";
};
fimd {
compatible = "samsung,exynos5250-fimd";
interrupt-parent = <&combiner>;
reg = <0x14400000 0x40000>;
interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = <18 4>, <18 5>, <18 6>;
fimd@14400000 {
clocks = <&clock 133>, <&clock 339>;
clock-names = "sclk_fimd", "fimd";
};
......
arch/arm/boot/dts/exynos5420-pinctrl.dtsi
View file @ dccfd1e4
......@@ -59,6 +59,13 @@ gpx3: gpx3 {
interrupt-controller;
#interrupt-cells = <2>;
};
dp_hpd: dp_hpd {
samsung,pins = "gpx0-7";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samaung,pin-drv = <0>;
};
};
pinctrl@13410000 {
......
arch/arm/boot/dts/exynos5420-smdk5420.dts
View file @ dccfd1e4
......@@ -30,4 +30,35 @@ oscclk {
clock-frequency = <24000000>;
};
};
dp-controller@145B0000 {
pinctrl-names = "default";
pinctrl-0 = <&dp_hpd>;
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <4>;
status = "okay";
};
fimd@14400000 {
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing@0 {
clock-frequency = <50000>;
hactive = <2560>;
vactive = <1600>;
hfront-porch = <48>;
hback-porch = <80>;
hsync-len = <32>;
vback-porch = <16>;
vfront-porch = <8>;
vsync-len = <6>;
};
};
};
};
arch/arm/boot/dts/exynos5420.dtsi
View file @ dccfd1e4
......@@ -14,7 +14,10 @@
*/
#include "exynos5.dtsi"
/include/ "exynos5420-pinctrl.dtsi"
#include "exynos5420-pinctrl.dtsi"
#include <dt-bindings/clk/exynos-audss-clk.h>
/ {
compatible = "samsung,exynos5420";
......@@ -65,6 +68,22 @@ clock: clock-controller@10010000 {
#clock-cells = <1>;
};
clock_audss: audss-clock-controller@3810000 {
compatible = "samsung,exynos5420-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
clocks = <&clock 148>;
clock-names = "sclk_audio";
};
codec@11000000 {
compatible = "samsung,mfc-v7";
reg = <0x11000000 0x10000>;
interrupts = <0 96 0>;
clocks = <&clock 401>;
clock-names = "mfc";
};
mct@101C0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>;
......@@ -90,6 +109,41 @@ mct_map: mct-map {
};
};
gsc_pd: power-domain@10044000 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>;
};
isp_pd: power-domain@10044020 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044020 0x20>;
};
mfc_pd: power-domain@10044060 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044060 0x20>;
};
disp_pd: power-domain@100440C0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100440C0 0x20>;
};
mau_pd: power-domain@100440E0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100440E0 0x20>;
};
g2d_pd: power-domain@10044100 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044100 0x20>;
};
msc_pd: power-domain@10044120 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044120 0x20>;
};
pinctrl_0: pinctrl@13400000 {
compatible = "samsung,exynos5420-pinctrl";
reg = <0x13400000 0x1000>;
......@@ -145,4 +199,23 @@ serial@12C30000 {
clocks = <&clock 260>, <&clock 131>;
clock-names = "uart", "clk_uart_baud0";
};
dp_phy: video-phy@10040728 {
compatible = "samsung,exynos5250-dp-video-phy";
reg = <0x10040728 4>;
#phy-cells = <0>;
};
dp-controller@145B0000 {
clocks = <&clock 412>;
clock-names = "dp";
phys = <&dp_phy>;
phy-names = "dp";
};
fimd@14400000 {
samsung,power-domain = <&disp_pd>;
clocks = <&clock 147>, <&clock 421>;
clock-names = "sclk_fimd", "fimd";
};
};
arch/arm/boot/dts/exynos5440.dtsi
View file @ dccfd1e4
......@@ -18,6 +18,9 @@ / {
aliases {
spi0 = &spi_0;
tmuctrl0 = &tmuctrl_0;
tmuctrl1 = &tmuctrl_1;
tmuctrl2 = &tmuctrl_2;
};
clock: clock-controller@160000 {
......@@ -207,6 +210,30 @@ rtc {
clock-names = "rtc";
};
tmuctrl_0: tmuctrl@160118 {
compatible = "samsung,exynos5440-tmu";
reg = <0x160118 0x230>, <0x160368 0x10>;
interrupts = <0 58 0>;
clocks = <&clock 21>;
clock-names = "tmu_apbif";
};
tmuctrl_1: tmuctrl@16011C {
compatible = "samsung,exynos5440-tmu";
reg = <0x16011C 0x230>, <0x160368 0x10>;
interrupts = <0 58 0>;
clocks = <&clock 21>;
clock-names = "tmu_apbif";
};
tmuctrl_2: tmuctrl@160120 {
compatible = "samsung,exynos5440-tmu";
reg = <0x160120 0x230>, <0x160368 0x10>;
interrupts = <0 58 0>;
clocks = <&clock 21>;
clock-names = "tmu_apbif";
};
sata@210000 {
compatible = "snps,exynos5440-ahci";
reg = <0x210000 0x10000>;
......
arch/arm/boot/dts/imx23-evk.dts
View file @ dccfd1e4
......@@ -90,6 +90,11 @@ timing0: timing0 {
};
apbx@80040000 {
lradc@80050000 {
status = "okay";
fsl,lradc-touchscreen-wires = <4>;
};
pwm: pwm@80064000 {
pinctrl-names = "default";
pinctrl-0 = <&pwm2_pins_a>;
......@@ -107,6 +112,16 @@ duart: serial@80070000 {
pinctrl-0 = <&duart_pins_a>;
status = "okay";
};
usbphy0: usbphy@8007c000 {
status = "okay";
};
};
};
ahb@80080000 {
usb0: usb@80080000 {
status = "okay";
};
};
......
arch/arm/boot/dts/imx23-olinuxino.dts
View file @ dccfd1e4
......@@ -69,6 +69,10 @@ ssp1: ssp@80034000 {
};
apbx@80040000 {
lradc@80050000 {
status = "okay";
};
duart: serial@80070000 {
pinctrl-names = "default";
pinctrl-0 = <&duart_pins_a>;
......
arch/arm/boot/dts/imx23.dtsi
View file @ dccfd1e4
......@@ -20,6 +20,8 @@ aliases {
gpio2 = &gpio2;
serial0 = &auart0;
serial1 = &auart1;
spi0 = &ssp0;
spi1 = &ssp1;
};
cpus {
......@@ -76,23 +78,21 @@ gpmi-nand@8000c000 {
#size-cells = <1>;
reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
reg-names = "gpmi-nand", "bch";
interrupts = <13>, <56>;
interrupt-names = "gpmi-dma", "bch";
interrupts = <56>;
interrupt-names = "bch";
clocks = <&clks 34>;
clock-names = "gpmi_io";
dmas = <&dma_apbh 4>;
dma-names = "rx-tx";
fsl,gpmi-dma-channel = <4>;
status = "disabled";
};
ssp0: ssp@80010000 {
reg = <0x80010000 0x2000>;
interrupts = <15 14>;
interrupts = <15>;
clocks = <&clks 33>;
dmas = <&dma_apbh 1>;
dma-names = "rx-tx";
fsl,ssp-dma-channel = <1>;
status = "disabled";
};
......@@ -366,11 +366,10 @@ lcdif@80030000 {
ssp1: ssp@80034000 {
reg = <0x80034000 0x2000>;
interrupts = <2 20>;
interrupts = <2>;
clocks = <&clks 33>;
dmas = <&dma_apbh 2>;
dma-names = "rx-tx";
fsl,ssp-dma-channel = <2>;
status = "disabled";
};
......@@ -472,7 +471,7 @@ timrot@80068000 {
auart0: serial@8006c000 {
compatible = "fsl,imx23-auart";
reg = <0x8006c000 0x2000>;
interrupts = <24 25 23>;
interrupts = <24>;
clocks = <&clks 32>;
dmas = <&dma_apbx 6>, <&dma_apbx 7>;
dma-names = "rx", "tx";
......@@ -482,7 +481,7 @@ auart0: serial@8006c000 {
auart1: serial@8006e000 {
compatible = "fsl,imx23-auart";
reg = <0x8006e000 0x2000>;
interrupts = <59 60 58>;
interrupts = <59>;
clocks = <&clks 32>;
dmas = <&dma_apbx 8>, <&dma_apbx 9>;
dma-names = "rx", "tx";
......
arch/arm/boot/dts/imx28-cfa10036.dts
View file @ dccfd1e4
......@@ -23,10 +23,7 @@ memory {
apb@80000000 {
apbh@80000000 {
pinctrl@80018000 {
pinctrl-names = "default";
pinctrl-0 = <&hog_pins_cfa10036>;
hog_pins_cfa10036: hog-10036@0 {
ssd1306_cfa10036: ssd1306-10036@0 {
reg = <0>;
fsl,pinmux-ids = <
0x2073 /* MX28_PAD_SSP0_D7__GPIO_2_7 */
......@@ -83,6 +80,8 @@ i2c0: i2c@80058000 {
ssd1306: oled@3c {
compatible = "solomon,ssd1306fb-i2c";
pinctrl-names = "default";
pinctrl-0 = <&ssd1306_cfa10036>;
reg = <0x3c>;
reset-gpios = <&gpio2 7 0>;
solomon,height = <32>;
......
arch/arm/boot/dts/imx28-cfa10037.dts
View file @ dccfd1e4
......@@ -22,13 +22,19 @@ / {
apb@80000000 {
apbh@80000000 {
pinctrl@80018000 {
pinctrl-names = "default", "default";
pinctrl-1 = <&hog_pins_cfa10037>;
hog_pins_cfa10037: hog-10037@0 {
usb_pins_cfa10037: usb-10037@0 {
reg = <0>;
fsl,pinmux-ids = <
0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
mac0_pins_cfa10037: mac0-10037@0 {
reg = <0>;
fsl,pinmux-ids = <
0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */
>;
fsl,drive-strength = <0>;
......@@ -56,7 +62,8 @@ usb1: usb@80090000 {
mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>;
pinctrl-0 = <&mac0_pins_a
&mac0_pins_cfa10037>;
phy-reset-gpios = <&gpio2 21 0>;
phy-reset-duration = <100>;
status = "okay";
......@@ -68,6 +75,8 @@ regulators {
reg_usb1_vbus: usb1_vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&usb_pins_cfa10037>;
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
......
arch/arm/boot/dts/imx28-cfa10049.dts
View file @ dccfd1e4
......@@ -22,32 +22,62 @@ / {
apb@80000000 {
apbh@80000000 {
pinctrl@80018000 {
pinctrl-names = "default", "default";
pinctrl-1 = <&hog_pins_cfa10049
&hog_pins_cfa10049_pullup>;
hog_pins_cfa10049: hog-10049@0 {
usb_pins_cfa10049: usb-10049@0 {
reg = <0>;
fsl,pinmux-ids = <
0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
i2cmux_pins_cfa10049: i2cmux-10049@0 {
reg = <0>;
fsl,pinmux-ids = <
0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */
0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
mac0_pins_cfa10049: mac0-10049@0 {
reg = <0>;
fsl,pinmux-ids = <
0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */
0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
hog_pins_cfa10049_pullup: hog-10049-pullup@0 {
pca_pins_cfa10049: pca-10049@0 {
reg = <0>;
fsl,pinmux-ids = <
0x2133 /* MX28_PAD_SSP2_D3__GPIO_2_19 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
rotary_pins_cfa10049: rotary-10049@0 {
reg = <0>;
fsl,pinmux-ids = <
0x3183 /* MX28_PAD_I2C0_SCL__GPIO_3_24 */
0x3193 /* MX28_PAD_I2C0_SDA__GPIO_3_25 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
rotary_btn_pins_cfa10049: rotary-btn-10049@0 {
reg = <0>;
fsl,pinmux-ids = <
0x31a3 /* MX28_PAD_SAIF_SDATA0__GPIO_3_26 */
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
......@@ -60,6 +90,7 @@ spi2_pins_cfa10049: spi2-cfa10049@0 {
0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */
0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */
0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */
0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
>;
fsl,drive-strength = <1>;
fsl,voltage = <1>;
......@@ -120,6 +151,16 @@ lcdif_pins_cfa10049: lcdif-evk@0 {
fsl,pull-up = <0>;
};
lcdif_pins_cfa10049_pullup: lcdif-10049-pullup@0 {
reg = <0>;
fsl,pinmux-ids = <
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
w1_gpio_pins: w1-gpio@0 {
reg = <0>;
fsl,pinmux-ids = <
......@@ -134,7 +175,8 @@ w1_gpio_pins: w1-gpio@0 {
lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_18bit_pins_cfa10049
&lcdif_pins_cfa10049>;
&lcdif_pins_cfa10049
&lcdif_pins_cfa10049_pullup>;
display = <&display>;
status = "okay";
......@@ -181,6 +223,8 @@ i2cmux {
compatible = "i2c-mux-gpio";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2cmux_pins_cfa10049>;
mux-gpios = <&gpio1 22 0 &gpio1 23 0>;
i2c-parent = <&i2c1>;
......@@ -203,6 +247,8 @@ i2c@3 {
pca9555: pca9555@20 {
compatible = "nxp,pca9555";
pinctrl-names = "default";
pinctrl-0 = <&pca_pins_cfa10049>;
interrupt-parent = <&gpio2>;
interrupts = <19 0x2>;
gpio-controller;
......@@ -239,6 +285,8 @@ regulators {
reg_usb1_vbus: usb1_vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&usb_pins_cfa10049>;
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
......@@ -250,7 +298,8 @@ ahb@80080000 {
mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>;
pinctrl-0 = <&mac0_pins_a
&mac0_pins_cfa10049>;
phy-reset-gpios = <&gpio2 21 0>;
phy-reset-duration = <100>;
status = "okay";
......@@ -320,6 +369,8 @@ dac0: dh2228@2 {
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&rotary_btn_pins_cfa10049>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -333,6 +384,8 @@ rotary_button {
rotary {
compatible = "rotary-encoder";
pinctrl-names = "default";
pinctrl-0 = <&rotary_pins_cfa10049>;
gpios = <&gpio3 24 1>, <&gpio3 25 1>;
linux,axis = <1>; /* REL_Y */
rotary-encoder,relative-axis;
......
arch/arm/boot/dts/imx28-cfa10055.dts
View file @ dccfd1e4
......@@ -23,36 +23,13 @@ / {
apb@80000000 {
apbh@80000000 {
pinctrl@80018000 {
pinctrl-names = "default", "default";
pinctrl-1 = <&hog_pins_cfa10055
&hog_pins_cfa10055_pullup>;
hog_pins_cfa10055: hog-10055@0 {
reg = <0>;
fsl,pinmux-ids = <
0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
hog_pins_cfa10055_pullup: hog-10055-pullup@0 {
reg = <0>;
fsl,pinmux-ids = <
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
spi2_pins_cfa10055: spi2-cfa10055@0 {
reg = <0>;
fsl,pinmux-ids = <
0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */
0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */
0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */
0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
>;
fsl,drive-strength = <1>;
fsl,voltage = <1>;
......@@ -98,12 +75,23 @@ lcdif_pins_cfa10055: lcdif-evk@0 {
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
lcdif_pins_cfa10055_pullup: lcdif-10055-pullup@0 {
reg = <0>;
fsl,pinmux-ids = <
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
};
lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_18bit_pins_cfa10055
&lcdif_pins_cfa10055>;
&lcdif_pins_cfa10055
&lcdif_pins_cfa10055_pullup>;
display = <&display>;
status = "okay";
......
arch/arm/boot/dts/imx28-cfa10056.dts 0 → 100644
View file @ dccfd1e4
/*
* Copyright 2013 Free Electrons
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/*
* The CFA-10055 is an expansion board for the CFA-10036 module and
* CFA-10037, thus we need to include the CFA-10037 DTS.
*/
/include/ "imx28-cfa10037.dts"
/ {
model = "Crystalfontz CFA-10056 Board";
compatible = "crystalfontz,cfa10056", "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28";
apb@80000000 {
apbh@80000000 {
pinctrl@80018000 {
spi2_pins_cfa10056: spi2-cfa10056@0 {
reg = <0>;
fsl,pinmux-ids = <
0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */
0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */
0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */
0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
>;
fsl,drive-strength = <1>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
lcdif_pins_cfa10056: lcdif-10056@0 {
reg = <0>;
fsl,pinmux-ids = <
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
lcdif_pins_cfa10056_pullup: lcdif-10056-pullup@0 {
reg = <0>;
fsl,pinmux-ids = <
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
};
lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_cfa10056
&lcdif_pins_cfa10056_pullup >;
display = <&display>;
status = "okay";
display: display {
bits-per-pixel = <32>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <32000000>;
hactive = <480>;
vactive = <800>;
hback-porch = <2>;
hfront-porch = <2>;
vback-porch = <2>;
vfront-porch = <2>;
hsync-len = <5>;
vsync-len = <5>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
};
};
};
};
};
spi2 {
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_cfa10056>;
status = "okay";
gpio-sck = <&gpio2 16 0>;
gpio-mosi = <&gpio2 17 0>;
gpio-miso = <&gpio2 18 0>;
cs-gpios = <&gpio3 5 0>;
num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;
hx8369: hx8369@0 {
compatible = "himax,hx8369a", "himax,hx8369";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
gpios-reset = <&gpio3 30 0>;
};
};
};
arch/arm/boot/dts/imx28-cfa10057.dts
View file @ dccfd1e4
......@@ -23,35 +23,16 @@ / {
apb@80000000 {
apbh@80000000 {
pinctrl@80018000 {
pinctrl-names = "default", "default";
pinctrl-1 = <&hog_pins_cfa10057
&hog_pins_cfa10057_pullup>;
hog_pins_cfa10057: hog-10057@0 {
usb_pins_cfa10057: usb-10057@0 {
reg = <0>;
fsl,pinmux-ids = <
0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
hog_pins_cfa10057_pullup: hog-10057-pullup@0 {
reg = <0>;
fsl,pinmux-ids = <
0x2133 /* MX28_PAD_SSP2_D3__GPIO_2_19 */
0x3183 /* MX28_PAD_I2C0_SCL__GPIO_3_24 */
0x3193 /* MX28_PAD_I2C0_SDA__GPIO_3_25 */
0x31a3 /* MX28_PAD_SAIF_SDATA0__GPIO_3_26 */
0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
lcdif_18bit_pins_cfa10057: lcdif-18bit@0 {
reg = <0>;
fsl,pinmux-ids = <
......@@ -164,6 +145,8 @@ regulators {
reg_usb1_vbus: usb1_vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&usb_pins_cfa10057>;
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
......
arch/arm/boot/dts/imx28-cfa10058.dts 0 → 100644
View file @ dccfd1e4
/*
* Copyright 2013 Crystalfontz America, Inc.
* Copyright 2013 Free Electrons
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/*
* The CFA-10058 is an expansion board for the CFA-10036 module, thus we
* need to include the CFA-10036 DTS.
*/
/include/ "imx28-cfa10036.dts"
/ {
model = "Crystalfontz CFA-10058 Board";
compatible = "crystalfontz,cfa10058", "crystalfontz,cfa10036", "fsl,imx28";
apb@80000000 {
apbh@80000000 {
pinctrl@80018000 {
usb_pins_cfa10058: usb-10058@0 {
reg = <0>;
fsl,pinmux-ids = <
0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
lcdif_pins_cfa10058: lcdif-10058@0 {
reg = <0>;
fsl,pinmux-ids = <
0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
};
lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_cfa10058>;
display = <&display>;
status = "okay";
display: display {
bits-per-pixel = <32>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <30000000>;
hactive = <800>;
vactive = <480>;
hback-porch = <40>;
hfront-porch = <40>;
vback-porch = <13>;
vfront-porch = <29>;
hsync-len = <8>;
vsync-len = <8>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
};
};
};
};
apbx@80040000 {
lradc@80050000 {
fsl,lradc-touchscreen-wires = <4>;
status = "okay";
};
pwm: pwm@80064000 {
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pins_b>;
status = "okay";
};
usbphy1: usbphy@8007e000 {
status = "okay";
};
};
};
ahb@80080000 {
usb1: usb@80090000 {
vbus-supply = <&reg_usb1_vbus>;
pinctrl-0 = <&usbphy1_pins_a>;
pinctrl-names = "default";
status = "okay";
};
};
regulators {
compatible = "simple-bus";
reg_usb1_vbus: usb1_vbus {
pinctrl-names = "default";
pinctrl-0 = <&usb_pins_cfa10058>;
compatible = "regulator-fixed";
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio0 7 1>;
};
};
ahb@80080000 {
mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>;
phy-reset-gpios = <&gpio2 21 0>;
phy-reset-duration = <100>;
status = "okay";
};
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm 3 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
};
arch/arm/boot/dts/imx28-m28evk.dts
View file @ dccfd1e4
......@@ -235,6 +235,12 @@ auart2: serial@8006e000 {
pinctrl-0 = <&auart2_2pins_b>;
status = "okay";
};
pwm: pwm@80064000 {
pinctrl-names = "default";
pinctrl-0 = <&pwm4_pins_a>;
status = "okay";
};
};
};
......@@ -270,6 +276,13 @@ mac1: ethernet@800f4000 {
};
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm 4 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
regulators {
compatible = "simple-bus";
......
arch/arm/boot/dts/imx28.dtsi
View file @ dccfd1e4
This diff is collapsed.
arch/arm/boot/dts/pxa3xx.dtsi
View file @ dccfd1e4
......@@ -28,5 +28,16 @@ pxairq: interrupt-controller@40d00000 {
marvell,intc-priority;
marvell,intc-nr-irqs = <56>;
};
gpio: gpio@40e00000 {
compatible = "intel,pxa3xx-gpio";
reg = <0x40e00000 0x10000>;
interrupt-names = "gpio0", "gpio1", "gpio_mux";
interrupts = <8 9 10>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
};
};
};
arch/arm/boot/dts/r8a73a4-ape6evm.dts
View file @ dccfd1e4
......@@ -50,3 +50,25 @@ ethernet@8000000 {
};
};
};
&i2c5 {
vdd_dvfs: max8973@1b {
compatible = "maxim,max8973";
reg = <0x1b>;
regulator-min-microvolt = <935000>;
regulator-max-microvolt = <1200000>;
regulator-boot-on;
regulator-always-on;
};
};
&cpu0 {
cpu0-supply = <&vdd_dvfs>;
operating-points = <
/* kHz uV */
1950000 1115000
1462500 995000
>;
voltage-tolerance = <1>; /* 1% */
};
arch/arm/boot/dts/r8a73a4.dtsi
View file @ dccfd1e4
......@@ -85,4 +85,137 @@ thermal@e61f0000 {
interrupt-parent = <&gic>;
interrupts = <0 69 4>;
};
i2c0: i2c@e6500000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 174 0x4>;
};
i2c1: i2c@e6510000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 175 0x4>;
};
i2c2: i2c@e6520000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6520000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 176 0x4>;
};
i2c3: i2c@e6530000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6530000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 177 0x4>;
};
i2c4: i2c@e6540000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6540000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 178 0x4>;
};
i2c5: i2c@e60b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 179 0x4>;
};
i2c6: i2c@e6550000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6550000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 184 0x4>;
};
i2c7: i2c@e6560000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6560000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 185 0x4>;
};
i2c8: i2c@e6570000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6570000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 173 0x4>;
};
mmcif0: mmcif@ee200000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 169 0x4>;
reg-io-width = <4>;
status = "disabled";
};
mmcif1: mmcif@ee220000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee220000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 170 0x4>;
reg-io-width = <4>;
status = "disabled";
};
pfc: pfc@e6050000 {
compatible = "renesas,pfc-r8a73a4";
reg = <0 0xe6050000 0 0x9000>;
gpio-controller;
#gpio-cells = <2>;
};
sdhi0: sdhi@ee100000 {
compatible = "renesas,r8a73a4-sdhi";
reg = <0 0xee100000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 165 4>;
cap-sd-highspeed;
status = "disabled";
};
sdhi1: sdhi@ee120000 {
compatible = "renesas,r8a73a4-sdhi";
reg = <0 0xee120000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 166 4>;
cap-sd-highspeed;
status = "disabled";
};
sdhi2: sdhi@ee140000 {
compatible = "renesas,r8a73a4-sdhi";
reg = <0 0xee140000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 167 4>;
cap-sd-highspeed;
status = "disabled";
};
};
arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
View file @ dccfd1e4
......@@ -10,6 +10,7 @@
/dts-v1/;
/include/ "r8a7740.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "armadillo 800 eva reference";
......@@ -33,6 +34,21 @@ reg_3p3v: regulator@0 {
regulator-boot-on;
};
leds {
compatible = "gpio-leds";
led1 {
gpios = <&pfc 102 GPIO_ACTIVE_HIGH>;
};
led2 {
gpios = <&pfc 111 GPIO_ACTIVE_HIGH>;
};
led3 {
gpios = <&pfc 110 GPIO_ACTIVE_HIGH>;
};
led4 {
gpios = <&pfc 177 GPIO_ACTIVE_HIGH>;
};
};
};
&i2c0 {
......@@ -41,5 +57,23 @@ touchscreen: st1232@55 {
reg = <0x55>;
interrupt-parent = <&irqpin1>;
interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
pinctrl-0 = <&st1232_pins>;
pinctrl-names = "default";
gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
};
};
&pfc {
pinctrl-0 = <&scifa1_pins>;
pinctrl-names = "default";
scifa1_pins: scifa1 {
renesas,groups = "scifa1_data";
renesas,function = "scifa1";
};
st1232_pins: st1232 {
renesas,groups = "intc_irq10";
renesas,function = "intc";
};
};
arch/arm/boot/dts/r8a7740.dtsi
View file @ dccfd1e4
......@@ -139,4 +139,12 @@ i2c1: i2c@e6c20000 {
0 72 0x4
0 73 0x4>;
};
pfc: pfc@e6050000 {
compatible = "renesas,pfc-r8a7740";
reg = <0xe6050000 0x8000>,
<0xe605800c 0x20>;
gpio-controller;
#gpio-cells = <2>;
};
};
arch/arm/boot/dts/r8a7778.dtsi
View file @ dccfd1e4
......@@ -32,4 +32,70 @@ gic: interrupt-controller@fe438000 {
reg = <0xfe438000 0x1000>,
<0xfe430000 0x100>;
};
gpio0: gpio@ffc40000 {
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc40000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio1: gpio@ffc41000 {
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc41000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio2: gpio@ffc42000 {
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc42000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 64 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio3: gpio@ffc43000 {
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc43000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 96 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio4: gpio@ffc44000 {
compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
reg = <0xffc44000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 103 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 128 27>;
#interrupt-cells = <2>;
interrupt-controller;
};
pfc: pfc@fffc0000 {
compatible = "renesas,pfc-r8a7778";
reg = <0xfffc000 0x118>;
#gpio-range-cells = <3>;
};
};
arch/arm/boot/dts/r8a7779-marzen-reference.dts
View file @ dccfd1e4
......@@ -11,6 +11,7 @@
/dts-v1/;
/include/ "r8a7779.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "marzen";
......@@ -37,6 +38,9 @@ fixedregulator3v3: fixedregulator@0 {
lan0@18000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x18000000 0x100>;
pinctrl-0 = <&lan0_pins>;
pinctrl-names = "default";
phy-mode = "mii";
interrupt-parent = <&gic>;
interrupts = <0 28 0x4>;
......@@ -44,4 +48,49 @@ lan0@18000000 {
vddvario-supply = <&fixedregulator3v3>;
vdd33a-supply = <&fixedregulator3v3>;
};
leds {
compatible = "gpio-leds";
led2 {
gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
};
led3 {
gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
};
led4 {
gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
};
};
};
&pfc {
pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
pinctrl-names = "default";
lan0_pins: lan0 {
intc {
renesas,groups = "intc_irq1_b";
renesas,function = "intc";
};
lbsc {
renesas,groups = "lbsc_ex_cs0";
renesas,function = "lbsc";
};
};
scif2_pins: scif2 {
renesas,groups = "scif2_data_c";
renesas,function = "scif2";
};
scif4_pins: scif4 {
renesas,groups = "scif4_data";
renesas,function = "scif4";
};
sdhi0_pins: sdhi0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
"sdhi0_wp";
renesas,function = "sdhi0";
};
};
arch/arm/boot/dts/r8a7779.dtsi
View file @ dccfd1e4
......@@ -48,6 +48,90 @@ gic: interrupt-controller@f0001000 {
<0xf0000100 0x100>;
};
gpio0: gpio@ffc40000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc40000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 141 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio1: gpio@ffc41000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc41000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 142 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio2: gpio@ffc42000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc42000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 143 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 64 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio3: gpio@ffc43000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc43000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 144 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 96 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio4: gpio@ffc44000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc44000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 145 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 128 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio5: gpio@ffc45000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc45000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 146 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 160 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio6: gpio@ffc46000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
reg = <0xffc46000 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 147 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 192 9>;
#interrupt-cells = <2>;
interrupt-controller;
};
irqpin0: irqpin@fe780010 {
compatible = "renesas,intc-irqpin";
#interrupt-cells = <2>;
......@@ -101,6 +185,12 @@ i2c3: i2c@0xffc73000 {
interrupts = <0 81 0x4>;
};
pfc: pfc@fffc0000 {
compatible = "renesas,pfc-r8a7779";
reg = <0xfffc0000 0x23c>;
#gpio-range-cells = <3>;
};
thermal@ffc48000 {
compatible = "renesas,rcar-thermal";
reg = <0xffc48000 0x38>;
......
arch/arm/boot/dts/r8a7790.dtsi
View file @ dccfd1e4
......@@ -38,6 +38,78 @@ gic: interrupt-controller@f1001000 {
interrupts = <1 9 0xf04>;
};
gpio0: gpio@ffc40000 {
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc40000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 4 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio1: gpio@ffc41000 {
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc41000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 5 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio2: gpio@ffc42000 {
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc42000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 6 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 64 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio3: gpio@ffc43000 {
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc43000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 7 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 96 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio4: gpio@ffc44000 {
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc44000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 8 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 128 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
gpio5: gpio@ffc45000 {
compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
reg = <0 0xffc45000 0 0x2c>;
interrupt-parent = <&gic>;
interrupts = <0 9 0x4>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 160 32>;
#interrupt-cells = <2>;
interrupt-controller;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 13 0xf08>,
......@@ -54,4 +126,64 @@ irqc0: interrupt-controller@e61c0000 {
interrupt-parent = <&gic>;
interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
};
mmcif0: mmcif@ee200000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 169 0x4>;
reg-io-width = <4>;
status = "disabled";
};
mmcif1: mmcif@ee220000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee220000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 170 0x4>;
reg-io-width = <4>;
status = "disabled";
};
pfc: pfc@e6060000 {
compatible = "renesas,pfc-r8a7790";
reg = <0 0xe6060000 0 0x250>;
#gpio-range-cells = <3>;
};
sdhi0: sdhi@ee100000 {
compatible = "renesas,r8a7790-sdhi";
reg = <0 0xee100000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 165 4>;
cap-sd-highspeed;
status = "disabled";
};
sdhi1: sdhi@ee120000 {
compatible = "renesas,r8a7790-sdhi";
reg = <0 0xee120000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 166 4>;
cap-sd-highspeed;
status = "disabled";
};
sdhi2: sdhi@ee140000 {
compatible = "renesas,r8a7790-sdhi";
reg = <0 0xee140000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 167 4>;
cap-sd-highspeed;
status = "disabled";
};
sdhi3: sdhi@ee160000 {
compatible = "renesas,r8a7790-sdhi";
reg = <0 0xee160000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 168 4>;
cap-sd-highspeed;
status = "disabled";
};
};
arch/arm/boot/dts/sama5d3.dtsi
View file @ dccfd1e4
......@@ -48,6 +48,11 @@ cpu@0 {
};
};
pmu {
compatible = "arm,cortex-a5-pmu";
interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
};
memory {
reg = <0x20000000 0x8000000>;
};
......
arch/arm/boot/dts/sh7372.dtsi
View file @ dccfd1e4
......@@ -23,4 +23,12 @@ cpu@0 {
reg = <0x0>;
};
};
pfc: pfc@e6050000 {
compatible = "renesas,pfc-sh7372";
reg = <0xe6050000 0x8000>,
<0xe605801c 0x1c>;
gpio-controller;
#gpio-cells = <2>;
};
};
arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
View file @ dccfd1e4
......@@ -13,6 +13,7 @@
/dts-v1/;
/include/ "sh73a0.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "KZM-A9-GT";
......@@ -58,6 +59,24 @@ reg_3p3v: regulator@1 {
regulator-boot-on;
};
vmmc_sdhi0: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pfc 15 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vmmc_sdhi2: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "SDHI2 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pfc 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
lan9220@10000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x10000000 0x100>;
......@@ -70,6 +89,22 @@ lan9220@10000000 {
vddvario-supply = <&reg_1p8v>;
vdd33a-supply = <&reg_3p3v>;
};
leds {
compatible = "gpio-leds";
led1 {
gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
};
led2 {
gpios = <&pfc 21 GPIO_ACTIVE_LOW>;
};
led3 {
gpios = <&pfc 22 GPIO_ACTIVE_LOW>;
};
led4 {
gpios = <&pfc 23 GPIO_ACTIVE_LOW>;
};
};
};
&i2c0 {
......@@ -145,20 +180,71 @@ ldo8 {
};
};
&i2c3 {
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
};
&mmcif {
pinctrl-0 = <&mmcif_pins>;
pinctrl-names = "default";
bus-width = <8>;
vmmc-supply = <&reg_1p8v>;
status = "okay";
};
&pfc {
pinctrl-0 = <&scifa4_pins>;
pinctrl-names = "default";
i2c3_pins: i2c3 {
renesas,groups = "i2c3_1";
renesas,function = "i2c3";
};
mmcif_pins: mmcif {
mux {
renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
renesas,function = "mmc0";
};
cfg {
renesas,groups = "mmc0_data8_0";
renesas,pins = "PORT279";
bias-pull-up;
};
};
scifa4_pins: scifa4 {
renesas,groups = "scifa4_data", "scifa4_ctrl";
renesas,function = "scifa4";
};
sdhi0_pins: sdhi0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
renesas,function = "sdhi0";
};
sdhi2_pins: sdhi2 {
renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
renesas,function = "sdhi2";
};
};
&sdhi0 {
vmmc-supply = <&reg_3p3v>;
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
vmmc-supply = <&vmmc_sdhi0>;
bus-width = <4>;
status = "okay";
};
&sdhi2 {
vmmc-supply = <&reg_3p3v>;
pinctrl-0 = <&sdhi2_pins>;
pinctrl-names = "default";
vmmc-supply = <&vmmc_sdhi2>;
bus-width = <4>;
broken-cd;
status = "okay";
......
arch/arm/boot/dts/sh73a0.dtsi
View file @ dccfd1e4
......@@ -222,4 +222,12 @@ sdhi2: sdhi@ee140000 {
cap-sd-highspeed;
status = "disabled";
};
pfc: pfc@e6050000 {
compatible = "renesas,pfc-sh73a0";
reg = <0xe6050000 0x8000>,
<0xe605801c 0x1c>;
gpio-controller;
#gpio-cells = <2>;
};
};
arch/arm/boot/dts/socfpga.dtsi
View file @ dccfd1e4
......@@ -476,25 +476,25 @@ timer@fffec600 {
};
timer0: timer0@ffc08000 {
compatible = "snps,dw-apb-timer-sp";
compatible = "snps,dw-apb-timer";
interrupts = <0 167 4>;
reg = <0xffc08000 0x1000>;
};
timer1: timer1@ffc09000 {
compatible = "snps,dw-apb-timer-sp";
compatible = "snps,dw-apb-timer";
interrupts = <0 168 4>;
reg = <0xffc09000 0x1000>;
};
timer2: timer2@ffd00000 {
compatible = "snps,dw-apb-timer-osc";
compatible = "snps,dw-apb-timer";
interrupts = <0 169 4>;
reg = <0xffd00000 0x1000>;
};
timer3: timer3@ffd01000 {
compatible = "snps,dw-apb-timer-osc";
compatible = "snps,dw-apb-timer";
interrupts = <0 170 4>;
reg = <0xffd01000 0x1000>;
};
......
arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi 0 → 100644
View file @ dccfd1e4
/*
* Copyright 2012 ST-Ericsson
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include "ste-nomadik-pinctrl.dtsi"
/ {
soc {
pinctrl {
uart0 {
uart0_default_mux: uart0_mux {
default_mux {
ste,function = "u0";
ste,pins = "u0_a_1";
};
};
uart0_default_mode: uart0_default {
default_cfg1 {
ste,pins = "GPIO0", "GPIO2";
ste,config = <&in_pu>;
};
default_cfg2 {
ste,pins = "GPIO1", "GPIO3";
ste,config = <&out_hi>;
};
};
uart0_sleep_mode: uart0_sleep {
sleep_cfg1 {
ste,pins = "GPIO0", "GPIO2";
ste,config = <&slpm_in_pu>;
};
sleep_cfg2 {
ste,pins = "GPIO1", "GPIO3";
ste,config = <&slpm_out_hi>;
};
};
};
uart2 {
uart2_default_mode: uart2_default {
default_mux {
ste,function = "u2";
ste,pins = "u2txrx_a_1";
};
default_cfg1 {
ste,pins = "GPIO120";
ste,config = <&in_pu>;
};
default_cfg2 {
ste,pins = "GPIO121";
ste,config = <&out_hi>;
};
};
uart2_sleep_mode: uart2_sleep {
sleep_cfg1 {
ste,pins = "GPIO120";
ste,config = <&slpm_in_pu>;
};
sleep_cfg2 {
ste,pins = "GPIO121";
ste,config = <&slpm_out_hi>;
};
};
};
i2c0 {
i2c0_default_mux: i2c_mux {
default_mux {
ste,function = "i2c0";
ste,pins = "i2c0_a_1";
};
};
i2c0_default_mode: i2c_default {
default_cfg1 {
ste,pins = "GPIO147", "GPIO148";
ste,config = <&in_pu>;
};
};
i2c0_sleep_mode: i2c_sleep {
sleep_cfg1 {
ste,pins = "GPIO147", "GPIO148";
ste,config = <&slpm_in_pu>;
};
};
};
i2c1 {
i2c1_default_mux: i2c_mux {
default_mux {
ste,function = "i2c1";
ste,pins = "i2c1_b_2";
};
};
i2c1_default_mode: i2c_default {
default_cfg1 {
ste,pins = "GPIO16", "GPIO17";
ste,config = <&in_pu>;
};
};
i2c1_sleep_mode: i2c_sleep {
sleep_cfg1 {
ste,pins = "GPIO16", "GPIO17";
ste,config = <&slpm_in_pu>;
};
};
};
i2c2 {
i2c2_default_mux: i2c_mux {
default_mux {
ste,function = "i2c2";
ste,pins = "i2c2_b_2";
};
};
i2c2_default_mode: i2c_default {
default_cfg1 {
ste,pins = "GPIO10", "GPIO11";
ste,config = <&in_pu>;
};
};
i2c2_sleep_mode: i2c_sleep {
sleep_cfg1 {
ste,pins = "GPIO11", "GPIO11";
ste,config = <&slpm_in_pu>;
};
};
};
i2c4 {
i2c4_default_mux: i2c_mux {
default_mux {
ste,function = "i2c4";
ste,pins = "i2c4_b_2";
};
};
i2c4_default_mode: i2c_default {
default_cfg1 {
ste,pins = "GPIO122", "GPIO123";
ste,config = <&in_pu>;
};
};
i2c4_sleep_mode: i2c_sleep {
sleep_cfg1 {
ste,pins = "GPIO122", "GPIO123";
ste,config = <&slpm_in_pu>;
};
};
};
i2c5 {
i2c5_default_mux: i2c_mux {
default_mux {
ste,function = "i2c5";
ste,pins = "i2c5_c_2";
};
};
i2c5_default_mode: i2c_default {
default_cfg1 {
ste,pins = "GPIO118", "GPIO119";
ste,config = <&in_pu>;
};
};
i2c5_sleep_mode: i2c_sleep {
sleep_cfg1 {
ste,pins = "GPIO118", "GPIO119";
ste,config = <&slpm_in_pu>;
};
};
};
};
};
};
arch/arm/boot/dts/ste-ccu8540.dts 0 → 100644
View file @ dccfd1e4
/*
* Copyright 2013 ST-Ericsson AB
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "ste-dbx5x0.dtsi"
#include "ste-ccu8540-pinctrl.dtsi"
/ {
model = "ST-Ericsson U8540 platform with Device Tree";
compatible = "st-ericsson,ccu8540", "st-ericsson,u8540";
memory@0 {
reg = <0x20000000 0x1f000000>, <0xc0000000 0x3f000000>;
};
soc {
pinctrl {
compatible = "stericsson,db8540-pinctrl";
};
prcmu@80157000 {
reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x3000>;
reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
};
uart@80120000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>;
pinctrl-1 = <&uart0_sleep_mode>;
status = "okay";
};
uart@80121000 {
status = "okay";
};
uart@80007000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart2_default_mode>;
pinctrl-1 = <&uart2_sleep_mode>;
status = "okay";
};
i2c0: i2c@80004000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
pinctrl-1 = <&i2c0_sleep_mode>;
};
i2c1: i2c@80122000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
pinctrl-1 = <&i2c1_sleep_mode>;
};
i2c2: i2c@80128000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c2_default_mux>, <&i2c2_default_mode>;
pinctrl-1 = <&i2c2_sleep_mode>;
};
i2c3: i2c@80110000 {
status = "disabled";
};
i2c4: i2c@8012a000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c4_default_mux>, <&i2c4_default_mode>;
pinctrl-1 = <&i2c4_sleep_mode>;
};
i2c5: i2c@80001000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c5_default_mux>, <&i2c5_default_mode>;
pinctrl-1 = <&i2c5_sleep_mode>;
};
};
};
arch/arm/boot/dts/ccu9540.dts → arch/arm/boot/dts/ste-ccu9540.dts
View file @ dccfd1e4
......@@ -10,7 +10,7 @@
*/
/dts-v1/;
#include "dbx5x0.dtsi"
#include "ste-dbx5x0.dtsi"
/ {
model = "ST-Ericsson CCU9540 platform with Device Tree";
......
arch/arm/boot/dts/dbx5x0.dtsi → arch/arm/boot/dts/ste-dbx5x0.dtsi
View file @ dccfd1e4
......@@ -457,8 +457,36 @@ codec: ab8500-codec {
stericsson,earpeice-cmv = <950>; /* Units in mV. */
};
ext_regulators: ab8500-ext-regulators {
compatible = "stericsson,ab8500-ext-regulator";
ab8500_ext1_reg: ab8500_ext1 {
regulator-compatible = "ab8500_ext1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ab8500_ext2_reg: ab8500_ext2 {
regulator-compatible = "ab8500_ext2";
regulator-min-microvolt = <1360000>;
regulator-max-microvolt = <1360000>;
regulator-boot-on;
regulator-always-on;
};
ab8500_ext3_reg: ab8500_ext3 {
regulator-compatible = "ab8500_ext3";
regulator-min-microvolt = <3400000>;
regulator-max-microvolt = <3400000>;
regulator-boot-on;
};
};
ab8500-regulators {
compatible = "stericsson,ab8500-regulator";
vin-supply = <&ab8500_ext3_reg>;
// supplies to the display/camera
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
......
arch/arm/boot/dts/href.dtsi → arch/arm/boot/dts/ste-href.dtsi
View file @ dccfd1e4
......@@ -10,7 +10,7 @@
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include "dbx5x0.dtsi"
#include "ste-dbx5x0.dtsi"
/ {
memory {
......
arch/arm/boot/dts/hrefprev60.dts → arch/arm/boot/dts/ste-hrefprev60.dts
View file @ dccfd1e4
......@@ -10,9 +10,9 @@
*/
/dts-v1/;
#include "dbx5x0.dtsi"
#include "href.dtsi"
#include "stuib.dtsi"
#include "ste-dbx5x0.dtsi"
#include "ste-href.dtsi"
#include "ste-stuib.dtsi"
/ {
model = "ST-Ericsson HREF (pre-v60) platform with Device Tree";
......
arch/arm/boot/dts/hrefv60plus.dts → arch/arm/boot/dts/ste-hrefv60plus.dts
View file @ dccfd1e4
......@@ -10,9 +10,9 @@
*/
/dts-v1/;
#include "dbx5x0.dtsi"
#include "href.dtsi"
#include "stuib.dtsi"
#include "ste-dbx5x0.dtsi"
#include "ste-href.dtsi"
#include "ste-stuib.dtsi"
/ {
model = "ST-Ericsson HREF (v60+) platform with Device Tree";
......
arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi 0 → 100644
View file @ dccfd1e4
/*
* Copyright 2012 ST-Ericsson
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include <dt-bindings/pinctrl/nomadik.h>
/ {
in_nopull: in_nopull {
ste,input = <INPUT_NOPULL>;
};
in_pu: input_pull_up {
ste,input = <INPUT_PULLUP>;
};
in_pd: input_pull_down {
ste,input = <INPUT_PULLDOWN>;
};
out_hi: output_high {
ste,output = <OUTPUT_HIGH>;
};
out_lo: output_low {
ste,output = <OUTPUT_LOW>;
};
gpio_out_lo: gpio_output_low {
ste,gpio = <GPIOMODE_ENABLED>;
ste,output = <OUTPUT_LOW>;
};
slpm_in_pu: slpm_in_pu {
ste,sleep = <SLPM_ENABLED>;
ste,sleep-input = <SLPM_INPUT_PULLUP>;
ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
};
slpm_in_wkup_pdis: slpm_in_wkup_pdis {
ste,sleep = <SLPM_ENABLED>;
ste,sleep-input = <SLPM_DIR_INPUT>;
ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
};
slpm_out_lo: slpm_out_lo {
ste,sleep = <SLPM_ENABLED>;
ste,sleep-output = <SLPM_OUTPUT_LOW>;
ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
};
slpm_out_hi: slpm_out_hi {
ste,sleep = <SLPM_ENABLED>;
ste,sleep-output = <SLPM_OUTPUT_HIGH>;
ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
};
slpm_out_hi_wkup_pdis: slpm_out_hi_wkup_pdis {
ste,sleep = <SLPM_ENABLED>;
ste,sleep-output = <SLPM_OUTPUT_HIGH>;
ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
};
slpm_out_wkup_pdis: slpm_out_wkup_pdis {
ste,sleep = <SLPM_ENABLED>;
ste,sleep-output = <SLPM_DIR_OUTPUT>;
ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
};
in_wkup_pdis: in_wkup_pdis {
ste,sleep-input = <SLPM_DIR_INPUT>;
ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
};
out_hi_wkup_pdis: out_hi_wkup_pdis {
ste,sleep-output = <SLPM_OUTPUT_HIGH>;
ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
};
out_wkup_pdis: out_wkup_pdis {
ste,sleep-output = <SLPM_DIR_OUTPUT>;
ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
};
};
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
View file @ dccfd1e4
......@@ -140,18 +140,30 @@ mmcsd_default_cfg3 {
};
};
i2c0 {
i2c0_default_mux: i2c0_mux {
i2c0_default_mux {
ste,function = "i2c0";
ste,pins = "i2c0_a_1";
};
};
i2c0_default_mode: i2c0_default {
i2c0_default_cfg {
ste,pins = "GPIO62_D3", "GPIO63_D2";
ste,input = <1>;
ste,input = <0>;
};
};
};
i2c1 {
i2c1_default_mux: i2c1_mux {
i2c1_default_mux {
ste,function = "i2c1";
ste,pins = "i2c1_a_1";
};
};
i2c1_default_mode: i2c1_default {
i2c1_default_cfg {
ste,pins = "GPIO53_L4", "GPIO54_L3";
ste,input = <1>;
ste,input = <0>;
};
};
};
......@@ -159,7 +171,7 @@ i2c2 {
i2c2_default_mode: i2c2_default {
i2c2_default_cfg {
ste,pins = "GPIO73_C21", "GPIO74_C20";
ste,input = <1>;
ste,input = <0>;
};
};
};
......@@ -682,13 +694,17 @@ ethernet@300 {
/* I2C0 connected to the STw4811 power management chip */
i2c0 {
compatible = "i2c-gpio";
gpios = <&gpio1 31 0>, /* sda */
<&gpio1 30 0>; /* scl */
compatible = "st,nomadik-i2c", "arm,primecell";
reg = <0x101f8000 0x1000>;
interrupt-parent = <&vica>;
interrupts = <20>;
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&i2c0clk>, <&pclki2c0>;
clock-names = "mclk", "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_default_mode>;
pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
stw4811@2d {
compatible = "st,stw4811";
......@@ -698,13 +714,17 @@ stw4811@2d {
/* I2C1 connected to various sensors */
i2c1 {
compatible = "i2c-gpio";
gpios = <&gpio1 22 0>, /* sda */
<&gpio1 21 0>; /* scl */
compatible = "st,nomadik-i2c", "arm,primecell";
reg = <0x101f7000 0x1000>;
interrupt-parent = <&vica>;
interrupts = <21>;
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&i2c1clk>, <&pclki2c1>;
clock-names = "mclk", "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_default_mode>;
pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
camera@2d {
compatible = "st,camera";
......
arch/arm/boot/dts/snowball.dts → arch/arm/boot/dts/ste-snowball.dts
View file @ dccfd1e4
......@@ -10,7 +10,7 @@
*/
/dts-v1/;
#include "dbx5x0.dtsi"
#include "ste-dbx5x0.dtsi"
/ {
model = "Calao Systems Snowball platform with device tree";
......@@ -165,34 +165,6 @@ uart@80007000 {
status = "okay";
};
i2c@80004000 {
tc3589x@42 {
//compatible = "tc3589x";
reg = <0x42>;
gpios = <&gpio6 25 0x4>;
interrupt-parent = <&gpio6>;
};
tps61052@33 {
//compatible = "tps61052";
reg = <0x33>;
};
};
i2c@80128000 {
lp5521@33 {
// compatible = "lp5521";
reg = <0x33>;
};
lp5521@34 {
// compatible = "lp5521";
reg = <0x34>;
};
bh1780@29 {
// compatible = "rohm,bh1780gli";
reg = <0x33>;
};
};
cpufreq-cooling {
status = "okay";
};
......@@ -310,6 +282,20 @@ ab8500-gpio {
compatible = "stericsson,ab8500-gpio";
};
ext_regulators: ab8500-ext-regulators {
ab8500_ext1_reg: ab8500_ext1 {
regulator-name = "ab8500-ext-supply1";
};
ab8500_ext2_reg_reg: ab8500_ext2 {
regulator-name = "ab8500-ext-supply2";
};
ab8500_ext3_reg_reg: ab8500_ext3 {
regulator-name = "ab8500-ext-supply3";
};
};
ab8500-regulators {
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
regulator-name = "V-DISPLAY";
......
arch/arm/boot/dts/sun4i-a10-a1000.dts 0 → 100644
View file @ dccfd1e4
/*
* Copyright 2013 Emilio López
*
* Emilio López <emilio@elopez.com.ar>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "sun4i-a10.dtsi"
/ {
model = "Mele A1000";
compatible = "mele,a1000", "allwinner,sun4i-a10";
aliases {
serial0 = &uart0;
};
soc@01c00000 {
emac: ethernet@01c0b000 {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
mdio@01c0b080 {
phy-supply = <&reg_emac_3v3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
pinctrl@01c20800 {
emac_power_pin_a1000: emac_power_pin@0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
led_pins_a1000: led_pins@0 {
allwinner,pins = "PH10", "PH20";
allwinner,function = "gpio_out";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
};
uart0: serial@01c28000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
i2c0: i2c@01c2ac00 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins_a1000>;
red {
label = "a1000:red:usr";
gpios = <&pio 7 10 0>;
};
blue {
label = "a1000:blue:usr";
gpios = <&pio 7 20 0>;
};
};
regulators {
compatible = "simple-bus";
reg_emac_3v3: emac-3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&emac_power_pin_a1000>;
regulator-name = "emac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&pio 7 15 0>;
};
};
};
arch/arm/boot/dts/sun4i-a10-cubieboard.dts
View file @ dccfd1e4
......@@ -26,7 +26,7 @@ chosen {
bootargs = "earlyprintk console=ttyS0,115200";
};
soc@01c20000 {
soc@01c00000 {
emac: ethernet@01c0b000 {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_a>;
......@@ -76,12 +76,12 @@ leds {
pinctrl-0 = <&led_pins_cubieboard>;
blue {
label = "cubieboard::blue";
label = "cubieboard:blue:usr";
gpios = <&pio 7 21 0>; /* LED1 */
};
green {
label = "cubieboard::green";
label = "cubieboard:green:usr";
gpios = <&pio 7 20 0>; /* LED2 */
linux,default-trigger = "heartbeat";
};
......
arch/arm/boot/dts/sun4i-a10-hackberry.dts
View file @ dccfd1e4
......@@ -22,7 +22,7 @@ chosen {
bootargs = "earlyprintk console=ttyS0,115200";
};
soc@01c20000 {
soc@01c00000 {
emac: ethernet@01c0b000 {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_a>;
......
arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
View file @ dccfd1e4
......@@ -22,7 +22,7 @@ chosen {
bootargs = "earlyprintk console=ttyS0,115200";
};
soc@01c20000 {
soc@01c00000 {
uart0: serial@01c28000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
......
arch/arm/boot/dts/sun4i-a10.dtsi
View file @ dccfd1e4
......@@ -160,11 +160,10 @@ apb1_gates: apb1_gates@01c2006c {
};
};
soc@01c20000 {
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x01c20000 0x300000>;
ranges;
emac: ethernet@01c0b000 {
......
arch/arm/boot/dts/sun5i-a10s.dtsi
View file @ dccfd1e4
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arch/arm/boot/dts/sun5i-a13-olinuxino.dts
View file @ dccfd1e4
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arch/arm/boot/dts/sun5i-a13.dtsi
View file @ dccfd1e4
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arch/arm/boot/dts/sun6i-a31-colombus.dts 0 → 100644
View file @ dccfd1e4
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arch/arm/boot/dts/sun6i-a31.dtsi 0 → 100644
View file @ dccfd1e4
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arch/arm/boot/dts/sun7i-a20.dtsi 0 → 100644
View file @ dccfd1e4
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arch/arm/boot/dts/tegra114-dalmore.dts
View file @ dccfd1e4
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arch/arm/boot/dts/tegra114-pluto.dts deleted 100644 → 0
View file @ 8e73e367
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arch/arm/boot/dts/tegra114.dtsi
View file @ dccfd1e4
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arch/arm/boot/dts/tegra20-colibri-512.dtsi
View file @ dccfd1e4
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arch/arm/boot/dts/tegra20-harmony.dts
View file @ dccfd1e4
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arch/arm/boot/dts/tegra20-paz00.dts
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arch/arm/boot/dts/tegra20-seaboard.dts
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arch/arm/boot/dts/tegra20-tamonten.dtsi
View file @ dccfd1e4
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arch/arm/boot/dts/tegra20-tec.dts
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