Commit dfdaf864 authored by Tony Lindgren's avatar Tony Lindgren

ARM: OMAP2+: Drop legacy platform data for omap4 iva

We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

Cc: Suman Anna <s-anna@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 399882c1
...@@ -107,11 +107,6 @@ mpu { ...@@ -107,11 +107,6 @@ mpu {
ti,hwmods = "mpu"; ti,hwmods = "mpu";
sram = <&ocmcram>; sram = <&ocmcram>;
}; };
iva {
compatible = "ti,ivahd";
ti,hwmods = "iva";
};
}; };
/* /*
...@@ -651,6 +646,32 @@ hdmi: encoder@0 { ...@@ -651,6 +646,32 @@ hdmi: encoder@0 {
}; };
}; };
}; };
iva_hd_target: target-module@5a000000 {
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x5a05a400 0x4>,
<0x5a05a410 0x4>;
reg-names = "rev", "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
power-domains = <&prm_ivahd>;
resets = <&prm_ivahd 2>;
reset-names = "rstctrl";
clocks = <&ivahd_clkctrl OMAP4_IVA_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x5a000000 0x5a000000 0x1000000>,
<0x5b000000 0x5b000000 0x1000000>;
iva {
compatible = "ti,ivahd";
};
};
}; };
}; };
......
...@@ -440,39 +440,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { ...@@ -440,39 +440,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
.opt_clks_cnt = ARRAY_SIZE(iss_opt_clks), .opt_clks_cnt = ARRAY_SIZE(iss_opt_clks),
}; };
/*
* 'iva' class
* multi-standard video encoder/decoder hardware accelerator
*/
static struct omap_hwmod_class omap44xx_iva_hwmod_class = {
.name = "iva",
};
/* iva */
static struct omap_hwmod_rst_info omap44xx_iva_resets[] = {
{ .name = "seq0", .rst_shift = 0 },
{ .name = "seq1", .rst_shift = 1 },
{ .name = "logic", .rst_shift = 2 },
};
static struct omap_hwmod omap44xx_iva_hwmod = {
.name = "iva",
.class = &omap44xx_iva_hwmod_class,
.clkdm_name = "ivahd_clkdm",
.rst_lines = omap44xx_iva_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets),
.main_clk = "dpll_iva_m5x2_ck",
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET,
.rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
.context_offs = OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET,
.modulemode = MODULEMODE_HWCTRL,
},
},
};
/* /*
* 'mpu' class * 'mpu' class
* mpu sub-system * mpu sub-system
...@@ -644,14 +611,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = { ...@@ -644,14 +611,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {
.user = OCP_USER_MPU, .user = OCP_USER_MPU,
}; };
/* iva -> l3_instr */
static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = {
.master = &omap44xx_iva_hwmod,
.slave = &omap44xx_l3_instr_hwmod,
.clk = "l3_div_ck",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3_main_3 -> l3_instr */ /* l3_main_3 -> l3_instr */
static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = { static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = {
.master = &omap44xx_l3_main_3_hwmod, .master = &omap44xx_l3_main_3_hwmod,
...@@ -708,14 +667,6 @@ static struct omap_hwmod_ocp_if omap44xx_iss__l3_main_2 = { ...@@ -708,14 +667,6 @@ static struct omap_hwmod_ocp_if omap44xx_iss__l3_main_2 = {
.user = OCP_USER_MPU | OCP_USER_SDMA, .user = OCP_USER_MPU | OCP_USER_SDMA,
}; };
/* iva -> l3_main_2 */
static struct omap_hwmod_ocp_if omap44xx_iva__l3_main_2 = {
.master = &omap44xx_iva_hwmod,
.slave = &omap44xx_l3_main_2_hwmod,
.clk = "l3_div_ck",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3_main_1 -> l3_main_2 */ /* l3_main_1 -> l3_main_2 */
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
.master = &omap44xx_l3_main_1_hwmod, .master = &omap44xx_l3_main_1_hwmod,
...@@ -852,22 +803,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = { ...@@ -852,22 +803,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {
.user = OCP_USER_MPU | OCP_USER_SDMA, .user = OCP_USER_MPU | OCP_USER_SDMA,
}; };
/* iva -> sl2if */
static struct omap_hwmod_ocp_if __maybe_unused omap44xx_iva__sl2if = {
.master = &omap44xx_iva_hwmod,
.slave = &omap44xx_sl2if_hwmod,
.clk = "dpll_iva_m5x2_ck",
.user = OCP_USER_IVA,
};
/* l3_main_2 -> iva */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = {
.master = &omap44xx_l3_main_2_hwmod,
.slave = &omap44xx_iva_hwmod,
.clk = "l3_div_ck",
.user = OCP_USER_MPU,
};
/* l3_main_2 -> ocmc_ram */ /* l3_main_2 -> ocmc_ram */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = {
.master = &omap44xx_l3_main_2_hwmod, .master = &omap44xx_l3_main_2_hwmod,
...@@ -943,7 +878,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__emif2 = { ...@@ -943,7 +878,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__emif2 = {
static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l3_main_1__dmm, &omap44xx_l3_main_1__dmm,
&omap44xx_mpu__dmm, &omap44xx_mpu__dmm,
&omap44xx_iva__l3_instr,
&omap44xx_l3_main_3__l3_instr, &omap44xx_l3_main_3__l3_instr,
&omap44xx_ocp_wp_noc__l3_instr, &omap44xx_ocp_wp_noc__l3_instr,
&omap44xx_l3_main_2__l3_main_1, &omap44xx_l3_main_2__l3_main_1,
...@@ -951,7 +885,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { ...@@ -951,7 +885,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_mpu__l3_main_1, &omap44xx_mpu__l3_main_1,
&omap44xx_debugss__l3_main_2, &omap44xx_debugss__l3_main_2,
&omap44xx_iss__l3_main_2, &omap44xx_iss__l3_main_2,
&omap44xx_iva__l3_main_2,
&omap44xx_l3_main_1__l3_main_2, &omap44xx_l3_main_1__l3_main_2,
&omap44xx_l4_cfg__l3_main_2, &omap44xx_l4_cfg__l3_main_2,
&omap44xx_l3_main_1__l3_main_3, &omap44xx_l3_main_1__l3_main_3,
...@@ -969,8 +902,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { ...@@ -969,8 +902,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l3_instr__debugss, &omap44xx_l3_instr__debugss,
&omap44xx_l3_main_2__gpmc, &omap44xx_l3_main_2__gpmc,
&omap44xx_l3_main_2__iss, &omap44xx_l3_main_2__iss,
/* &omap44xx_iva__sl2if, */
&omap44xx_l3_main_2__iva,
&omap44xx_l3_main_2__ocmc_ram, &omap44xx_l3_main_2__ocmc_ram,
&omap44xx_mpu_private__prcm_mpu, &omap44xx_mpu_private__prcm_mpu,
&omap44xx_l4_wkup__cm_core_aon, &omap44xx_l4_wkup__cm_core_aon,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment