Commit e1a00373 authored by David S. Miller's avatar David S. Miller

Merge tag 'linux-can-next-for-6.9-20240213' of...

Merge tag 'linux-can-next-for-6.9-20240213' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next

Marc Kleine-Budde says:

====================
linux-can-next-for-6.9-20240213

this is a pull request of 23 patches for net-next/master.

The first patch is by Nicolas Maier and targets the CAN Broadcast
Manager (bcm), it adds message flags to distinguish between own local
and remote traffic.

Oliver Hartkopp contributes a patch for the CAN ISOTP protocol that
adds dynamic flow control parameters.

Stefan Mätje's patch series add support for the esd PCIe/402 CAN
interface family.

Markus Schneider-Pargmann contributes 14 patches for the m_can to
optimize for the SPI attached tcan4x5x controller.

A patch by Vincent Mailhol replaces Wolfgang Grandegger by Vincent
Mailhol as the CAN drivers Co-Maintainer.

Jimmy Assarsson's patch add support for the Kvaser M.2 PCIe 4xCAN
adapter.

A patch by Daniil Dulov removed a redundant NULL check in the softing
driver.

Oliver Hartkopp contributes a patch to add CANXL virtual CAN network
identifier support.

A patch by myself removes Naga Sureshkumar Relli as the maintainer of
the xilinx_can driver, as their email bounces.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents f77581bf 73b8f501
......@@ -444,6 +444,24 @@ definitions are specified for CAN specific MTUs in include/linux/can.h:
#define CANFD_MTU (sizeof(struct canfd_frame)) == 72 => CAN FD frame
Returned Message Flags
----------------------
When using the system call recvmsg(2) on a RAW or a BCM socket, the
msg->msg_flags field may contain the following flags:
MSG_DONTROUTE:
set when the received frame was created on the local host.
MSG_CONFIRM:
set when the frame was sent via the socket it is received on.
This flag can be interpreted as a 'transmission confirmation' when the
CAN driver supports the echo of frames on driver level, see
:ref:`socketcan-local-loopback1` and :ref:`socketcan-local-loopback2`.
(Note: In order to receive such messages on a RAW socket,
CAN_RAW_RECV_OWN_MSGS must be set.)
.. _socketcan-raw-sockets:
RAW Protocol Sockets with can_filters (SOCK_RAW)
......@@ -693,22 +711,6 @@ where the CAN_INV_FILTER flag is set in order to notch single CAN IDs or
CAN ID ranges from the incoming traffic.
RAW Socket Returned Message Flags
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
When using recvmsg() call, the msg->msg_flags may contain following flags:
MSG_DONTROUTE:
set when the received frame was created on the local host.
MSG_CONFIRM:
set when the frame was sent via the socket it is received on.
This flag can be interpreted as a 'transmission confirmation' when the
CAN driver supports the echo of frames on driver level, see
:ref:`socketcan-local-loopback1` and :ref:`socketcan-local-loopback2`.
In order to receive such messages, CAN_RAW_RECV_OWN_MSGS must be set.
Broadcast Manager Protocol Sockets (SOCK_DGRAM)
-----------------------------------------------
......
......@@ -4632,8 +4632,8 @@ S: Maintained
F: net/sched/sch_cake.c
CAN NETWORK DRIVERS
M: Wolfgang Grandegger <wg@grandegger.com>
M: Marc Kleine-Budde <mkl@pengutronix.de>
M: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
L: linux-can@vger.kernel.org
S: Maintained
W: https://github.com/linux-can
......@@ -7887,6 +7887,13 @@ S: Maintained
F: include/linux/errseq.h
F: lib/errseq.c
ESD CAN NETWORK DRIVERS
M: Stefan Mätje <stefan.maetje@esd.eu>
R: socketcan@esd.eu
L: linux-can@vger.kernel.org
S: Maintained
F: drivers/net/can/esd/
ESD CAN/USB DRIVERS
M: Frank Jungclaus <frank.jungclaus@esd.eu>
R: socketcan@esd.eu
......@@ -24142,7 +24149,6 @@ F: drivers/net/ethernet/xilinx/xilinx_axienet*
XILINX CAN DRIVER
M: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
R: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
L: linux-can@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/net/can/xilinx,can.yaml
......
......@@ -168,6 +168,7 @@ config CAN_KVASER_PCIEFD
Kvaser Mini PCI Express 2xHS v2
Kvaser Mini PCI Express 1xCAN v3
Kvaser Mini PCI Express 2xCAN v3
Kvaser M.2 PCIe 4xCAN
config CAN_SLCAN
tristate "Serial / USB serial CAN Adaptors (slcan)"
......@@ -218,6 +219,7 @@ config CAN_XILINXCAN
source "drivers/net/can/c_can/Kconfig"
source "drivers/net/can/cc770/Kconfig"
source "drivers/net/can/ctucanfd/Kconfig"
source "drivers/net/can/esd/Kconfig"
source "drivers/net/can/ifi_canfd/Kconfig"
source "drivers/net/can/m_can/Kconfig"
source "drivers/net/can/mscan/Kconfig"
......
......@@ -8,6 +8,7 @@ obj-$(CONFIG_CAN_VXCAN) += vxcan.o
obj-$(CONFIG_CAN_SLCAN) += slcan/
obj-y += dev/
obj-y += esd/
obj-y += rcar/
obj-y += spi/
obj-y += usb/
......
# SPDX-License-Identifier: GPL-2.0-only
config CAN_ESD_402_PCI
tristate "esd electronics gmbh CAN-PCI(e)/402 family"
depends on PCI && HAS_DMA
help
Support for C402 card family from esd electronics gmbh.
This card family is based on the ESDACC CAN controller and
available in several form factors: PCI, PCIe, PCIe Mini,
M.2 PCIe, CPCIserial, PMC, XMC (see https://esd.eu/en)
This driver can also be built as a module. In this case the
module will be called esd_402_pci.
# SPDX-License-Identifier: GPL-2.0-only
#
# Makefile for esd gmbh ESDACC controller driver
#
esd_402_pci-objs := esdacc.o esd_402_pci-core.o
obj-$(CONFIG_CAN_ESD_402_PCI) += esd_402_pci.o
This diff is collapsed.
This diff is collapsed.
/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (C) 2015 - 2016 Thomas Körper, esd electronic system design gmbh
* Copyright (C) 2017 - 2023 Stefan Mätje, esd electronics gmbh
*/
#include <linux/bits.h>
#include <linux/can/dev.h>
#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/units.h>
#define ACC_TS_FREQ_80MHZ (80 * HZ_PER_MHZ)
#define ACC_I2C_ADDON_DETECT_DELAY_MS 10
/* esdACC Overview Module */
#define ACC_OV_OF_PROBE 0x0000
#define ACC_OV_OF_VERSION 0x0004
#define ACC_OV_OF_INFO 0x0008
#define ACC_OV_OF_CANCORE_FREQ 0x000c
#define ACC_OV_OF_TS_FREQ_LO 0x0010
#define ACC_OV_OF_TS_FREQ_HI 0x0014
#define ACC_OV_OF_IRQ_STATUS_CORES 0x0018
#define ACC_OV_OF_TS_CURR_LO 0x001c
#define ACC_OV_OF_TS_CURR_HI 0x0020
#define ACC_OV_OF_IRQ_STATUS 0x0028
#define ACC_OV_OF_MODE 0x002c
#define ACC_OV_OF_BM_IRQ_COUNTER 0x0070
#define ACC_OV_OF_BM_IRQ_MASK 0x0074
#define ACC_OV_OF_MSI_DATA 0x0080
#define ACC_OV_OF_MSI_ADDRESSOFFSET 0x0084
/* Feature flags are contained in the upper 16 bit of the version
* register at ACC_OV_OF_VERSION but only used with these masks after
* extraction into an extra variable => (xx - 16).
*/
#define ACC_OV_REG_FEAT_MASK_CANFD BIT(27 - 16)
#define ACC_OV_REG_FEAT_MASK_NEW_PSC BIT(28 - 16)
#define ACC_OV_REG_MODE_MASK_ENDIAN_LITTLE BIT(0)
#define ACC_OV_REG_MODE_MASK_BM_ENABLE BIT(1)
#define ACC_OV_REG_MODE_MASK_MODE_LED BIT(2)
#define ACC_OV_REG_MODE_MASK_TIMER_ENABLE BIT(4)
#define ACC_OV_REG_MODE_MASK_TIMER_ONE_SHOT BIT(5)
#define ACC_OV_REG_MODE_MASK_TIMER_ABSOLUTE BIT(6)
#define ACC_OV_REG_MODE_MASK_TIMER GENMASK(6, 4)
#define ACC_OV_REG_MODE_MASK_TS_SRC GENMASK(8, 7)
#define ACC_OV_REG_MODE_MASK_I2C_ENABLE BIT(11)
#define ACC_OV_REG_MODE_MASK_MSI_ENABLE BIT(14)
#define ACC_OV_REG_MODE_MASK_NEW_PSC_ENABLE BIT(15)
#define ACC_OV_REG_MODE_MASK_FPGA_RESET BIT(31)
/* esdACC CAN Core Module */
#define ACC_CORE_OF_CTRL_MODE 0x0000
#define ACC_CORE_OF_STATUS_IRQ 0x0008
#define ACC_CORE_OF_BRP 0x000c
#define ACC_CORE_OF_BTR 0x0010
#define ACC_CORE_OF_FBTR 0x0014
#define ACC_CORE_OF_STATUS 0x0030
#define ACC_CORE_OF_TXFIFO_CONFIG 0x0048
#define ACC_CORE_OF_TXFIFO_STATUS 0x004c
#define ACC_CORE_OF_TX_STATUS_IRQ 0x0050
#define ACC_CORE_OF_TX_ABORT_MASK 0x0054
#define ACC_CORE_OF_BM_IRQ_COUNTER 0x0070
#define ACC_CORE_OF_TXFIFO_ID 0x00c0
#define ACC_CORE_OF_TXFIFO_DLC 0x00c4
#define ACC_CORE_OF_TXFIFO_DATA_0 0x00c8
#define ACC_CORE_OF_TXFIFO_DATA_1 0x00cc
#define ACC_REG_CONTROL_MASK_MODE_RESETMODE BIT(0)
#define ACC_REG_CONTROL_MASK_MODE_LOM BIT(1)
#define ACC_REG_CONTROL_MASK_MODE_STM BIT(2)
#define ACC_REG_CONTROL_MASK_MODE_TRANSEN BIT(5)
#define ACC_REG_CONTROL_MASK_MODE_TS BIT(6)
#define ACC_REG_CONTROL_MASK_MODE_SCHEDULE BIT(7)
#define ACC_REG_CONTROL_MASK_IE_RXTX BIT(8)
#define ACC_REG_CONTROL_MASK_IE_TXERROR BIT(9)
#define ACC_REG_CONTROL_MASK_IE_ERRWARN BIT(10)
#define ACC_REG_CONTROL_MASK_IE_OVERRUN BIT(11)
#define ACC_REG_CONTROL_MASK_IE_TSI BIT(12)
#define ACC_REG_CONTROL_MASK_IE_ERRPASS BIT(13)
#define ACC_REG_CONTROL_MASK_IE_ALI BIT(14)
#define ACC_REG_CONTROL_MASK_IE_BUSERR BIT(15)
/* BRP and BTR register layout for CAN-Classic version */
#define ACC_REG_BRP_CL_MASK_BRP GENMASK(8, 0)
#define ACC_REG_BTR_CL_MASK_TSEG1 GENMASK(3, 0)
#define ACC_REG_BTR_CL_MASK_TSEG2 GENMASK(18, 16)
#define ACC_REG_BTR_CL_MASK_SJW GENMASK(25, 24)
/* BRP and BTR register layout for CAN-FD version */
#define ACC_REG_BRP_FD_MASK_BRP GENMASK(7, 0)
#define ACC_REG_BTR_FD_MASK_TSEG1 GENMASK(7, 0)
#define ACC_REG_BTR_FD_MASK_TSEG2 GENMASK(22, 16)
#define ACC_REG_BTR_FD_MASK_SJW GENMASK(30, 24)
/* 256 BM_MSGs of 32 byte size */
#define ACC_CORE_DMAMSG_SIZE 32U
#define ACC_CORE_DMABUF_SIZE (256U * ACC_CORE_DMAMSG_SIZE)
enum acc_bmmsg_id {
BM_MSG_ID_RXTXDONE = 0x01,
BM_MSG_ID_TXABORT = 0x02,
BM_MSG_ID_OVERRUN = 0x03,
BM_MSG_ID_BUSERR = 0x04,
BM_MSG_ID_ERRPASSIVE = 0x05,
BM_MSG_ID_ERRWARN = 0x06,
BM_MSG_ID_TIMESLICE = 0x07,
BM_MSG_ID_HWTIMER = 0x08,
BM_MSG_ID_HOTPLUG = 0x09,
};
/* The struct acc_bmmsg_* structure declarations that follow here provide
* access to the ring buffer of bus master messages maintained by the FPGA
* bus master engine. All bus master messages have the same size of
* ACC_CORE_DMAMSG_SIZE and a minimum alignment of ACC_CORE_DMAMSG_SIZE in
* memory.
*
* All structure members are natural aligned. Therefore we should not need
* a __packed attribute. All struct acc_bmmsg_* declarations have at least
* reserved* members to fill the structure to the full ACC_CORE_DMAMSG_SIZE.
*
* A failure of this property due padding will be detected at compile time
* by static_assert(sizeof(union acc_bmmsg) == ACC_CORE_DMAMSG_SIZE).
*/
struct acc_bmmsg_rxtxdone {
u8 msg_id;
u8 txfifo_level;
u8 reserved1[2];
u8 txtsfifo_level;
u8 reserved2[3];
u32 id;
struct {
u8 len;
u8 txdfifo_idx;
u8 zeroes8;
u8 reserved;
} acc_dlc;
u8 data[CAN_MAX_DLEN];
/* Time stamps in struct acc_ov::timestamp_frequency ticks. */
u64 ts;
};
struct acc_bmmsg_txabort {
u8 msg_id;
u8 txfifo_level;
u16 abort_mask;
u8 txtsfifo_level;
u8 reserved2[1];
u16 abort_mask_txts;
u64 ts;
u32 reserved3[4];
};
struct acc_bmmsg_overrun {
u8 msg_id;
u8 txfifo_level;
u8 lost_cnt;
u8 reserved1;
u8 txtsfifo_level;
u8 reserved2[3];
u64 ts;
u32 reserved3[4];
};
struct acc_bmmsg_buserr {
u8 msg_id;
u8 txfifo_level;
u8 ecc;
u8 reserved1;
u8 txtsfifo_level;
u8 reserved2[3];
u64 ts;
u32 reg_status;
u32 reg_btr;
u32 reserved3[2];
};
struct acc_bmmsg_errstatechange {
u8 msg_id;
u8 txfifo_level;
u8 reserved1[2];
u8 txtsfifo_level;
u8 reserved2[3];
u64 ts;
u32 reg_status;
u32 reserved3[3];
};
struct acc_bmmsg_timeslice {
u8 msg_id;
u8 txfifo_level;
u8 reserved1[2];
u8 txtsfifo_level;
u8 reserved2[3];
u64 ts;
u32 reserved3[4];
};
struct acc_bmmsg_hwtimer {
u8 msg_id;
u8 reserved1[3];
u32 reserved2[1];
u64 timer;
u32 reserved3[4];
};
struct acc_bmmsg_hotplug {
u8 msg_id;
u8 reserved1[3];
u32 reserved2[7];
};
union acc_bmmsg {
u8 msg_id;
struct acc_bmmsg_rxtxdone rxtxdone;
struct acc_bmmsg_txabort txabort;
struct acc_bmmsg_overrun overrun;
struct acc_bmmsg_buserr buserr;
struct acc_bmmsg_errstatechange errstatechange;
struct acc_bmmsg_timeslice timeslice;
struct acc_bmmsg_hwtimer hwtimer;
};
/* Check size of union acc_bmmsg to be of expected size. */
static_assert(sizeof(union acc_bmmsg) == ACC_CORE_DMAMSG_SIZE);
struct acc_bmfifo {
const union acc_bmmsg *messages;
/* irq_cnt points to an u32 value where the esdACC FPGA deposits
* the bm_fifo head index in coherent DMA memory. Only bits 7..0
* are valid. Use READ_ONCE() to access this memory location.
*/
const u32 *irq_cnt;
u32 local_irq_cnt;
u32 msg_fifo_tail;
};
struct acc_core {
void __iomem *addr;
struct net_device *netdev;
struct acc_bmfifo bmfifo;
u8 tx_fifo_size;
u8 tx_fifo_head;
u8 tx_fifo_tail;
};
struct acc_ov {
void __iomem *addr;
struct acc_bmfifo bmfifo;
u32 timestamp_frequency;
u32 core_frequency;
u16 version;
u16 features;
u8 total_cores;
u8 active_cores;
};
struct acc_net_priv {
struct can_priv can; /* must be the first member! */
struct acc_core *core;
struct acc_ov *ov;
};
static inline u32 acc_read32(struct acc_core *core, unsigned short offs)
{
return ioread32be(core->addr + offs);
}
static inline void acc_write32(struct acc_core *core,
unsigned short offs, u32 v)
{
iowrite32be(v, core->addr + offs);
}
static inline void acc_write32_noswap(struct acc_core *core,
unsigned short offs, u32 v)
{
iowrite32(v, core->addr + offs);
}
static inline void acc_set_bits(struct acc_core *core,
unsigned short offs, u32 mask)
{
u32 v = acc_read32(core, offs);
v |= mask;
acc_write32(core, offs, v);
}
static inline void acc_clear_bits(struct acc_core *core,
unsigned short offs, u32 mask)
{
u32 v = acc_read32(core, offs);
v &= ~mask;
acc_write32(core, offs, v);
}
static inline int acc_resetmode_entered(struct acc_core *core)
{
u32 ctrl = acc_read32(core, ACC_CORE_OF_CTRL_MODE);
return (ctrl & ACC_REG_CONTROL_MASK_MODE_RESETMODE) != 0;
}
static inline u32 acc_ov_read32(struct acc_ov *ov, unsigned short offs)
{
return ioread32be(ov->addr + offs);
}
static inline void acc_ov_write32(struct acc_ov *ov,
unsigned short offs, u32 v)
{
iowrite32be(v, ov->addr + offs);
}
static inline void acc_ov_set_bits(struct acc_ov *ov,
unsigned short offs, u32 b)
{
u32 v = acc_ov_read32(ov, offs);
v |= b;
acc_ov_write32(ov, offs, v);
}
static inline void acc_ov_clear_bits(struct acc_ov *ov,
unsigned short offs, u32 b)
{
u32 v = acc_ov_read32(ov, offs);
v &= ~b;
acc_ov_write32(ov, offs, v);
}
static inline void acc_reset_fpga(struct acc_ov *ov)
{
acc_ov_write32(ov, ACC_OV_OF_MODE, ACC_OV_REG_MODE_MASK_FPGA_RESET);
/* (Re-)start and wait for completion of addon detection on the I^2C bus */
acc_ov_set_bits(ov, ACC_OV_OF_MODE, ACC_OV_REG_MODE_MASK_I2C_ENABLE);
mdelay(ACC_I2C_ADDON_DETECT_DELAY_MS);
}
void acc_init_ov(struct acc_ov *ov, struct device *dev);
void acc_init_bm_ptr(struct acc_ov *ov, struct acc_core *cores,
const void *mem);
int acc_open(struct net_device *netdev);
int acc_close(struct net_device *netdev);
netdev_tx_t acc_start_xmit(struct sk_buff *skb, struct net_device *netdev);
int acc_get_berr_counter(const struct net_device *netdev,
struct can_berr_counter *bec);
int acc_set_mode(struct net_device *netdev, enum can_mode mode);
int acc_set_bittiming(struct net_device *netdev);
irqreturn_t acc_card_interrupt(struct acc_ov *ov, struct acc_core *cores);
......@@ -47,12 +47,18 @@ MODULE_DESCRIPTION("CAN driver for Kvaser CAN/PCIe devices");
#define KVASER_PCIEFD_MINIPCIE_2CAN_V3_DEVICE_ID 0x0015
#define KVASER_PCIEFD_MINIPCIE_1CAN_V3_DEVICE_ID 0x0016
/* Xilinx based devices */
#define KVASER_PCIEFD_M2_4CAN_DEVICE_ID 0x0017
/* Altera SerDes Enable 64-bit DMA address translation */
#define KVASER_PCIEFD_ALTERA_DMA_64BIT BIT(0)
/* SmartFusion2 SerDes LSB address translation mask */
#define KVASER_PCIEFD_SF2_DMA_LSB_MASK GENMASK(31, 12)
/* Xilinx SerDes LSB address translation mask */
#define KVASER_PCIEFD_XILINX_DMA_LSB_MASK GENMASK(31, 12)
/* Kvaser KCAN CAN controller registers */
#define KVASER_PCIEFD_KCAN_FIFO_REG 0x100
#define KVASER_PCIEFD_KCAN_FIFO_LAST_REG 0x180
......@@ -281,6 +287,8 @@ static void kvaser_pciefd_write_dma_map_altera(struct kvaser_pciefd *pcie,
dma_addr_t addr, int index);
static void kvaser_pciefd_write_dma_map_sf2(struct kvaser_pciefd *pcie,
dma_addr_t addr, int index);
static void kvaser_pciefd_write_dma_map_xilinx(struct kvaser_pciefd *pcie,
dma_addr_t addr, int index);
struct kvaser_pciefd_address_offset {
u32 serdes;
......@@ -335,6 +343,18 @@ static const struct kvaser_pciefd_address_offset kvaser_pciefd_sf2_address_offse
.kcan_ch1 = 0x142000,
};
static const struct kvaser_pciefd_address_offset kvaser_pciefd_xilinx_address_offset = {
.serdes = 0x00208,
.pci_ien = 0x102004,
.pci_irq = 0x102008,
.sysid = 0x100000,
.loopback = 0x103000,
.kcan_srb_fifo = 0x120000,
.kcan_srb = 0x121000,
.kcan_ch0 = 0x140000,
.kcan_ch1 = 0x142000,
};
static const struct kvaser_pciefd_irq_mask kvaser_pciefd_altera_irq_mask = {
.kcan_rx0 = BIT(4),
.kcan_tx = { BIT(0), BIT(1), BIT(2), BIT(3) },
......@@ -347,6 +367,12 @@ static const struct kvaser_pciefd_irq_mask kvaser_pciefd_sf2_irq_mask = {
.all = GENMASK(19, 16) | BIT(4),
};
static const struct kvaser_pciefd_irq_mask kvaser_pciefd_xilinx_irq_mask = {
.kcan_rx0 = BIT(4),
.kcan_tx = { BIT(16), BIT(17), BIT(18), BIT(19) },
.all = GENMASK(19, 16) | BIT(4),
};
static const struct kvaser_pciefd_dev_ops kvaser_pciefd_altera_dev_ops = {
.kvaser_pciefd_write_dma_map = kvaser_pciefd_write_dma_map_altera,
};
......@@ -355,6 +381,10 @@ static const struct kvaser_pciefd_dev_ops kvaser_pciefd_sf2_dev_ops = {
.kvaser_pciefd_write_dma_map = kvaser_pciefd_write_dma_map_sf2,
};
static const struct kvaser_pciefd_dev_ops kvaser_pciefd_xilinx_dev_ops = {
.kvaser_pciefd_write_dma_map = kvaser_pciefd_write_dma_map_xilinx,
};
static const struct kvaser_pciefd_driver_data kvaser_pciefd_altera_driver_data = {
.address_offset = &kvaser_pciefd_altera_address_offset,
.irq_mask = &kvaser_pciefd_altera_irq_mask,
......@@ -367,6 +397,12 @@ static const struct kvaser_pciefd_driver_data kvaser_pciefd_sf2_driver_data = {
.ops = &kvaser_pciefd_sf2_dev_ops,
};
static const struct kvaser_pciefd_driver_data kvaser_pciefd_xilinx_driver_data = {
.address_offset = &kvaser_pciefd_xilinx_address_offset,
.irq_mask = &kvaser_pciefd_xilinx_irq_mask,
.ops = &kvaser_pciefd_xilinx_dev_ops,
};
struct kvaser_pciefd_can {
struct can_priv can;
struct kvaser_pciefd *kv_pcie;
......@@ -456,6 +492,10 @@ static struct pci_device_id kvaser_pciefd_id_table[] = {
PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_MINIPCIE_1CAN_V3_DEVICE_ID),
.driver_data = (kernel_ulong_t)&kvaser_pciefd_sf2_driver_data,
},
{
PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_M2_4CAN_DEVICE_ID),
.driver_data = (kernel_ulong_t)&kvaser_pciefd_xilinx_driver_data,
},
{
0,
},
......@@ -1035,6 +1075,21 @@ static void kvaser_pciefd_write_dma_map_sf2(struct kvaser_pciefd *pcie,
iowrite32(msb, serdes_base + 0x4);
}
static void kvaser_pciefd_write_dma_map_xilinx(struct kvaser_pciefd *pcie,
dma_addr_t addr, int index)
{
void __iomem *serdes_base;
u32 lsb = addr & KVASER_PCIEFD_XILINX_DMA_LSB_MASK;
u32 msb = 0x0;
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
msb = addr >> 32;
#endif
serdes_base = KVASER_PCIEFD_SERDES_ADDR(pcie) + 0x8 * index;
iowrite32(msb, serdes_base);
iowrite32(lsb, serdes_base + 0x4);
}
static int kvaser_pciefd_setup_dma(struct kvaser_pciefd *pcie)
{
int i;
......
This diff is collapsed.
......@@ -70,6 +70,13 @@ struct m_can_ops {
int (*init)(struct m_can_classdev *cdev);
};
struct m_can_tx_op {
struct m_can_classdev *cdev;
struct work_struct work;
struct sk_buff *skb;
bool submit;
};
struct m_can_classdev {
struct can_priv can;
struct can_rx_offload offload;
......@@ -80,10 +87,10 @@ struct m_can_classdev {
struct clk *cclk;
struct workqueue_struct *tx_wq;
struct work_struct tx_work;
struct sk_buff *tx_skb;
struct phy *transceiver;
ktime_t irq_timer_wait;
struct m_can_ops *ops;
int version;
......@@ -92,6 +99,29 @@ struct m_can_classdev {
int pm_clock_support;
int is_peripheral;
// Cached M_CAN_IE register content
u32 active_interrupts;
u32 rx_max_coalesced_frames_irq;
u32 rx_coalesce_usecs_irq;
u32 tx_max_coalesced_frames;
u32 tx_max_coalesced_frames_irq;
u32 tx_coalesce_usecs_irq;
// Store this internally to avoid fetch delays on peripheral chips
u32 tx_fifo_putidx;
/* Protects shared state between start_xmit and m_can_isr */
spinlock_t tx_handling_spinlock;
int tx_fifo_in_flight;
struct m_can_tx_op *tx_ops;
int tx_fifo_size;
int next_tx_op;
int nr_txs_without_submit;
/* bitfield of fifo elements that will be submitted together */
u32 tx_peripheral_submit;
struct mram_cfg mcfg[MRAM_CFG_NUM];
struct hrtimer hrtimer;
......
......@@ -109,10 +109,6 @@ static int m_can_plat_probe(struct platform_device *pdev)
ret = irq;
goto probe_fail;
}
} else {
dev_dbg(mcan_class->dev, "Polling enabled, initialize hrtimer");
hrtimer_init(&mcan_class->hrtimer, CLOCK_MONOTONIC,
HRTIMER_MODE_REL_PINNED);
}
/* message ram could be shared */
......
......@@ -436,7 +436,7 @@ int softing_startstop(struct net_device *dev, int up)
return ret;
bus_bitmask_start = 0;
if (dev && up)
if (up)
/* prepare to start this bus as well */
bus_bitmask_start |= (1 << priv->index);
/* bring netdevs down */
......
......@@ -193,9 +193,14 @@ struct canfd_frame {
#define CANXL_XLF 0x80 /* mandatory CAN XL frame flag (must always be set!) */
#define CANXL_SEC 0x01 /* Simple Extended Content (security/segmentation) */
/* the 8-bit VCID is optionally placed in the canxl_frame.prio element */
#define CANXL_VCID_OFFSET 16 /* bit offset of VCID in prio element */
#define CANXL_VCID_VAL_MASK 0xFFUL /* VCID is an 8-bit value */
#define CANXL_VCID_MASK (CANXL_VCID_VAL_MASK << CANXL_VCID_OFFSET)
/**
* struct canxl_frame - CAN with e'X'tended frame 'L'ength frame structure
* @prio: 11 bit arbitration priority with zero'ed CAN_*_FLAG flags
* @prio: 11 bit arbitration priority with zero'ed CAN_*_FLAG flags / VCID
* @flags: additional flags for CAN XL
* @sdt: SDU (service data unit) type
* @len: frame payload length in byte (CANXL_MIN_DLEN .. CANXL_MAX_DLEN)
......@@ -205,7 +210,7 @@ struct canfd_frame {
* @prio shares the same position as @can_id from struct can[fd]_frame.
*/
struct canxl_frame {
canid_t prio; /* 11 bit priority for arbitration (canid_t) */
canid_t prio; /* 11 bit priority for arbitration / 8 bit VCID */
__u8 flags; /* additional flags for CAN XL */
__u8 sdt; /* SDU (service data unit) type */
__u16 len; /* frame payload length in byte */
......
......@@ -137,6 +137,7 @@ struct can_isotp_ll_options {
#define CAN_ISOTP_WAIT_TX_DONE 0x0400 /* wait for tx completion */
#define CAN_ISOTP_SF_BROADCAST 0x0800 /* 1-to-N functional addressing */
#define CAN_ISOTP_CF_BROADCAST 0x1000 /* 1-to-N transmission w/o FC */
#define CAN_ISOTP_DYN_FC_PARMS 0x2000 /* dynamic FC parameters BS/STmin */
/* protocol machine default values */
......
......@@ -65,6 +65,22 @@ enum {
CAN_RAW_FD_FRAMES, /* allow CAN FD frames (default:off) */
CAN_RAW_JOIN_FILTERS, /* all filters must match to trigger */
CAN_RAW_XL_FRAMES, /* allow CAN XL frames (default:off) */
CAN_RAW_XL_VCID_OPTS, /* CAN XL VCID configuration options */
};
/* configuration for CAN XL virtual CAN identifier (VCID) handling */
struct can_raw_vcid_options {
__u8 flags; /* flags for vcid (filter) behaviour */
__u8 tx_vcid; /* VCID value set into canxl_frame.prio */
__u8 rx_vcid; /* VCID value for VCID filter */
__u8 rx_vcid_mask; /* VCID mask for VCID filter */
};
/* can_raw_vcid_options.flags for CAN XL virtual CAN identifier handling */
#define CAN_RAW_XL_VCID_TX_SET 0x01
#define CAN_RAW_XL_VCID_TX_PASS 0x02
#define CAN_RAW_XL_VCID_RX_FILTER 0x04
#endif /* !_UAPI_CAN_RAW_H */
......@@ -865,6 +865,8 @@ static __init int can_init(void)
/* check for correct padding to be able to use the structs similarly */
BUILD_BUG_ON(offsetof(struct can_frame, len) !=
offsetof(struct canfd_frame, len) ||
offsetof(struct can_frame, len) !=
offsetof(struct canxl_frame, flags) ||
offsetof(struct can_frame, data) !=
offsetof(struct canfd_frame, data));
......
......@@ -72,9 +72,11 @@
#define BCM_TIMER_SEC_MAX (400 * 24 * 60 * 60)
/* use of last_frames[index].flags */
#define RX_LOCAL 0x10 /* frame was created on the local host */
#define RX_OWN 0x20 /* frame was sent via the socket it was received on */
#define RX_RECV 0x40 /* received data for this element */
#define RX_THR 0x80 /* element not been sent due to throttle feature */
#define BCM_CAN_FLAGS_MASK 0x3F /* to clean private flags after usage */
#define BCM_CAN_FLAGS_MASK 0x0F /* to clean private flags after usage */
/* get best masking value for can_rx_register() for a given single can_id */
#define REGMASK(id) ((id & CAN_EFF_FLAG) ? \
......@@ -138,6 +140,16 @@ static LIST_HEAD(bcm_notifier_list);
static DEFINE_SPINLOCK(bcm_notifier_lock);
static struct bcm_sock *bcm_busy_notifier;
/* Return pointer to store the extra msg flags for bcm_recvmsg().
* We use the space of one unsigned int beyond the 'struct sockaddr_can'
* in skb->cb.
*/
static inline unsigned int *bcm_flags(struct sk_buff *skb)
{
/* return pointer after struct sockaddr_can */
return (unsigned int *)(&((struct sockaddr_can *)skb->cb)[1]);
}
static inline struct bcm_sock *bcm_sk(const struct sock *sk)
{
return (struct bcm_sock *)sk;
......@@ -325,6 +337,7 @@ static void bcm_send_to_user(struct bcm_op *op, struct bcm_msg_head *head,
struct sock *sk = op->sk;
unsigned int datalen = head->nframes * op->cfsiz;
int err;
unsigned int *pflags;
skb = alloc_skb(sizeof(*head) + datalen, gfp_any());
if (!skb)
......@@ -332,6 +345,14 @@ static void bcm_send_to_user(struct bcm_op *op, struct bcm_msg_head *head,
skb_put_data(skb, head, sizeof(*head));
/* ensure space for sockaddr_can and msg flags */
sock_skb_cb_check_size(sizeof(struct sockaddr_can) +
sizeof(unsigned int));
/* initialize msg flags */
pflags = bcm_flags(skb);
*pflags = 0;
if (head->nframes) {
/* CAN frames starting here */
firstframe = (struct canfd_frame *)skb_tail_pointer(skb);
......@@ -344,9 +365,15 @@ static void bcm_send_to_user(struct bcm_op *op, struct bcm_msg_head *head,
* relevant for updates that are generated by the
* BCM, where nframes is 1
*/
if (head->nframes == 1)
if (head->nframes == 1) {
if (firstframe->flags & RX_LOCAL)
*pflags |= MSG_DONTROUTE;
if (firstframe->flags & RX_OWN)
*pflags |= MSG_CONFIRM;
firstframe->flags &= BCM_CAN_FLAGS_MASK;
}
}
if (has_timestamp) {
/* restore rx timestamp */
......@@ -360,7 +387,6 @@ static void bcm_send_to_user(struct bcm_op *op, struct bcm_msg_head *head,
* containing the interface index.
*/
sock_skb_cb_check_size(sizeof(struct sockaddr_can));
addr = (struct sockaddr_can *)skb->cb;
memset(addr, 0, sizeof(*addr));
addr->can_family = AF_CAN;
......@@ -444,7 +470,7 @@ static void bcm_rx_changed(struct bcm_op *op, struct canfd_frame *data)
op->frames_filtered = op->frames_abs = 0;
/* this element is not throttled anymore */
data->flags &= (BCM_CAN_FLAGS_MASK|RX_RECV);
data->flags &= ~RX_THR;
memset(&head, 0, sizeof(head));
head.opcode = RX_CHANGED;
......@@ -465,13 +491,17 @@ static void bcm_rx_changed(struct bcm_op *op, struct canfd_frame *data)
*/
static void bcm_rx_update_and_send(struct bcm_op *op,
struct canfd_frame *lastdata,
const struct canfd_frame *rxdata)
const struct canfd_frame *rxdata,
unsigned char traffic_flags)
{
memcpy(lastdata, rxdata, op->cfsiz);
/* mark as used and throttled by default */
lastdata->flags |= (RX_RECV|RX_THR);
/* add own/local/remote traffic flags */
lastdata->flags |= traffic_flags;
/* throttling mode inactive ? */
if (!op->kt_ival2) {
/* send RX_CHANGED to the user immediately */
......@@ -508,7 +538,8 @@ static void bcm_rx_update_and_send(struct bcm_op *op,
* received data stored in op->last_frames[]
*/
static void bcm_rx_cmp_to_index(struct bcm_op *op, unsigned int index,
const struct canfd_frame *rxdata)
const struct canfd_frame *rxdata,
unsigned char traffic_flags)
{
struct canfd_frame *cf = op->frames + op->cfsiz * index;
struct canfd_frame *lcf = op->last_frames + op->cfsiz * index;
......@@ -521,7 +552,7 @@ static void bcm_rx_cmp_to_index(struct bcm_op *op, unsigned int index,
if (!(lcf->flags & RX_RECV)) {
/* received data for the first time => send update to user */
bcm_rx_update_and_send(op, lcf, rxdata);
bcm_rx_update_and_send(op, lcf, rxdata, traffic_flags);
return;
}
......@@ -529,7 +560,7 @@ static void bcm_rx_cmp_to_index(struct bcm_op *op, unsigned int index,
for (i = 0; i < rxdata->len; i += 8) {
if ((get_u64(cf, i) & get_u64(rxdata, i)) !=
(get_u64(cf, i) & get_u64(lcf, i))) {
bcm_rx_update_and_send(op, lcf, rxdata);
bcm_rx_update_and_send(op, lcf, rxdata, traffic_flags);
return;
}
}
......@@ -537,7 +568,7 @@ static void bcm_rx_cmp_to_index(struct bcm_op *op, unsigned int index,
if (op->flags & RX_CHECK_DLC) {
/* do a real check in CAN frame length */
if (rxdata->len != lcf->len) {
bcm_rx_update_and_send(op, lcf, rxdata);
bcm_rx_update_and_send(op, lcf, rxdata, traffic_flags);
return;
}
}
......@@ -644,6 +675,7 @@ static void bcm_rx_handler(struct sk_buff *skb, void *data)
struct bcm_op *op = (struct bcm_op *)data;
const struct canfd_frame *rxframe = (struct canfd_frame *)skb->data;
unsigned int i;
unsigned char traffic_flags;
if (op->can_id != rxframe->can_id)
return;
......@@ -673,15 +705,24 @@ static void bcm_rx_handler(struct sk_buff *skb, void *data)
return;
}
/* compute flags to distinguish between own/local/remote CAN traffic */
traffic_flags = 0;
if (skb->sk) {
traffic_flags |= RX_LOCAL;
if (skb->sk == op->sk)
traffic_flags |= RX_OWN;
}
if (op->flags & RX_FILTER_ID) {
/* the easiest case */
bcm_rx_update_and_send(op, op->last_frames, rxframe);
bcm_rx_update_and_send(op, op->last_frames, rxframe,
traffic_flags);
goto rx_starttimer;
}
if (op->nframes == 1) {
/* simple compare with index 0 */
bcm_rx_cmp_to_index(op, 0, rxframe);
bcm_rx_cmp_to_index(op, 0, rxframe, traffic_flags);
goto rx_starttimer;
}
......@@ -698,7 +739,8 @@ static void bcm_rx_handler(struct sk_buff *skb, void *data)
if ((get_u64(op->frames, 0) & get_u64(rxframe, 0)) ==
(get_u64(op->frames, 0) &
get_u64(op->frames + op->cfsiz * i, 0))) {
bcm_rx_cmp_to_index(op, i, rxframe);
bcm_rx_cmp_to_index(op, i, rxframe,
traffic_flags);
break;
}
}
......@@ -1675,6 +1717,9 @@ static int bcm_recvmsg(struct socket *sock, struct msghdr *msg, size_t size,
memcpy(msg->msg_name, skb->cb, msg->msg_namelen);
}
/* assign the flags that have been recorded in bcm_send_to_user() */
msg->msg_flags |= *(bcm_flags(skb));
skb_free_datagram(sk, skb);
return size;
......
......@@ -381,8 +381,9 @@ static int isotp_rcv_fc(struct isotp_sock *so, struct canfd_frame *cf, int ae)
return 1;
}
/* get communication parameters only from the first FC frame */
if (so->tx.state == ISOTP_WAIT_FIRST_FC) {
/* get static/dynamic communication params from first/every FC frame */
if (so->tx.state == ISOTP_WAIT_FIRST_FC ||
so->opt.flags & CAN_ISOTP_DYN_FC_PARMS) {
so->txfc.bs = cf->data[ae + 1];
so->txfc.stmin = cf->data[ae + 2];
......
......@@ -91,6 +91,10 @@ struct raw_sock {
int recv_own_msgs;
int fd_frames;
int xl_frames;
struct can_raw_vcid_options raw_vcid_opts;
canid_t tx_vcid_shifted;
canid_t rx_vcid_shifted;
canid_t rx_vcid_mask_shifted;
int join_filters;
int count; /* number of active filters */
struct can_filter dfilter; /* default/single filter */
......@@ -134,10 +138,29 @@ static void raw_rcv(struct sk_buff *oskb, void *data)
return;
/* make sure to not pass oversized frames to the socket */
if ((!ro->fd_frames && can_is_canfd_skb(oskb)) ||
(!ro->xl_frames && can_is_canxl_skb(oskb)))
if (!ro->fd_frames && can_is_canfd_skb(oskb))
return;
if (can_is_canxl_skb(oskb)) {
struct canxl_frame *cxl = (struct canxl_frame *)oskb->data;
/* make sure to not pass oversized frames to the socket */
if (!ro->xl_frames)
return;
/* filter CAN XL VCID content */
if (ro->raw_vcid_opts.flags & CAN_RAW_XL_VCID_RX_FILTER) {
/* apply VCID filter if user enabled the filter */
if ((cxl->prio & ro->rx_vcid_mask_shifted) !=
(ro->rx_vcid_shifted & ro->rx_vcid_mask_shifted))
return;
} else {
/* no filter => do not forward VCID tagged frames */
if (cxl->prio & CANXL_VCID_MASK)
return;
}
}
/* eliminate multiple filter matches for the same skb */
if (this_cpu_ptr(ro->uniq)->skb == oskb &&
this_cpu_ptr(ro->uniq)->skbcnt == can_skb_prv(oskb)->skbcnt) {
......@@ -698,6 +721,19 @@ static int raw_setsockopt(struct socket *sock, int level, int optname,
ro->fd_frames = ro->xl_frames;
break;
case CAN_RAW_XL_VCID_OPTS:
if (optlen != sizeof(ro->raw_vcid_opts))
return -EINVAL;
if (copy_from_sockptr(&ro->raw_vcid_opts, optval, optlen))
return -EFAULT;
/* prepare 32 bit values for handling in hot path */
ro->tx_vcid_shifted = ro->raw_vcid_opts.tx_vcid << CANXL_VCID_OFFSET;
ro->rx_vcid_shifted = ro->raw_vcid_opts.rx_vcid << CANXL_VCID_OFFSET;
ro->rx_vcid_mask_shifted = ro->raw_vcid_opts.rx_vcid_mask << CANXL_VCID_OFFSET;
break;
case CAN_RAW_JOIN_FILTERS:
if (optlen != sizeof(ro->join_filters))
return -EINVAL;
......@@ -786,6 +822,21 @@ static int raw_getsockopt(struct socket *sock, int level, int optname,
val = &ro->xl_frames;
break;
case CAN_RAW_XL_VCID_OPTS:
/* user space buffer to small for VCID opts? */
if (len < sizeof(ro->raw_vcid_opts)) {
/* return -ERANGE and needed space in optlen */
err = -ERANGE;
if (put_user(sizeof(ro->raw_vcid_opts), optlen))
err = -EFAULT;
} else {
if (len > sizeof(ro->raw_vcid_opts))
len = sizeof(ro->raw_vcid_opts);
if (copy_to_user(optval, &ro->raw_vcid_opts, len))
err = -EFAULT;
}
break;
case CAN_RAW_JOIN_FILTERS:
if (len > sizeof(int))
len = sizeof(int);
......@@ -803,23 +854,41 @@ static int raw_getsockopt(struct socket *sock, int level, int optname,
return 0;
}
static bool raw_bad_txframe(struct raw_sock *ro, struct sk_buff *skb, int mtu)
static void raw_put_canxl_vcid(struct raw_sock *ro, struct sk_buff *skb)
{
struct canxl_frame *cxl = (struct canxl_frame *)skb->data;
/* sanitize non CAN XL bits */
cxl->prio &= (CANXL_PRIO_MASK | CANXL_VCID_MASK);
/* clear VCID in CAN XL frame if pass through is disabled */
if (!(ro->raw_vcid_opts.flags & CAN_RAW_XL_VCID_TX_PASS))
cxl->prio &= CANXL_PRIO_MASK;
/* set VCID in CAN XL frame if enabled */
if (ro->raw_vcid_opts.flags & CAN_RAW_XL_VCID_TX_SET) {
cxl->prio &= CANXL_PRIO_MASK;
cxl->prio |= ro->tx_vcid_shifted;
}
}
static unsigned int raw_check_txframe(struct raw_sock *ro, struct sk_buff *skb, int mtu)
{
/* Classical CAN -> no checks for flags and device capabilities */
if (can_is_can_skb(skb))
return false;
return CAN_MTU;
/* CAN FD -> needs to be enabled and a CAN FD or CAN XL device */
if (ro->fd_frames && can_is_canfd_skb(skb) &&
(mtu == CANFD_MTU || can_is_canxl_dev_mtu(mtu)))
return false;
return CANFD_MTU;
/* CAN XL -> needs to be enabled and a CAN XL device */
if (ro->xl_frames && can_is_canxl_skb(skb) &&
can_is_canxl_dev_mtu(mtu))
return false;
return CANXL_MTU;
return true;
return 0;
}
static int raw_sendmsg(struct socket *sock, struct msghdr *msg, size_t size)
......@@ -829,6 +898,7 @@ static int raw_sendmsg(struct socket *sock, struct msghdr *msg, size_t size)
struct sockcm_cookie sockc;
struct sk_buff *skb;
struct net_device *dev;
unsigned int txmtu;
int ifindex;
int err = -EINVAL;
......@@ -869,9 +939,16 @@ static int raw_sendmsg(struct socket *sock, struct msghdr *msg, size_t size)
goto free_skb;
err = -EINVAL;
if (raw_bad_txframe(ro, skb, dev->mtu))
/* check for valid CAN (CC/FD/XL) frame content */
txmtu = raw_check_txframe(ro, skb, dev->mtu);
if (!txmtu)
goto free_skb;
/* only CANXL: clear/forward/set VCID value */
if (txmtu == CANXL_MTU)
raw_put_canxl_vcid(ro, skb);
sockcm_init(&sockc, sk);
if (msg->msg_controllen) {
err = sock_cmsg_send(sk, msg, &sockc);
......
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