Commit e1eb97c2 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Tvrtko Ursulin

drm/i915: Shadow default engine context image in the context

To enable adding override of the default engine context image let us start
shadowing the per engine state in the context.
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Carlos Santa <carlos.santa@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarTvrtko Ursulin <tursulin@igalia.com>
Signed-off-by: default avatarTvrtko Ursulin <tursulin@ursulin.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20240514145939.87427-1-tursulin@igalia.com
parent 60a2f25d
...@@ -99,6 +99,8 @@ struct intel_context { ...@@ -99,6 +99,8 @@ struct intel_context {
struct i915_address_space *vm; struct i915_address_space *vm;
struct i915_gem_context __rcu *gem_context; struct i915_gem_context __rcu *gem_context;
struct file *default_state;
/* /*
* @signal_lock protects the list of requests that need signaling, * @signal_lock protects the list of requests that need signaling,
* @signals. While there are any requests that need signaling, * @signals. While there are any requests that need signaling,
......
...@@ -1017,9 +1017,8 @@ void lrc_init_state(struct intel_context *ce, ...@@ -1017,9 +1017,8 @@ void lrc_init_state(struct intel_context *ce,
set_redzone(state, engine); set_redzone(state, engine);
if (engine->default_state) { if (ce->default_state) {
shmem_read(engine->default_state, 0, shmem_read(ce->default_state, 0, state, engine->context_size);
state, engine->context_size);
__set_bit(CONTEXT_VALID_BIT, &ce->flags); __set_bit(CONTEXT_VALID_BIT, &ce->flags);
inhibit = false; inhibit = false;
} }
...@@ -1131,6 +1130,8 @@ int lrc_alloc(struct intel_context *ce, struct intel_engine_cs *engine) ...@@ -1131,6 +1130,8 @@ int lrc_alloc(struct intel_context *ce, struct intel_engine_cs *engine)
GEM_BUG_ON(ce->state); GEM_BUG_ON(ce->state);
ce->default_state = engine->default_state;
vma = __lrc_alloc_state(ce, engine); vma = __lrc_alloc_state(ce, engine);
if (IS_ERR(vma)) if (IS_ERR(vma))
return PTR_ERR(vma); return PTR_ERR(vma);
......
...@@ -474,8 +474,7 @@ static int ring_context_init_default_state(struct intel_context *ce, ...@@ -474,8 +474,7 @@ static int ring_context_init_default_state(struct intel_context *ce,
if (IS_ERR(vaddr)) if (IS_ERR(vaddr))
return PTR_ERR(vaddr); return PTR_ERR(vaddr);
shmem_read(ce->engine->default_state, 0, shmem_read(ce->default_state, 0, vaddr, ce->engine->context_size);
vaddr, ce->engine->context_size);
i915_gem_object_flush_map(obj); i915_gem_object_flush_map(obj);
__i915_gem_object_release_map(obj); __i915_gem_object_release_map(obj);
...@@ -491,7 +490,7 @@ static int ring_context_pre_pin(struct intel_context *ce, ...@@ -491,7 +490,7 @@ static int ring_context_pre_pin(struct intel_context *ce,
struct i915_address_space *vm; struct i915_address_space *vm;
int err = 0; int err = 0;
if (ce->engine->default_state && if (ce->default_state &&
!test_bit(CONTEXT_VALID_BIT, &ce->flags)) { !test_bit(CONTEXT_VALID_BIT, &ce->flags)) {
err = ring_context_init_default_state(ce, ww); err = ring_context_init_default_state(ce, ww);
if (err) if (err)
...@@ -570,6 +569,8 @@ static int ring_context_alloc(struct intel_context *ce) ...@@ -570,6 +569,8 @@ static int ring_context_alloc(struct intel_context *ce)
{ {
struct intel_engine_cs *engine = ce->engine; struct intel_engine_cs *engine = ce->engine;
ce->default_state = engine->default_state;
/* One ringbuffer to rule them all */ /* One ringbuffer to rule them all */
GEM_BUG_ON(!engine->legacy.ring); GEM_BUG_ON(!engine->legacy.ring);
ce->ring = engine->legacy.ring; ce->ring = engine->legacy.ring;
......
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