Commit e271b59e authored by Jagadeesh Kona's avatar Jagadeesh Kona Committed by Bjorn Andersson

arm64: dts: qcom: sm8550: Add camera clock controller

Add device node for camera clock controller on Qualcomm
SM8550 platform.
Signed-off-by: default avatarJagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230707035744.22245-6-quic_jkona@quicinc.comSigned-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent bfa9cf9a
...@@ -5,6 +5,7 @@ ...@@ -5,6 +5,7 @@
#include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,sm8450-videocc.h> #include <dt-bindings/clock/qcom,sm8450-videocc.h>
#include <dt-bindings/clock/qcom,sm8550-camcc.h>
#include <dt-bindings/clock/qcom,sm8550-gcc.h> #include <dt-bindings/clock/qcom,sm8550-gcc.h>
#include <dt-bindings/clock/qcom,sm8550-gpucc.h> #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
#include <dt-bindings/clock/qcom,sm8550-tcsr.h> #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
...@@ -2434,6 +2435,20 @@ videocc: clock-controller@aaf0000 { ...@@ -2434,6 +2435,20 @@ videocc: clock-controller@aaf0000 {
#power-domain-cells = <1>; #power-domain-cells = <1>;
}; };
camcc: clock-controller@ade0000 {
compatible = "qcom,sm8550-camcc";
reg = <0 0x0ade0000 0 0x20000>;
clocks = <&gcc GCC_CAMERA_AHB_CLK>,
<&bi_tcxo_div2>,
<&bi_tcxo_ao_div2>,
<&sleep_clk>;
power-domains = <&rpmhpd SM8550_MMCX>;
required-opps = <&rpmhpd_opp_low_svs>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
mdss: display-subsystem@ae00000 { mdss: display-subsystem@ae00000 {
compatible = "qcom,sm8550-mdss"; compatible = "qcom,sm8550-mdss";
reg = <0 0x0ae00000 0 0x1000>; reg = <0 0x0ae00000 0 0x1000>;
......
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