dt-bindings: memory-controllers: fsl,imx-weim: Fix "fsl,weim-cs-timing" schema

The "fsl,weim-cs-timing" property is an array, but the constraints in
the if/then schema are for a matrix. That worked fine when all
properties were decoded into a matrix, but now dtschema decodes
properties into scalars and arrays based on their type.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20240807225959.3343093-1-robh@kernel.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml

@@ -133,7 +133,6 @@ allOf:
         "^.*@[0-7],[0-9a-f]+$":
           properties:
             fsl,weim-cs-timing:
-              items:
               items:
                 - description: CSxU
                 - description: CSxL
@@ -150,7 +149,6 @@ allOf:
         "^.*@[0-7],[0-9a-f]+$":
           properties:
             fsl,weim-cs-timing:
-              items:
               items:
                 - description: CSCRxU
                 - description: CSCRxL
@@ -170,7 +168,6 @@ allOf:
         "^.*@[0-7],[0-9a-f]+$":
           properties:
             fsl,weim-cs-timing:
-              items:
               items:
                 - description: CSxGCR1
                 - description: CSxGCR2