Commit e47fddf2 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev:
  libata: Initialize nbytes for internal sg commands
  libata: Fix ata_busy_wait() kernel docs
  pata_via: Correct missing comments
  pata_atiixp: propogate cable detection hack from drivers/ide to the new driver
  ahci/pata_jmicron: fix JMicron quirk
parents 222335b7 49c80429
...@@ -1250,6 +1250,7 @@ unsigned ata_exec_internal_sg(struct ata_device *dev, ...@@ -1250,6 +1250,7 @@ unsigned ata_exec_internal_sg(struct ata_device *dev,
ata_sg_init(qc, sg, n_elem); ata_sg_init(qc, sg, n_elem);
qc->nsect = buflen / ATA_SECT_SIZE; qc->nsect = buflen / ATA_SECT_SIZE;
qc->nbytes = buflen;
} }
qc->private_data = &wait; qc->private_data = &wait;
......
...@@ -36,15 +36,22 @@ enum { ...@@ -36,15 +36,22 @@ enum {
static int atiixp_pre_reset(struct ata_port *ap) static int atiixp_pre_reset(struct ata_port *ap)
{ {
struct pci_dev *pdev = to_pci_dev(ap->host->dev); struct pci_dev *pdev = to_pci_dev(ap->host->dev);
static struct pci_bits atiixp_enable_bits[] = { static const struct pci_bits atiixp_enable_bits[] = {
{ 0x48, 1, 0x01, 0x00 }, { 0x48, 1, 0x01, 0x00 },
{ 0x48, 1, 0x08, 0x00 } { 0x48, 1, 0x08, 0x00 }
}; };
u8 udma;
if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no])) if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no]))
return -ENOENT; return -ENOENT;
/* Hack from drivers/ide/pci. Really we want to know how to do the
raw detection not play follow the bios mode guess */
pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40)
ap->cbl = ATA_CBL_PATA80; ap->cbl = ATA_CBL_PATA80;
else
ap->cbl = ATA_CBL_PATA40;
return ata_std_prereset(ap); return ata_std_prereset(ap);
} }
......
...@@ -204,20 +204,12 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i ...@@ -204,20 +204,12 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i
u32 reg; u32 reg;
if (id->driver_data != 368) {
/* Put the controller into AHCI mode in case the AHCI driver
has not yet been loaded. This can be done with either
function present */
/* FIXME: We may want a way to override this in future */
pci_write_config_byte(pdev, 0x41, 0xa1);
/* PATA controller is fn 1, AHCI is fn 0 */ /* PATA controller is fn 1, AHCI is fn 0 */
if (PCI_FUNC(pdev->devfn) != 1) if (id->driver_data != 368 && PCI_FUNC(pdev->devfn) != 1)
return -ENODEV; return -ENODEV;
}
if ( id->driver_data == 365 || id->driver_data == 366) {
/* The 365/66 have two PATA channels, redirect the second */ /* The 365/66 have two PATA channels, redirect the second */
if (id->driver_data == 365 || id->driver_data == 366) {
pci_read_config_dword(pdev, 0x80, &reg); pci_read_config_dword(pdev, 0x80, &reg);
reg |= (1 << 24); /* IDE1 to PATA IDE secondary */ reg |= (1 << 24); /* IDE1 to PATA IDE secondary */
pci_write_config_dword(pdev, 0x80, reg); pci_write_config_dword(pdev, 0x80, reg);
......
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
* VIA VT8233c - UDMA100 * VIA VT8233c - UDMA100
* VIA VT8235 - UDMA133 * VIA VT8235 - UDMA133
* VIA VT8237 - UDMA133 * VIA VT8237 - UDMA133
* VIA VT8237S - UDMA133
* VIA VT8251 - UDMA133 * VIA VT8251 - UDMA133
* *
* Most registers remain compatible across chips. Others start reserved * Most registers remain compatible across chips. Others start reserved
...@@ -61,7 +62,7 @@ ...@@ -61,7 +62,7 @@
#include <linux/libata.h> #include <linux/libata.h>
#define DRV_NAME "pata_via" #define DRV_NAME "pata_via"
#define DRV_VERSION "0.2.0" #define DRV_VERSION "0.2.1"
/* /*
* The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
......
...@@ -1262,8 +1262,8 @@ static void quirk_jmicron_dualfn(struct pci_dev *pdev) ...@@ -1262,8 +1262,8 @@ static void quirk_jmicron_dualfn(struct pci_dev *pdev)
pci_read_config_dword(pdev, 0x40, &conf); pci_read_config_dword(pdev, 0x40, &conf);
/* Enable dual function mode, AHCI on fn 0, IDE fn1 */ /* Enable dual function mode, AHCI on fn 0, IDE fn1 */
/* Set the class codes correctly and then direct IDE 0 */ /* Set the class codes correctly and then direct IDE 0 */
conf &= ~0x000F0200; /* Clear bit 9 and 16-19 */ conf &= ~0x000FF200; /* Clear bit 9 and 12-19 */
conf |= 0x00C20002; /* Set bit 1, 17, 22, 23 */ conf |= 0x00C2A102; /* Set 1, 8, 13, 15, 17, 22, 23 */
pci_write_config_dword(pdev, 0x40, conf); pci_write_config_dword(pdev, 0x40, conf);
/* Reconfigure so that the PCI scanner discovers the /* Reconfigure so that the PCI scanner discovers the
......
...@@ -1054,6 +1054,8 @@ static inline void ata_pause(struct ata_port *ap) ...@@ -1054,6 +1054,8 @@ static inline void ata_pause(struct ata_port *ap)
/** /**
* ata_busy_wait - Wait for a port status register * ata_busy_wait - Wait for a port status register
* @ap: Port to wait for. * @ap: Port to wait for.
* @bits: bits that must be clear
* @max: number of 10uS waits to perform
* *
* Waits up to max*10 microseconds for the selected bits in the port's * Waits up to max*10 microseconds for the selected bits in the port's
* status register to be cleared. * status register to be cleared.
......
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