ARM: dts: exynos: Use pinctrl labels in exynos4412-pinctrl

Define pinctrl labels in exynos4412.dtsi and use them in
exynos4412-pinctrl.dtsi, as it is done in other Exynos DTSes.
Signed-off-by: Maciej Purski <m.purski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

arch/arm/boot/dts/exynos4412-pinctrl.dtsi

@@ -18,8 +18,7 @@ _pin {								\
 		samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>;	\
 	}
 
-/ {
-	pinctrl_0: pinctrl@11400000 {
+&pinctrl_0 {
 	gpa0: gpa0 {
 		gpio-controller;
 		#gpio-cells = <2>;
@@ -429,9 +428,9 @@ cam_port_a_clk_idle: cam-port-a-clk-idle {
 		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
 		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
 	};
-	};
+};
 
-	pinctrl_1: pinctrl@11000000 {
+&pinctrl_1 {
 	gpk0: gpk0 {
 		gpio-controller;
 		#gpio-cells = <2>;
@@ -894,9 +893,9 @@ hdmi_cec: hdmi-cec {
 		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
 		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
 	};
-	};
+};
 
-	pinctrl_2: pinctrl@3860000 {
+&pinctrl_2 {
 	gpz: gpz {
 		gpio-controller;
 		#gpio-cells = <2>;
@@ -920,9 +919,9 @@ pcm0_bus: pcm0-bus {
 		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
 		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
 	};
-	};
+};
 
-	pinctrl_3: pinctrl@106e0000 {
+&pinctrl_3 {
 	gpv0: gpv0 {
 		gpio-controller;
 		#gpio-cells = <2>;
@@ -977,5 +976,4 @@ c2c_bus: c2c-bus {
 		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
 		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
 	};
-	};
 };

arch/arm/boot/dts/exynos4412.dtsi

@@ -15,7 +15,7 @@
  */
 
 #include "exynos4.dtsi"
-#include "exynos4412-pinctrl.dtsi"
+
 #include "exynos4-cpu-thermal.dtsi"
 
 / {
@@ -147,6 +147,37 @@ cpu0_opp_1500: opp-1500000000 {
 		};
 	};
 
+	pinctrl_0: pinctrl@11400000 {
+		compatible = "samsung,exynos4x12-pinctrl";
+		reg = <0x11400000 0x1000>;
+		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	pinctrl_1: pinctrl@11000000 {
+		compatible = "samsung,exynos4x12-pinctrl";
+		reg = <0x11000000 0x1000>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+
+		wakup_eint: wakeup-interrupt-controller {
+			compatible = "samsung,exynos4210-wakeup-eint";
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		};
+	};
+
+	pinctrl_2: pinctrl@3860000 {
+		compatible = "samsung,exynos4x12-pinctrl";
+		reg = <0x03860000 0x1000>;
+		interrupt-parent = <&combiner>;
+		interrupts = <10 0>;
+	};
+
+	pinctrl_3: pinctrl@106e0000 {
+		compatible = "samsung,exynos4x12-pinctrl";
+		reg = <0x106E0000 0x1000>;
+		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	sysram@2020000 {
 		compatible = "mmio-sram";
 		reg = <0x02020000 0x40000>;
@@ -693,36 +724,6 @@ &mixer {
 		 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
 };
 
-&pinctrl_0 {
-	compatible = "samsung,exynos4x12-pinctrl";
-	reg = <0x11400000 0x1000>;
-	interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
-};
-
-&pinctrl_1 {
-	compatible = "samsung,exynos4x12-pinctrl";
-	reg = <0x11000000 0x1000>;
-	interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-
-	wakup_eint: wakeup-interrupt-controller {
-		compatible = "samsung,exynos4210-wakeup-eint";
-		interrupt-parent = <&gic>;
-		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-	};
-};
-
-&pinctrl_2 {
-	compatible = "samsung,exynos4x12-pinctrl";
-	reg = <0x03860000 0x1000>;
-	interrupt-parent = <&combiner>;
-	interrupts = <10 0>;
-};
-
-&pinctrl_3 {
-	compatible = "samsung,exynos4x12-pinctrl";
-	reg = <0x106E0000 0x1000>;
-	interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
-};
 
 &pmu_system_controller {
 	compatible = "samsung,exynos4412-pmu", "syscon";
@@ -743,3 +744,5 @@ &tmu {
 	clock-names = "tmu_apbif";
 	status = "disabled";
 };
+
+#include "exynos4412-pinctrl.dtsi"