Commit e6684d07 authored by Ravi Bangoria's avatar Ravi Bangoria Committed by Michael Ellerman

powerpc/sstep: Introduce GETTYPE macro

Replace 'op->type & INSTR_TYPE_MASK' expression with GETTYPE(op->type)
macro.
Signed-off-by: default avatarRavi Bangoria <ravi.bangoria@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 9c2d72d4
...@@ -97,6 +97,8 @@ enum instruction_type { ...@@ -97,6 +97,8 @@ enum instruction_type {
#define SIZE(n) ((n) << 12) #define SIZE(n) ((n) << 12)
#define GETSIZE(w) ((w) >> 12) #define GETSIZE(w) ((w) >> 12)
#define GETTYPE(t) ((t) & INSTR_TYPE_MASK)
#define MKOP(t, f, s) ((t) | (f) | SIZE(s)) #define MKOP(t, f, s) ((t) | (f) | SIZE(s))
struct instruction_op { struct instruction_op {
......
...@@ -339,7 +339,7 @@ int fix_alignment(struct pt_regs *regs) ...@@ -339,7 +339,7 @@ int fix_alignment(struct pt_regs *regs)
if (r < 0) if (r < 0)
return -EINVAL; return -EINVAL;
type = op.type & INSTR_TYPE_MASK; type = GETTYPE(op.type);
if (!OP_IS_LOAD_STORE(type)) { if (!OP_IS_LOAD_STORE(type)) {
if (op.type != CACHEOP + DCBZ) if (op.type != CACHEOP + DCBZ)
return -EINVAL; return -EINVAL;
......
...@@ -2642,7 +2642,7 @@ void emulate_update_regs(struct pt_regs *regs, struct instruction_op *op) ...@@ -2642,7 +2642,7 @@ void emulate_update_regs(struct pt_regs *regs, struct instruction_op *op)
unsigned long next_pc; unsigned long next_pc;
next_pc = truncate_if_32bit(regs->msr, regs->nip + 4); next_pc = truncate_if_32bit(regs->msr, regs->nip + 4);
switch (op->type & INSTR_TYPE_MASK) { switch (GETTYPE(op->type)) {
case COMPUTE: case COMPUTE:
if (op->type & SETREG) if (op->type & SETREG)
regs->gpr[op->reg] = op->val; regs->gpr[op->reg] = op->val;
...@@ -2740,7 +2740,7 @@ int emulate_loadstore(struct pt_regs *regs, struct instruction_op *op) ...@@ -2740,7 +2740,7 @@ int emulate_loadstore(struct pt_regs *regs, struct instruction_op *op)
err = 0; err = 0;
size = GETSIZE(op->type); size = GETSIZE(op->type);
type = op->type & INSTR_TYPE_MASK; type = GETTYPE(op->type);
cross_endian = (regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE); cross_endian = (regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE);
ea = truncate_if_32bit(regs->msr, op->ea); ea = truncate_if_32bit(regs->msr, op->ea);
...@@ -3002,7 +3002,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr) ...@@ -3002,7 +3002,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr)
} }
err = 0; err = 0;
type = op.type & INSTR_TYPE_MASK; type = GETTYPE(op.type);
if (OP_IS_LOAD_STORE(type)) { if (OP_IS_LOAD_STORE(type)) {
err = emulate_loadstore(regs, &op); err = emulate_loadstore(regs, &op);
......
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