Commit e9e03708 authored by Florian Fainelli's avatar Florian Fainelli Committed by Greg Kroah-Hartman

net: phy: broadcom: Fix bcm_write_exp()

[ Upstream commit 79fb218d ]

On newer PHYs, we need to select the expansion register to write with
setting bits [11:8] to 0xf. This was done correctly by bcm7xxx.c prior
to being migrated to generic code under bcm-phy-lib.c which
unfortunately used the older implementation from the BCM54xx days.

Fix this by creating an inline stub: bcm_write_exp_sel() which adds the
correct value (MII_BCM54XX_EXP_SEL_ER) and update both the Cygnus PHY
and BCM7xxx PHY drivers which require setting these bits.

broadcom.c is unchanged because some PHYs even use a different selector
method, so let them specify it directly (e.g: SerDes secondary selector).

Fixes: a1cba561 ("net: phy: Add Broadcom phy library for common interfaces")
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent d80cbf9f
...@@ -61,17 +61,17 @@ static int bcm_cygnus_afe_config(struct phy_device *phydev) ...@@ -61,17 +61,17 @@ static int bcm_cygnus_afe_config(struct phy_device *phydev)
return rc; return rc;
/* make rcal=100, since rdb default is 000 */ /* make rcal=100, since rdb default is 000 */
rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB1, 0x10); rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB1, 0x10);
if (rc < 0) if (rc < 0)
return rc; return rc;
/* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */ /* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */
rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB0, 0x10); rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB0, 0x10);
if (rc < 0) if (rc < 0)
return rc; return rc;
/* CORE_EXPB0, Disable Reset R_CAL/RC_CAL Engine */ /* CORE_EXPB0, Disable Reset R_CAL/RC_CAL Engine */
rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB0, 0x00); rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB0, 0x00);
return 0; return 0;
} }
......
...@@ -14,11 +14,18 @@ ...@@ -14,11 +14,18 @@
#ifndef _LINUX_BCM_PHY_LIB_H #ifndef _LINUX_BCM_PHY_LIB_H
#define _LINUX_BCM_PHY_LIB_H #define _LINUX_BCM_PHY_LIB_H
#include <linux/brcmphy.h>
#include <linux/phy.h> #include <linux/phy.h>
int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val); int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
int bcm_phy_read_exp(struct phy_device *phydev, u16 reg); int bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
static inline int bcm_phy_write_exp_sel(struct phy_device *phydev,
u16 reg, u16 val)
{
return bcm_phy_write_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER, val);
}
int bcm_phy_write_misc(struct phy_device *phydev, int bcm_phy_write_misc(struct phy_device *phydev,
u16 reg, u16 chl, u16 value); u16 reg, u16 chl, u16 value);
int bcm_phy_read_misc(struct phy_device *phydev, int bcm_phy_read_misc(struct phy_device *phydev,
......
...@@ -48,10 +48,10 @@ ...@@ -48,10 +48,10 @@
static void r_rc_cal_reset(struct phy_device *phydev) static void r_rc_cal_reset(struct phy_device *phydev)
{ {
/* Reset R_CAL/RC_CAL Engine */ /* Reset R_CAL/RC_CAL Engine */
bcm_phy_write_exp(phydev, 0x00b0, 0x0010); bcm_phy_write_exp_sel(phydev, 0x00b0, 0x0010);
/* Disable Reset R_AL/RC_CAL Engine */ /* Disable Reset R_AL/RC_CAL Engine */
bcm_phy_write_exp(phydev, 0x00b0, 0x0000); bcm_phy_write_exp_sel(phydev, 0x00b0, 0x0000);
} }
static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev) static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)
......
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