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Commit ec0872a6 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson
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arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema (really) 

DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.

I already tried to do this in commit d801357a ("arm64: dts: qcom:
sc7280: align TLMM pin configuration with DT schema") and I missed the
fact that these nodes were not part of "state" node.  Bindings did not
catch these errors due to its own issues.
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220930192954.242546-5-krzysztof.kozlowski@linaro.org
parent 91c4431b
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Showing with 211 additions and 211 deletions
arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
View file @ ec0872a6
......@@ -118,25 +118,25 @@ &wcd9385 {
};
&tlmm {
tp_int_odl: tp-int-odl {
tp_int_odl: tp-int-odl-state {
pins = "gpio7";
function = "gpio";
bias-disable;
};
ts_int_l: ts-int-l {
ts_int_l: ts-int-l-state {
pins = "gpio55";
function = "gpio";
bias-pull-up;
};
ts_reset_l: ts-reset-l {
ts_reset_l: ts-reset-l-state {
pins = "gpio54";
function = "gpio";
bias-disable;
};
us_euro_hs_sel: us-euro-hs-sel {
us_euro_hs_sel: us-euro-hs-sel-state {
pins = "gpio81";
function = "gpio";
bias-pull-down;
......
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
View file @ ec0872a6
......@@ -744,27 +744,27 @@ &tlmm {
pinctrl-names = "default";
pinctrl-0 = <&bios_flash_wp_od>;
amp_en: amp-en-pins {
amp_en: amp-en-state {
pins = "gpio63";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
ap_ec_int_l: ap-ec-int-l-pins {
ap_ec_int_l: ap-ec-int-l-state {
pins = "gpio18";
function = "gpio";
bias-pull-up;
};
bios_flash_wp_od: bios-flash-wp-od-pins {
bios_flash_wp_od: bios-flash-wp-od-state {
pins = "gpio16";
function = "gpio";
/* Has external pull */
bias-disable;
};
en_fp_rails: en-fp-rails-pins {
en_fp_rails: en-fp-rails-state {
pins = "gpio77";
function = "gpio";
bias-disable;
......@@ -772,60 +772,60 @@ en_fp_rails: en-fp-rails-pins {
output-high;
};
en_pp3300_codec: en-pp3300-codec-pins {
en_pp3300_codec: en-pp3300-codec-state {
pins = "gpio105";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
en_pp3300_dx_edp: en-pp3300-dx-edp-pins {
en_pp3300_dx_edp: en-pp3300-dx-edp-state {
pins = "gpio80";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
fp_rst_l: fp-rst-l-pins {
fp_rst_l: fp-rst-l-state {
pins = "gpio78";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
fp_to_ap_irq_l: fp-to-ap-irq-l-pins {
fp_to_ap_irq_l: fp-to-ap-irq-l-state {
pins = "gpio61";
function = "gpio";
/* Has external pullup */
bias-disable;
};
fpmcu_boot0: fpmcu-boot0-pins {
fpmcu_boot0: fpmcu-boot0-state {
pins = "gpio68";
function = "gpio";
bias-disable;
};
gsc_ap_int_odl: gsc-ap-int-odl-pins {
gsc_ap_int_odl: gsc-ap-int-odl-state {
pins = "gpio104";
function = "gpio";
bias-pull-up;
};
hp_irq: hp-irq-pins {
hp_irq: hp-irq-state {
pins = "gpio101";
function = "gpio";
bias-pull-up;
};
hub_en: hub-en-pins {
hub_en: hub-en-state {
pins = "gpio157";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
pe_wake_odl: pe-wake-odl-pins {
pe_wake_odl: pe-wake-odl-state {
pins = "gpio3";
function = "gpio";
/* Has external pull */
......@@ -834,45 +834,45 @@ pe_wake_odl: pe-wake-odl-pins {
};
/* For ap_spi_fp */
qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high-pins {
qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high-state {
pins = "gpio39";
function = "gpio";
output-high;
};
/* For ap_ec_spi */
qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-pins {
qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-state {
pins = "gpio43";
function = "gpio";
output-high;
};
sar0_irq_odl: sar0-irq-odl-pins {
sar0_irq_odl: sar0-irq-odl-state {
pins = "gpio141";
function = "gpio";
bias-pull-up;
};
sar1_irq_odl: sar1-irq-odl-pins {
sar1_irq_odl: sar1-irq-odl-state {
pins = "gpio140";
function = "gpio";
bias-pull-up;
};
sd_cd_odl: sd-cd-odl-pins {
sd_cd_odl: sd-cd-odl-state {
pins = "gpio91";
function = "gpio";
bias-pull-up;
};
ssd_en: ssd-en-pins {
ssd_en: ssd-en-state {
pins = "gpio51";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
ssd_rst_l: ssd-rst-l-pins {
ssd_rst_l: ssd-rst-l-state {
pins = "gpio2";
function = "gpio";
bias-disable;
......@@ -880,14 +880,14 @@ ssd_rst_l: ssd-rst-l-pins {
output-low;
};
tp_int_odl: tp-int-odl-pins {
tp_int_odl: tp-int-odl-state {
pins = "gpio7";
function = "gpio";
/* Has external pullup */
bias-disable;
};
wf_cam_en: wf-cam-en-pins {
wf_cam_en: wf-cam-en-state {
pins = "gpio119";
function = "gpio";
/* Has external pulldown */
......
arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
View file @ ec0872a6
......@@ -79,26 +79,26 @@ cr50: tpm@0 {
};
&tlmm {
ap_ec_int_l: ap-ec-int-l-pins {
ap_ec_int_l: ap-ec-int-l-state {
pins = "gpio18";
function = "gpio";
input-enable;
bias-pull-up;
};
h1_ap_int_odl: h1-ap-int-odl-pins {
h1_ap_int_odl: h1-ap-int-odl-state {
pins = "gpio104";
function = "gpio";
input-enable;
bias-pull-up;
};
qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-pins {
qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-state {
pins = "gpio43";
output-high;
};
qup_spi14_cs_gpio_init_high: qup-spi14-cs-gpio-init-high-pins {
qup_spi14_cs_gpio_init_high: qup-spi14-cs-gpio-init-high-state {
pins = "gpio59";
output-high;
};
......
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
View file @ ec0872a6
......@@ -747,24 +747,24 @@ &sdc2_data {
};
&tlmm {
amp_en: amp-en {
amp_en: amp-en-state {
pins = "gpio63";
bias-pull-down;
drive-strength = <2>;
};
bt_en: bt-en-pins {
bt_en: bt-en-state {
pins = "gpio85";
function = "gpio";
output-low;
bias-disable;
};
nvme_pwren: nvme-pwren-pins {
nvme_pwren: nvme-pwren-state {
function = "gpio";
};
pcie1_reset_n: pcie1-reset-n-pins {
pcie1_reset_n: pcie1-reset-n-state {
pins = "gpio2";
function = "gpio";
......@@ -773,7 +773,7 @@ pcie1_reset_n: pcie1-reset-n-pins {
bias-disable;
};
pcie1_wake_n: pcie1-wake-n-pins {
pcie1_wake_n: pcie1-wake-n-state {
pins = "gpio3";
function = "gpio";
......@@ -781,7 +781,7 @@ pcie1_wake_n: pcie1-wake-n-pins {
bias-pull-up;
};
qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {
pins = "gpio28";
function = "gpio";
/*
......@@ -794,7 +794,7 @@ qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
bias-bus-hold;
};
qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {
pins = "gpio29";
function = "gpio";
/*
......@@ -806,7 +806,7 @@ qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
bias-pull-down;
};
qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {
pins = "gpio30";
function = "gpio";
/*
......@@ -816,7 +816,7 @@ qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
bias-pull-up;
};
qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {
pins = "gpio31";
function = "gpio";
/*
......@@ -827,25 +827,25 @@ qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
bias-pull-up;
};
sd_cd: sd-cd-pins {
sd_cd: sd-cd-state {
pins = "gpio91";
function = "gpio";
bias-pull-up;
};
sw_ctrl: sw-ctrl-pins {
sw_ctrl: sw-ctrl-state {
pins = "gpio86";
function = "gpio";
bias-pull-down;
};
wcd_reset_n: wcd-reset-n {
wcd_reset_n: wcd-reset-n-state {
pins = "gpio83";
function = "gpio";
drive-strength = <8>;
};
wcd_reset_n_sleep: wcd-reset-n-sleep {
wcd_reset_n_sleep: wcd-reset-n-sleep-state {
pins = "gpio83";
function = "gpio";
drive-strength = <8>;
......
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
View file @ ec0872a6
......@@ -595,7 +595,7 @@ pmic_edp_bl_pwm: pmic-edp-bl-pwm-state {
};
&tlmm {
mos_bt_en: mos-bt-en-pins {
mos_bt_en: mos-bt-en-state {
pins = "gpio85";
function = "gpio";
drive-strength = <2>;
......@@ -603,7 +603,7 @@ mos_bt_en: mos-bt-en-pins {
};
/* For mos_bt_uart */
qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {
pins = "gpio28";
function = "gpio";
/*
......@@ -617,7 +617,7 @@ qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
};
/* For mos_bt_uart */
qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {
pins = "gpio29";
function = "gpio";
/*
......@@ -630,7 +630,7 @@ qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
};
/* For mos_bt_uart */
qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {
pins = "gpio31";
function = "gpio";
/*
......@@ -642,7 +642,7 @@ qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
};
/* For mos_bt_uart */
qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {
pins = "gpio30";
function = "gpio";
/*
......@@ -652,32 +652,32 @@ qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
bias-pull-up;
};
ts_int_conn: ts-int-conn-pins {
ts_int_conn: ts-int-conn-state {
pins = "gpio55";
function = "gpio";
bias-pull-up;
};
ts_rst_conn: ts-rst-conn-pins {
ts_rst_conn: ts-rst-conn-state {
pins = "gpio54";
function = "gpio";
drive-strength = <2>;
};
us_euro_hs_sel: us-euro-hs-sel {
us_euro_hs_sel: us-euro-hs-sel-state {
pins = "gpio81";
function = "gpio";
bias-pull-down;
drive-strength = <2>;
};
wcd_reset_n: wcd-reset-n {
wcd_reset_n: wcd-reset-n-state {
pins = "gpio83";
function = "gpio";
drive-strength = <8>;
};
wcd_reset_n_sleep: wcd-reset-n-sleep {
wcd_reset_n_sleep: wcd-reset-n-sleep-state {
pins = "gpio83";
function = "gpio";
drive-strength = <8>;
......
arch/arm64/boot/dts/qcom/sc7280.dtsi
View file @ ec0872a6
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