Commit ecb97851 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter

drm/i915: disable the infoframe before changing it

That's what the VIDEO_DIP_CTL documentation says we need to do. Except
when it's the AVI InfoFrame and we're ironlake_write_infoframe.
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent fa193ff7
...@@ -153,6 +153,7 @@ static void i9xx_write_infoframe(struct drm_encoder *encoder, ...@@ -153,6 +153,7 @@ static void i9xx_write_infoframe(struct drm_encoder *encoder,
val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */ val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
val |= intel_infoframe_index(frame); val |= intel_infoframe_index(frame);
val &= ~intel_infoframe_enable(frame);
val |= VIDEO_DIP_ENABLE; val |= VIDEO_DIP_ENABLE;
I915_WRITE(VIDEO_DIP_CTL, val); I915_WRITE(VIDEO_DIP_CTL, val);
...@@ -185,6 +186,13 @@ static void ironlake_write_infoframe(struct drm_encoder *encoder, ...@@ -185,6 +186,13 @@ static void ironlake_write_infoframe(struct drm_encoder *encoder,
val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */ val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
val |= intel_infoframe_index(frame); val |= intel_infoframe_index(frame);
/* The DIP control register spec says that we need to update the AVI
* infoframe without clearing its enable bit */
if (frame->type == DIP_TYPE_AVI)
val |= VIDEO_DIP_ENABLE_AVI;
else
val &= ~intel_infoframe_enable(frame);
val |= VIDEO_DIP_ENABLE; val |= VIDEO_DIP_ENABLE;
I915_WRITE(reg, val); I915_WRITE(reg, val);
...@@ -217,6 +225,7 @@ static void vlv_write_infoframe(struct drm_encoder *encoder, ...@@ -217,6 +225,7 @@ static void vlv_write_infoframe(struct drm_encoder *encoder,
val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */ val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
val |= intel_infoframe_index(frame); val |= intel_infoframe_index(frame);
val &= ~intel_infoframe_enable(frame);
val |= VIDEO_DIP_ENABLE; val |= VIDEO_DIP_ENABLE;
I915_WRITE(reg, val); I915_WRITE(reg, val);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment