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Commit ed2f05a9 authored by Tom Rini's avatar Tom Rini
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Merge kernel.crashing.org:/home/trini/work/kernel/pristine/linux-2.6 

into kernel.crashing.org:/home/trini/work/kernel/pristine/for-linus-ppc
parents 7ce42ae1 bcd1182e
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Showing with 511 additions and 523 deletions
arch/ppc/4xx_io/serial_sicc.c
View file @ ed2f05a9
...@@ -763,7 +763,7 @@ static void siccuart_change_speed(struct SICC_info *info, struct termios *old_te ...@@ -763,7 +763,7 @@ static void siccuart_change_speed(struct SICC_info *info, struct termios *old_te
cflag = info->tty->termios->c_cflag; cflag = info->tty->termios->c_cflag;
#if DEBUG #ifdef DEBUG
printk("siccuart_set_cflag(0x%x) called\n", cflag); printk("siccuart_set_cflag(0x%x) called\n", cflag);
#endif #endif
/* byte size and parity */ /* byte size and parity */
...@@ -1027,7 +1027,7 @@ static void siccuart_flush_buffer(struct tty_struct *tty) ...@@ -1027,7 +1027,7 @@ static void siccuart_flush_buffer(struct tty_struct *tty)
struct SICC_info *info = tty->driver_data; struct SICC_info *info = tty->driver_data;
unsigned long flags; unsigned long flags;
#if DEBUG #ifdef DEBUG
printk("siccuart_flush_buffer(%d) called\n", tty->index); printk("siccuart_flush_buffer(%d) called\n", tty->index);
#endif #endif
save_flags(flags); cli(); save_flags(flags); cli();
...@@ -1433,7 +1433,7 @@ static void siccuart_close(struct tty_struct *tty, struct file *filp) ...@@ -1433,7 +1433,7 @@ static void siccuart_close(struct tty_struct *tty, struct file *filp)
state = info->state; state = info->state;
#if DEBUG #ifdef DEBUG
//printk("siccuart_close() called\n"); //printk("siccuart_close() called\n");
#endif #endif
...@@ -1544,7 +1544,7 @@ static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout) ...@@ -1544,7 +1544,7 @@ static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout)
timeout = 2 * info->timeout; timeout = 2 * info->timeout;
expire = jiffies + timeout; expire = jiffies + timeout;
#if DEBUG #ifdef DEBUG
printk("siccuart_wait_until_sent(%d), jiff=%lu, expire=%lu char_time=%lu...\n", printk("siccuart_wait_until_sent(%d), jiff=%lu, expire=%lu char_time=%lu...\n",
tty->index, jiffies, tty->index, jiffies,
expire, char_time); expire, char_time);
...@@ -1831,7 +1831,7 @@ static int siccuart_console_read(struct console *co, const char *s, u_int count) ...@@ -1831,7 +1831,7 @@ static int siccuart_console_read(struct console *co, const char *s, u_int count)
unsigned int status; unsigned int status;
char *w; char *w;
int c; int c;
#if DEBUG #ifdef DEBUG
printk("siccuart_console_read() called\n"); printk("siccuart_console_read() called\n");
#endif #endif
......
arch/ppc/8260_io/uart.c
View file @ ed2f05a9
...@@ -155,7 +155,7 @@ static unsigned long break_pressed; /* break, really ... */ ...@@ -155,7 +155,7 @@ static unsigned long break_pressed; /* break, really ... */
static struct serial_state rs_table[] = { static struct serial_state rs_table[] = {
/* UART CLK PORT IRQ FLAGS NUM */ /* UART CLK PORT IRQ FLAGS NUM */
{ 0, 0, PROFF_SMC1, SIU_INT_SMC1, 0, 0 }, /* SMC1 ttyS0 */ { 0, 0, PROFF_SMC1, SIU_INT_SMC1, 0, 0 }, /* SMC1 ttyS0 */
#if USE_SMC2 #ifdef USE_SMC2
{ 0, 0, PROFF_SMC2, SIU_INT_SMC2, 0, 1 }, /* SMC2 ttyS1 */ { 0, 0, PROFF_SMC2, SIU_INT_SMC2, 0, 1 }, /* SMC2 ttyS1 */
#endif #endif
#ifndef CONFIG_SCC1_ENET #ifndef CONFIG_SCC1_ENET
...@@ -2565,7 +2565,7 @@ static int __init rs_8xx_init(void) ...@@ -2565,7 +2565,7 @@ static int __init rs_8xx_init(void)
io->iop_pdird |= 0x00400000; io->iop_pdird |= 0x00400000;
io->iop_pdird &= ~0x00800000; io->iop_pdird &= ~0x00800000;
io->iop_psord &= ~0x00c00000; io->iop_psord &= ~0x00c00000;
#if USE_SMC2 #ifdef USE_SMC2
io->iop_ppara |= 0x00c00000; io->iop_ppara |= 0x00c00000;
io->iop_pdira |= 0x00400000; io->iop_pdira |= 0x00400000;
io->iop_pdira &= ~0x00800000; io->iop_pdira &= ~0x00800000;
......
arch/ppc/Kconfig
View file @ ed2f05a9
...@@ -627,9 +627,14 @@ config EPIC_SERIAL_MODE ...@@ -627,9 +627,14 @@ config EPIC_SERIAL_MODE
depends on 6xx && (LOPEC || SANDPOINT) depends on 6xx && (LOPEC || SANDPOINT)
default y default y
config MPC10X_BRIDGE
bool
depends on PCORE || POWERPMC250 || LOPEC || SANDPOINT
default y
config MPC10X_STORE_GATHERING config MPC10X_STORE_GATHERING
bool "Enable MPC10x store gathering" bool "Enable MPC10x store gathering"
depends on FORCE || SANDPOINT depends on MPC10X_BRIDGE
config CPC710_DATA_GATHERING config CPC710_DATA_GATHERING
bool "Enable CPC710 data gathering" bool "Enable CPC710 data gathering"
......
arch/ppc/boot/images/Makefile
View file @ ed2f05a9
...@@ -13,7 +13,7 @@ $(obj)/vmlinux.bin: vmlinux FORCE ...@@ -13,7 +13,7 @@ $(obj)/vmlinux.bin: vmlinux FORCE
$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE $(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
$(call if_changed,gzip) $(call if_changed,gzip)
quite_cmd_uimage = UIMAGE $@ quiet_cmd_uimage = UIMAGE $@
cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A ppc -O linux -T kernel \ cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A ppc -O linux -T kernel \
-C gzip -a 00000000 -e 00000000 -n 'Linux-$(KERNELRELEASE)' \ -C gzip -a 00000000 -e 00000000 -n 'Linux-$(KERNELRELEASE)' \
-d $< $@ -d $< $@
......
arch/ppc/boot/openfirmware/Makefile
View file @ ed2f05a9
...@@ -75,7 +75,7 @@ $(obj)/image.initrd.o: $(obj)/image.o $(images)/ramdisk.image.gz FORCE ...@@ -75,7 +75,7 @@ $(obj)/image.initrd.o: $(obj)/image.o $(images)/ramdisk.image.gz FORCE
$(call if_changed,genimage-initrd) $(call if_changed,genimage-initrd)
# Create the note section for New-World PowerMacs. # Create the note section for New-World PowerMacs.
quit_cmd_mknote = MKNOTE $@ quiet_cmd_mknote = MKNOTE $@
cmd_mknote = $(utils)/mknote > $@ cmd_mknote = $(utils)/mknote > $@
targets += note targets += note
$(obj)/note: $(utils)/mknote FORCE $(obj)/note: $(utils)/mknote FORCE
......
arch/ppc/boot/simple/misc-embedded.c
View file @ ed2f05a9
...@@ -8,7 +8,6 @@ ...@@ -8,7 +8,6 @@
#include <linux/config.h> #include <linux/config.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/elf.h>
#include <linux/string.h> #include <linux/string.h>
#include <asm/bootinfo.h> #include <asm/bootinfo.h>
#include <asm/mmu.h> #include <asm/mmu.h>
......
arch/ppc/boot/simple/misc.c
View file @ ed2f05a9
...@@ -17,7 +17,6 @@ ...@@ -17,7 +17,6 @@
*/ */
#include <linux/types.h> #include <linux/types.h>
#include <linux/elf.h>
#include <linux/config.h> #include <linux/config.h>
#include <linux/string.h> #include <linux/string.h>
......
arch/ppc/configs/mcpn765_defconfig
View file @ ed2f05a9
...@@ -4,49 +4,65 @@ ...@@ -4,49 +4,65 @@
CONFIG_MMU=y CONFIG_MMU=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_GENERIC_NVRAM=y
# #
# Code maturity level options # Code maturity level options
# #
CONFIG_EXPERIMENTAL=y # CONFIG_EXPERIMENTAL is not set
CONFIG_CLEAN_COMPILE=y
CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
# #
# General setup # General setup
# #
CONFIG_SWAP=y # CONFIG_SWAP is not set
CONFIG_SYSVIPC=y CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14 CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set # CONFIG_HOTPLUG is not set
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y CONFIG_KALLSYMS=y
CONFIG_FUTEX=y CONFIG_FUTEX=y
CONFIG_EPOLL=y CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
# #
# Loadable module support # Loadable module support
# #
# CONFIG_MODULES is not set CONFIG_MODULES=y
# CONFIG_MODULE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_KMOD is not set
# #
# Platform support # Processor
# #
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_6xx=y CONFIG_6xx=y
# CONFIG_40x is not set # CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_POWER3 is not set # CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set # CONFIG_8xx is not set
CONFIG_ALTIVEC=y
# CONFIG_TAU is not set
# CONFIG_CPU_FREQ is not set
CONFIG_PPC_STD_MMU=y
# #
# IBM 4xx options # Platform options
# #
# CONFIG_8260 is not set
CONFIG_GENERIC_ISA_DMA=y
CONFIG_PPC_STD_MMU=y
# CONFIG_PPC_MULTIPLATFORM is not set # CONFIG_PPC_MULTIPLATFORM is not set
# CONFIG_APUS is not set # CONFIG_APUS is not set
# CONFIG_WILLOW_2 is not set # CONFIG_WILLOW is not set
# CONFIG_PCORE is not set # CONFIG_PCORE is not set
# CONFIG_POWERPMC250 is not set # CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set # CONFIG_EV64260 is not set
...@@ -62,33 +78,28 @@ CONFIG_MCPN765=y ...@@ -62,33 +78,28 @@ CONFIG_MCPN765=y
# CONFIG_K2 is not set # CONFIG_K2 is not set
# CONFIG_PAL4 is not set # CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set # CONFIG_GEMINI is not set
# CONFIG_EST8260 is not set
# CONFIG_SBS8260 is not set
# CONFIG_RPX6 is not set
# CONFIG_TQM8260 is not set
CONFIG_PPC_GEN550=y
# CONFIG_SMP is not set # CONFIG_SMP is not set
# CONFIG_PREEMPT is not set # CONFIG_PREEMPT is not set
CONFIG_ALTIVEC=y
# CONFIG_TAU is not set
# CONFIG_CPU_FREQ is not set
#
# General setup
#
CONFIG_HIGHMEM=y CONFIG_HIGHMEM=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_KCORE_ELF=y
CONFIG_KERNEL_ELF=y CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_ELF=y CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set # CONFIG_BINFMT_MISC is not set
# CONFIG_PCI_LEGACY_PROC is not set CONFIG_CMDLINE_BOOL=y
# CONFIG_PCI_NAMES is not set CONFIG_CMDLINE="ip=on"
# CONFIG_HOTPLUG is not set
# #
# Parallel port support # Bus options
# #
# CONFIG_PARPORT is not set CONFIG_GENERIC_ISA_DMA=y
# CONFIG_PPC601_SYNC_FIX is not set CONFIG_PCI=y
CONFIG_CMDLINE_BOOL=y CONFIG_PCI_DOMAINS=y
CONFIG_CMDLINE="ip=on" # CONFIG_PCI_LEGACY_PROC is not set
# CONFIG_PCI_NAMES is not set
# #
# Advanced setup # Advanced setup
...@@ -104,20 +115,27 @@ CONFIG_KERNEL_START=0xc0000000 ...@@ -104,20 +115,27 @@ CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000 CONFIG_TASK_SIZE=0x80000000
CONFIG_BOOT_LOAD=0x00800000 CONFIG_BOOT_LOAD=0x00800000
#
# Device Drivers
#
# #
# Generic Driver Options # Generic Driver Options
# #
# CONFIG_FW_LOADER is not set
# #
# Memory Technology Devices (MTD) # Memory Technology Devices (MTD)
# #
# CONFIG_MTD is not set # CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
# #
# Plug and Play support # Plug and Play support
# #
# CONFIG_PNP is not set
# #
# Block devices # Block devices
...@@ -126,36 +144,85 @@ CONFIG_BOOT_LOAD=0x00800000 ...@@ -126,36 +144,85 @@ CONFIG_BOOT_LOAD=0x00800000
# CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y CONFIG_BLK_DEV_INITRD=y
# CONFIG_LBD is not set # CONFIG_LBD is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# #
# ATA/ATAPI/MFM/RLL support # ATA/ATAPI/MFM/RLL support
# #
# CONFIG_IDE is not set CONFIG_IDE=y
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_IDEDISK_STROKE is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
#
# IDE chipset support/bugfixes
#
# CONFIG_IDE_GENERIC is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
# CONFIG_BLK_DEV_OFFBOARD is not set
# CONFIG_BLK_DEV_GENERIC is not set
# CONFIG_BLK_DEV_SL82C105 is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
# CONFIG_IDEDMA_PCI_AUTO is not set
CONFIG_BLK_DEV_ADMA=y
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_SC1200 is not set
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
CONFIG_BLK_DEV_VIA82CXXX=y
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_IVB is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_BLK_DEV_HD is not set
# #
# SCSI device support # SCSI device support
# #
# CONFIG_SCSI is not set # CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# #
# Fusion MPT device support # Fusion MPT device support
# #
# CONFIG_FUSION is not set
# #
# IEEE 1394 (FireWire) support (EXPERIMENTAL) # IEEE 1394 (FireWire) support
# #
# CONFIG_IEEE1394 is not set # CONFIG_IEEE1394 is not set
...@@ -164,6 +231,10 @@ CONFIG_BLK_DEV_INITRD=y ...@@ -164,6 +231,10 @@ CONFIG_BLK_DEV_INITRD=y
# #
# CONFIG_I2O is not set # CONFIG_I2O is not set
#
# Macintosh device drivers
#
# #
# Networking support # Networking support
# #
...@@ -175,7 +246,6 @@ CONFIG_NET=y ...@@ -175,7 +246,6 @@ CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set # CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set # CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
CONFIG_UNIX=y CONFIG_UNIX=y
# CONFIG_NET_KEY is not set # CONFIG_NET_KEY is not set
CONFIG_INET=y CONFIG_INET=y
...@@ -187,32 +257,17 @@ CONFIG_IP_PNP_DHCP=y ...@@ -187,32 +257,17 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_RARP is not set # CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set # CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set # CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set # CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set # CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set # CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set # CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_DECNET is not set # CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set # CONFIG_BRIDGE is not set
# CONFIG_X25 is not set # CONFIG_NETFILTER is not set
# CONFIG_LAPB is not set # CONFIG_VLAN_8021Q is not set
# CONFIG_NET_DIVERT is not set # CONFIG_LLC2 is not set
# CONFIG_ECONET is not set # CONFIG_IPX is not set
# CONFIG_WAN_ROUTER is not set # CONFIG_ATALK is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
# #
# QoS and/or fair queueing # QoS and/or fair queueing
...@@ -233,7 +288,6 @@ CONFIG_NETDEVICES=y ...@@ -233,7 +288,6 @@ CONFIG_NETDEVICES=y
# CONFIG_BONDING is not set # CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set # CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set # CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
# #
# Ethernet (10 or 100Mbit) # Ethernet (10 or 100Mbit)
...@@ -248,26 +302,15 @@ CONFIG_MII=y ...@@ -248,26 +302,15 @@ CONFIG_MII=y
# #
# Tulip family network device support # Tulip family network device support
# #
# CONFIG_NET_TULIP is not set CONFIG_NET_TULIP=y
CONFIG_TULIP=y
# CONFIG_TULIP_MMIO is not set
# CONFIG_TULIP_NAPI is not set
# CONFIG_DE4X5 is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_DM9102 is not set
# CONFIG_HP100 is not set # CONFIG_HP100 is not set
CONFIG_NET_PCI=y # CONFIG_NET_PCI is not set
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
# CONFIG_E100 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# #
# Ethernet (1000 Mbit) # Ethernet (1000 Mbit)
...@@ -277,7 +320,6 @@ CONFIG_NET_PCI=y ...@@ -277,7 +320,6 @@ CONFIG_NET_PCI=y
# CONFIG_E1000 is not set # CONFIG_E1000 is not set
# CONFIG_NS83820 is not set # CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set # CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set # CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set # CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set # CONFIG_TIGON3 is not set
...@@ -287,7 +329,6 @@ CONFIG_NET_PCI=y ...@@ -287,7 +329,6 @@ CONFIG_NET_PCI=y
# #
# CONFIG_IXGB is not set # CONFIG_IXGB is not set
# CONFIG_FDDI is not set # CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set # CONFIG_PPP is not set
# CONFIG_SLIP is not set # CONFIG_SLIP is not set
...@@ -297,10 +338,9 @@ CONFIG_NET_PCI=y ...@@ -297,10 +338,9 @@ CONFIG_NET_PCI=y
# CONFIG_NET_RADIO is not set # CONFIG_NET_RADIO is not set
# #
# Token Ring devices (depends on LLC=y) # Token Ring devices
# #
# CONFIG_RCPCI is not set # CONFIG_TR is not set
# CONFIG_SHAPER is not set
# #
# Wan interfaces # Wan interfaces
...@@ -317,15 +357,22 @@ CONFIG_NET_PCI=y ...@@ -317,15 +357,22 @@ CONFIG_NET_PCI=y
# #
# CONFIG_IRDA is not set # CONFIG_IRDA is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# #
# ISDN subsystem # ISDN subsystem
# #
# CONFIG_ISDN_BOOL is not set # CONFIG_ISDN is not set
# #
# Graphics support # Telephony Support
# #
# CONFIG_FB is not set # CONFIG_PHONE is not set
# #
# Input device support # Input device support
...@@ -342,18 +389,16 @@ CONFIG_NET_PCI=y ...@@ -342,18 +389,16 @@ CONFIG_NET_PCI=y
# CONFIG_GAMEPORT is not set # CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set # CONFIG_SERIO is not set
# CONFIG_SERIO_I8042 is not set
# #
# Input Device Drivers # Input Device Drivers
# #
#
# Macintosh device drivers
#
# #
# Character devices # Character devices
# #
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_SERIAL_NONSTANDARD is not set
# #
...@@ -361,6 +406,7 @@ CONFIG_SOUND_GAMEPORT=y ...@@ -361,6 +406,7 @@ CONFIG_SOUND_GAMEPORT=y
# #
CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set # CONFIG_SERIAL_8250_EXTENDED is not set
# #
...@@ -369,26 +415,8 @@ CONFIG_SERIAL_8250_CONSOLE=y ...@@ -369,26 +415,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256 CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set # CONFIG_QIC02_TAPE is not set
# #
...@@ -414,7 +442,15 @@ CONFIG_GEN_RTC=y ...@@ -414,7 +442,15 @@ CONFIG_GEN_RTC=y
# CONFIG_AGP is not set # CONFIG_AGP is not set
# CONFIG_DRM is not set # CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set # CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# Misc devices
#
# #
# Multimedia devices # Multimedia devices
...@@ -426,10 +462,31 @@ CONFIG_GEN_RTC=y ...@@ -426,10 +462,31 @@ CONFIG_GEN_RTC=y
# #
# CONFIG_DVB is not set # CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB is not set
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
# #
# File systems # File systems
# #
# CONFIG_EXT2_FS is not set CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT3_FS is not set # CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set # CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set # CONFIG_REISERFS_FS is not set
...@@ -457,21 +514,16 @@ CONFIG_GEN_RTC=y ...@@ -457,21 +514,16 @@ CONFIG_GEN_RTC=y
# Pseudo filesystems # Pseudo filesystems
# #
CONFIG_PROC_FS=y CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set CONFIG_PROC_KCORE=y
CONFIG_DEVPTS_FS=y
# CONFIG_DEVPTS_FS_XATTR is not set # CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set CONFIG_TMPFS=y
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y CONFIG_RAMFS=y
# #
# Miscellaneous filesystems # Miscellaneous filesystems
# #
# CONFIG_ADFS_FS is not set # CONFIG_HFSPLUS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set # CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set # CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set # CONFIG_HPFS_FS is not set
...@@ -484,19 +536,15 @@ CONFIG_RAMFS=y ...@@ -484,19 +536,15 @@ CONFIG_RAMFS=y
# #
CONFIG_NFS_FS=y CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set # CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFSD is not set # CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y CONFIG_LOCKD=y
# CONFIG_EXPORTFS is not set # CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set # CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set # CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set # CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set # CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
# #
# Partition Types # Partition Types
...@@ -505,25 +553,14 @@ CONFIG_SUNRPC=y ...@@ -505,25 +553,14 @@ CONFIG_SUNRPC=y
CONFIG_MSDOS_PARTITION=y CONFIG_MSDOS_PARTITION=y
# #
# Sound # Native Language Support
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
# #
# CONFIG_BT is not set # CONFIG_NLS is not set
# #
# Library routines # Library routines
# #
# CONFIG_CRC32 is not set CONFIG_CRC32=y
# #
# Kernel hacking # Kernel hacking
......
arch/ppc/kernel/cputable.c
View file @ ed2f05a9
...@@ -53,10 +53,19 @@ extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spe ...@@ -53,10 +53,19 @@ extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spe
#define PPC_FEATURE_ALTIVEC_COMP 0 #define PPC_FEATURE_ALTIVEC_COMP 0
#endif #endif
/* We need to mark all pages as being coherent if we're SMP or we
* have a 754x and an MPC107 host bridge. */
#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE)
#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT
#else
#define CPU_FTR_COMMON 0
#endif
struct cpu_spec cpu_specs[] = { struct cpu_spec cpu_specs[] = {
#if CLASSIC_PPC #if CLASSIC_PPC
{ /* 601 */ { /* 601 */
0xffff0000, 0x00010000, "601", 0xffff0000, 0x00010000, "601",
CPU_FTR_COMMON |
CPU_FTR_601 | CPU_FTR_HPTE_TABLE, CPU_FTR_601 | CPU_FTR_HPTE_TABLE,
COMMON_PPC | PPC_FEATURE_601_INSTR | PPC_FEATURE_UNIFIED_CACHE, COMMON_PPC | PPC_FEATURE_601_INSTR | PPC_FEATURE_UNIFIED_CACHE,
32, 32, 32, 32,
...@@ -64,6 +73,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -64,6 +73,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 603 */ { /* 603 */
0xffff0000, 0x00030000, "603", 0xffff0000, 0x00030000, "603",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_CAN_NAP, CPU_FTR_CAN_NAP,
COMMON_PPC, COMMON_PPC,
...@@ -72,6 +82,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -72,6 +82,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 603e */ { /* 603e */
0xffff0000, 0x00060000, "603e", 0xffff0000, 0x00060000, "603e",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_CAN_NAP, CPU_FTR_CAN_NAP,
COMMON_PPC, COMMON_PPC,
...@@ -80,6 +91,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -80,6 +91,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 603ev */ { /* 603ev */
0xffff0000, 0x00070000, "603ev", 0xffff0000, 0x00070000, "603ev",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_CAN_NAP, CPU_FTR_CAN_NAP,
COMMON_PPC, COMMON_PPC,
...@@ -88,6 +100,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -88,6 +100,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 604 */ { /* 604 */
0xffff0000, 0x00040000, "604", 0xffff0000, 0x00040000, "604",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON |
CPU_FTR_HPTE_TABLE, CPU_FTR_HPTE_TABLE,
COMMON_PPC, COMMON_PPC,
...@@ -96,6 +109,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -96,6 +109,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 604e */ { /* 604e */
0xfffff000, 0x00090000, "604e", 0xfffff000, 0x00090000, "604e",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON |
CPU_FTR_HPTE_TABLE, CPU_FTR_HPTE_TABLE,
COMMON_PPC, COMMON_PPC,
...@@ -104,6 +118,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -104,6 +118,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 604r */ { /* 604r */
0xffff0000, 0x00090000, "604r", 0xffff0000, 0x00090000, "604r",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON |
CPU_FTR_HPTE_TABLE, CPU_FTR_HPTE_TABLE,
COMMON_PPC, COMMON_PPC,
...@@ -112,6 +127,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -112,6 +127,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 604ev */ { /* 604ev */
0xffff0000, 0x000a0000, "604ev", 0xffff0000, 0x000a0000, "604ev",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON |
CPU_FTR_HPTE_TABLE, CPU_FTR_HPTE_TABLE,
COMMON_PPC, COMMON_PPC,
...@@ -120,6 +136,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -120,6 +136,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 740/750 (0x4202, don't support TAU ?) */ { /* 740/750 (0x4202, don't support TAU ?) */
0xffffffff, 0x00084202, "740/750", 0xffffffff, 0x00084202, "740/750",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP, CPU_FTR_L2CR | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP,
COMMON_PPC, COMMON_PPC,
...@@ -128,6 +145,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -128,6 +145,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 745/755 */ { /* 745/755 */
0xfffff000, 0x00083000, "745/755", 0xfffff000, 0x00083000, "745/755",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP, CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP,
COMMON_PPC, COMMON_PPC,
...@@ -136,6 +154,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -136,6 +154,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 750CX (80100 and 8010x?) */ { /* 750CX (80100 and 8010x?) */
0xfffffff0, 0x00080100, "750CX", 0xfffffff0, 0x00080100, "750CX",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP, CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP,
COMMON_PPC, COMMON_PPC,
...@@ -144,6 +163,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -144,6 +163,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 750CX (82201 and 82202) */ { /* 750CX (82201 and 82202) */
0xfffffff0, 0x00082200, "750CX", 0xfffffff0, 0x00082200, "750CX",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP, CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP,
COMMON_PPC, COMMON_PPC,
...@@ -152,6 +172,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -152,6 +172,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 750CXe (82214) */ { /* 750CXe (82214) */
0xfffffff0, 0x00082210, "750CXe", 0xfffffff0, 0x00082210, "750CXe",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP, CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP,
COMMON_PPC, COMMON_PPC,
...@@ -160,6 +181,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -160,6 +181,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 750FX rev 1.x */ { /* 750FX rev 1.x */
0xffffff00, 0x70000100, "750FX", 0xffffff00, 0x70000100, "750FX",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP |
CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM, CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM,
...@@ -169,6 +191,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -169,6 +191,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 750FX rev 2.0 must disable HID0[DPM] */ { /* 750FX rev 2.0 must disable HID0[DPM] */
0xffffffff, 0x70000200, "750FX", 0xffffffff, 0x70000200, "750FX",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP |
CPU_FTR_NO_DPM, CPU_FTR_NO_DPM,
...@@ -178,6 +201,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -178,6 +201,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 750FX (All revs except 2.0) */ { /* 750FX (All revs except 2.0) */
0xffff0000, 0x70000000, "750FX", 0xffff0000, 0x70000000, "750FX",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP |
CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS, CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS,
...@@ -188,6 +212,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -188,6 +212,7 @@ struct cpu_spec cpu_specs[] = {
{ /* 740/750 (L2CR bit need fixup for 740) */ { /* 740/750 (L2CR bit need fixup for 740) */
0xffff0000, 0x00080000, "740/750", 0xffff0000, 0x00080000, "740/750",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP, CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP,
COMMON_PPC, COMMON_PPC,
...@@ -196,6 +221,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -196,6 +221,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 7400 rev 1.1 ? (no TAU) */ { /* 7400 rev 1.1 ? (no TAU) */
0xffffffff, 0x000c1101, "7400 (1.1)", 0xffffffff, 0x000c1101, "7400 (1.1)",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
CPU_FTR_CAN_NAP, CPU_FTR_CAN_NAP,
...@@ -205,6 +231,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -205,6 +231,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 7400 */ { /* 7400 */
0xffff0000, 0x000c0000, "7400", 0xffff0000, 0x000c0000, "7400",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
CPU_FTR_CAN_NAP, CPU_FTR_CAN_NAP,
...@@ -214,6 +241,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -214,6 +241,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 7410 */ { /* 7410 */
0xffff0000, 0x800c0000, "7410", 0xffff0000, 0x800c0000, "7410",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
CPU_FTR_CAN_NAP, CPU_FTR_CAN_NAP,
...@@ -223,6 +251,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -223,6 +251,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 7450 2.0 - no doze/nap */ { /* 7450 2.0 - no doze/nap */
0xffffffff, 0x80000200, "7450", 0xffffffff, 0x80000200, "7450",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450, CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450,
...@@ -232,6 +261,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -232,6 +261,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 7450 2.1 */ { /* 7450 2.1 */
0xffffffff, 0x80000201, "7450", 0xffffffff, 0x80000201, "7450",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
...@@ -242,6 +272,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -242,6 +272,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 7450 2.3 and newer */ { /* 7450 2.3 and newer */
0xffff0000, 0x80000000, "7450", 0xffff0000, 0x80000000, "7450",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR, CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR,
...@@ -251,6 +282,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -251,6 +282,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 7455 rev 1.x */ { /* 7455 rev 1.x */
0xffffff00, 0x80010100, "7455", 0xffffff00, 0x80010100, "7455",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS, CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS,
...@@ -260,6 +292,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -260,6 +292,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 7455 rev 2.0 */ { /* 7455 rev 2.0 */
0xffffffff, 0x80010200, "7455", 0xffffffff, 0x80010200, "7455",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
...@@ -270,6 +303,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -270,6 +303,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 7455 others */ { /* 7455 others */
0xffff0000, 0x80010000, "7455", 0xffff0000, 0x80010000, "7455",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
...@@ -280,6 +314,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -280,6 +314,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 7457 */ { /* 7457 */
0xffff0000, 0x80020000, "7457", 0xffff0000, 0x80020000, "7457",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
...@@ -290,6 +325,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -290,6 +325,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* 82xx (8240, 8245, 8260 are all 603e cores) */ { /* 82xx (8240, 8245, 8260 are all 603e cores) */
0x7fff0000, 0x00810000, "82xx", 0x7fff0000, 0x00810000, "82xx",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB, CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB,
COMMON_PPC, COMMON_PPC,
32, 32, 32, 32,
...@@ -297,6 +333,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -297,6 +333,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* default match, we assume split I/D cache & TB (non-601)... */ { /* default match, we assume split I/D cache & TB (non-601)... */
0x00000000, 0x00000000, "(generic PPC)", 0x00000000, 0x00000000, "(generic PPC)",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_PPC, COMMON_PPC,
32, 32, 32, 32,
...@@ -306,6 +343,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -306,6 +343,7 @@ struct cpu_spec cpu_specs[] = {
#ifdef CONFIG_PPC64BRIDGE #ifdef CONFIG_PPC64BRIDGE
{ /* Power3 */ { /* Power3 */
0xffff0000, 0x00400000, "Power3 (630)", 0xffff0000, 0x00400000, "Power3 (630)",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_PPC | PPC_FEATURE_64, COMMON_PPC | PPC_FEATURE_64,
128, 128, 128, 128,
...@@ -313,6 +351,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -313,6 +351,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* Power3+ */ { /* Power3+ */
0xffff0000, 0x00410000, "Power3 (630+)", 0xffff0000, 0x00410000, "Power3 (630+)",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_PPC | PPC_FEATURE_64, COMMON_PPC | PPC_FEATURE_64,
128, 128, 128, 128,
...@@ -320,6 +359,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -320,6 +359,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* I-star */ { /* I-star */
0xffff0000, 0x00360000, "I-star", 0xffff0000, 0x00360000, "I-star",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_PPC | PPC_FEATURE_64, COMMON_PPC | PPC_FEATURE_64,
128, 128, 128, 128,
...@@ -327,6 +367,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -327,6 +367,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* S-star */ { /* S-star */
0xffff0000, 0x00370000, "S-star", 0xffff0000, 0x00370000, "S-star",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_PPC | PPC_FEATURE_64, COMMON_PPC | PPC_FEATURE_64,
128, 128, 128, 128,
...@@ -336,6 +377,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -336,6 +377,7 @@ struct cpu_spec cpu_specs[] = {
#ifdef CONFIG_POWER4 #ifdef CONFIG_POWER4
{ /* Power4 */ { /* Power4 */
0xffff0000, 0x00350000, "Power4", 0xffff0000, 0x00350000, "Power4",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_PPC | PPC_FEATURE_64, COMMON_PPC | PPC_FEATURE_64,
128, 128, 128, 128,
...@@ -343,6 +385,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -343,6 +385,7 @@ struct cpu_spec cpu_specs[] = {
}, },
{ /* PPC970 */ { /* PPC970 */
0xffff0000, 0x00390000, "PPC970", 0xffff0000, 0x00390000, "PPC970",
CPU_FTR_COMMON |
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP, CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP,
COMMON_PPC | PPC_FEATURE_64 | PPC_FEATURE_ALTIVEC_COMP, COMMON_PPC | PPC_FEATURE_64 | PPC_FEATURE_ALTIVEC_COMP,
...@@ -494,7 +537,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -494,7 +537,7 @@ struct cpu_spec cpu_specs[] = {
#if !CLASSIC_PPC #if !CLASSIC_PPC
{ /* default match */ { /* default match */
0x00000000, 0x00000000, "(generic PPC)", 0x00000000, 0x00000000, "(generic PPC)",
0, CPU_FTR_COMMON,
PPC_FEATURE_32, PPC_FEATURE_32,
32, 32, 32, 32,
0, 0,
......
arch/ppc/kernel/process.c
View file @ ed2f05a9
...@@ -273,8 +273,8 @@ void show_regs(struct pt_regs * regs) ...@@ -273,8 +273,8 @@ void show_regs(struct pt_regs * regs)
trap = TRAP(regs); trap = TRAP(regs);
if (trap == 0x300 || trap == 0x600) if (trap == 0x300 || trap == 0x600)
printk("DAR: %08lX, DSISR: %08lX\n", regs->dar, regs->dsisr); printk("DAR: %08lX, DSISR: %08lX\n", regs->dar, regs->dsisr);
printk("TASK = %p[%d] '%s' ", printk("TASK = %p[%d] '%s' THREAD: %p",
current, current->pid, current->comm); current, current->pid, current->comm, current->thread_info);
printk("Last syscall: %ld ", current->thread.last_syscall); printk("Last syscall: %ld ", current->thread.last_syscall);
#if defined(CONFIG_4xx) && defined(DCRN_PLB0_BEAR) #if defined(CONFIG_4xx) && defined(DCRN_PLB0_BEAR)
...@@ -303,6 +303,16 @@ void show_regs(struct pt_regs * regs) ...@@ -303,6 +303,16 @@ void show_regs(struct pt_regs * regs)
break; break;
} }
printk("\n"); printk("\n");
#ifdef CONFIG_KALLSYMS
/*
* Lookup NIP late so we have the best change of getting the
* above info out without failing
*/
printk("NIP [%08lx] ", regs->nip);
print_symbol("%s\n", regs->nip);
printk("LR [%08lx] ", regs->link);
print_symbol("%s\n", regs->link);
#endif
show_stack(current, (unsigned long *) regs->gpr[1]); show_stack(current, (unsigned long *) regs->gpr[1]);
} }
......
arch/ppc/kernel/signal.c
View file @ ed2f05a9
...@@ -361,7 +361,7 @@ handle_rt_signal(unsigned long sig, struct k_sigaction *ka, ...@@ -361,7 +361,7 @@ handle_rt_signal(unsigned long sig, struct k_sigaction *ka,
return; return;
badframe: badframe:
#if DEBUG_SIG #ifdef DEBUG_SIG
printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n", printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
regs, frame, newsp); regs, frame, newsp);
#endif #endif
...@@ -513,7 +513,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, ...@@ -513,7 +513,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
return; return;
badframe: badframe:
#if DEBUG_SIG #ifdef DEBUG_SIG
printk("badframe in handle_signal, regs=%p frame=%lx newsp=%lx\n", printk("badframe in handle_signal, regs=%p frame=%lx newsp=%lx\n",
regs, frame, *newspp); regs, frame, *newspp);
#endif #endif
......
arch/ppc/mm/hashtable.S
View file @ ed2f05a9
...@@ -346,9 +346,9 @@ _GLOBAL(create_hpte) ...@@ -346,9 +346,9 @@ _GLOBAL(create_hpte)
rlwimi r5,r5,32-2,31,31 /* _PAGE_USER -> PP lsb */ rlwimi r5,r5,32-2,31,31 /* _PAGE_USER -> PP lsb */
ori r8,r8,0xe14 /* clear out reserved bits and M */ ori r8,r8,0xe14 /* clear out reserved bits and M */
andc r8,r5,r8 /* PP = user? (rw&dirty? 2: 3): 0 */ andc r8,r5,r8 /* PP = user? (rw&dirty? 2: 3): 0 */
#ifdef CONFIG_SMP BEGIN_FTR_SECTION
ori r8,r8,_PAGE_COHERENT /* set M (coherence required) */ ori r8,r8,_PAGE_COHERENT /* set M (coherence required) */
#endif END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT)
/* Construct the high word of the PPC-style PTE (r5) */ /* Construct the high word of the PPC-style PTE (r5) */
#ifndef CONFIG_PPC64BRIDGE #ifndef CONFIG_PPC64BRIDGE
......
arch/ppc/mm/ppc_mmu.c
View file @ ed2f05a9
...@@ -137,10 +137,10 @@ void __init setbat(int index, unsigned long virt, unsigned long phys, ...@@ -137,10 +137,10 @@ void __init setbat(int index, unsigned long virt, unsigned long phys,
int wimgxpp; int wimgxpp;
union ubat *bat = BATS[index]; union ubat *bat = BATS[index];
#ifdef CONFIG_SMP if (((flags & _PAGE_NO_CACHE) == 0) &&
if ((flags & _PAGE_NO_CACHE) == 0) (cur_cpu_spec[0]->cpu_features & CPU_FTR_NEED_COHERENT))
flags |= _PAGE_COHERENT; flags |= _PAGE_COHERENT;
#endif
bl = (size >> 17) - 1; bl = (size >> 17) - 1;
if (PVR_VER(mfspr(PVR)) != 1) { if (PVR_VER(mfspr(PVR)) != 1) {
/* 603, 604, etc. */ /* 603, 604, etc. */
......
arch/ppc/platforms/Makefile
View file @ ed2f05a9
...@@ -35,7 +35,7 @@ obj-$(CONFIG_EV64260) += ev64260_setup.o ...@@ -35,7 +35,7 @@ obj-$(CONFIG_EV64260) += ev64260_setup.o
obj-$(CONFIG_GEMINI) += gemini_pci.o gemini_setup.o gemini_prom.o obj-$(CONFIG_GEMINI) += gemini_pci.o gemini_setup.o gemini_prom.o
obj-$(CONFIG_K2) += k2_setup.o k2_pci.o obj-$(CONFIG_K2) += k2_setup.o k2_pci.o
obj-$(CONFIG_LOPEC) += lopec_setup.o lopec_pci.o obj-$(CONFIG_LOPEC) += lopec_setup.o lopec_pci.o
obj-$(CONFIG_MCPN765) += mcpn765_setup.o mcpn765_pci.o obj-$(CONFIG_MCPN765) += mcpn765.o
obj-$(CONFIG_MENF1) += menf1_setup.o menf1_pci.o obj-$(CONFIG_MENF1) += menf1_setup.o menf1_pci.o
obj-$(CONFIG_MVME5100) += mvme5100_setup.o mvme5100_pci.o obj-$(CONFIG_MVME5100) += mvme5100_setup.o mvme5100_pci.o
obj-$(CONFIG_PAL4) += pal4_setup.o pal4_pci.o obj-$(CONFIG_PAL4) += pal4_setup.o pal4_pci.o
......
arch/ppc/platforms/gemini_setup.c
View file @ ed2f05a9
...@@ -401,12 +401,12 @@ gemini_set_rtc_time( unsigned long now ) ...@@ -401,12 +401,12 @@ gemini_set_rtc_time( unsigned long now )
to_tm( now, &tm ); to_tm( now, &tm );
reg = gemini_rtc_read(M48T35_RTC_CONTROL); reg = gemini_rtc_read(M48T35_RTC_CONTROL);
#if DEBUG_RTC #ifdef DEBUG_RTC
printk("set rtc: reg = %x\n", reg); printk("set rtc: reg = %x\n", reg);
#endif #endif
gemini_rtc_write((reg|M48T35_RTC_SET), M48T35_RTC_CONTROL); gemini_rtc_write((reg|M48T35_RTC_SET), M48T35_RTC_CONTROL);
#if DEBUG_RTC #ifdef DEBUG_RTC
printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n", printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n",
tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year); tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year);
#endif #endif
......
arch/ppc/platforms/mcpn765_setup.c → arch/ppc/platforms/mcpn765.c
View file @ ed2f05a9
/* /*
* arch/ppc/platforms/mcpn765_setup.c * arch/ppc/platforms/mcpn765.c
* *
* Board setup routines for the Motorola MCG MCPN765 cPCI Board. * Board setup routines for the Motorola MCG MCPN765 cPCI Board.
* *
* Author: Mark A. Greer * Author: Mark A. Greer
* mgreer@mvista.com * mgreer@mvista.com
* *
* Modified by Randy Vinson (rvinson@mvista.com)
*
* 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program * the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express * is licensed "as is" without any warranty of any kind, whether express
...@@ -28,18 +30,22 @@ ...@@ -28,18 +30,22 @@
#include <linux/console.h> #include <linux/console.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/irq.h> #include <linux/irq.h>
#if 0
#include <linux/ide.h> #include <linux/ide.h>
#endif
#include <linux/seq_file.h> #include <linux/seq_file.h>
#include <linux/root_dev.h> #include <linux/root_dev.h>
#include <linux/serial.h> #include <linux/serial.h>
#include <linux/tty.h> /* for linux/serial_core.h */ #include <linux/tty.h> /* for linux/serial_core.h */
#include <linux/serial_core.h> #include <linux/serial_core.h>
#include <linux/slab.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/page.h> #include <asm/page.h>
#include <asm/time.h> #include <asm/time.h>
#include <asm/dma.h> #include <asm/dma.h>
#include <asm/byteorder.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/machdep.h> #include <asm/machdep.h>
#include <asm/prom.h> #include <asm/prom.h>
...@@ -48,8 +54,10 @@ ...@@ -48,8 +54,10 @@
#include <asm/i8259.h> #include <asm/i8259.h>
#include <asm/todc.h> #include <asm/todc.h>
#include <asm/pci-bridge.h> #include <asm/pci-bridge.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/bootinfo.h> #include <asm/bootinfo.h>
#include <asm/pplus.h> #include <asm/hawk.h>
#include <asm/kgdb.h> #include <asm/kgdb.h>
#include "mcpn765.h" #include "mcpn765.h"
...@@ -75,69 +83,229 @@ static u_char mcpn765_openpic_initsenses[] __initdata = { ...@@ -75,69 +83,229 @@ static u_char mcpn765_openpic_initsenses[] __initdata = {
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 31: RTC Alarm */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 31: RTC Alarm */
}; };
extern void mcpn765_set_VIA_IDE_native(void);
extern u_int openpic_irq(void); extern u_int openpic_irq(void);
extern char cmd_line[]; extern char cmd_line[];
extern void gen550_progress(char *, unsigned short);
extern void gen550_init(int, struct uart_port *);
int use_of_interrupt_tree = 0; int use_of_interrupt_tree = 0;
static void mcpn765_halt(void); static void mcpn765_halt(void);
TODC_ALLOC(); TODC_ALLOC();
#if defined(CONFIG_SERIAL_8250) && \ /*
(defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)) * Motorola MCG MCPN765 interrupt routing.
static void __init */
mcpn765_early_serial_map(void) static inline int
mcpn765_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{ 14, 0, 0, 0 }, /* IDSEL 11 - have to manually set */
{ 0, 0, 0, 0 }, /* IDSEL 12 - unused */
{ 0, 0, 0, 0 }, /* IDSEL 13 - unused */
{ 18, 0, 0, 0 }, /* IDSEL 14 - Enet 0 */
{ 0, 0, 0, 0 }, /* IDSEL 15 - unused */
{ 25, 26, 27, 28 }, /* IDSEL 16 - PMC Slot 1 */
{ 28, 25, 26, 27 }, /* IDSEL 17 - PMC Slot 2 */
{ 0, 0, 0, 0 }, /* IDSEL 18 - PMC 2B Connector XXXX */
{ 29, 0, 0, 0 }, /* IDSEL 19 - Enet 1 */
{ 20, 0, 0, 0 }, /* IDSEL 20 - 21554 cPCI bridge */
};
const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
}
void __init
mcpn765_set_VIA_IDE_legacy(void)
{ {
struct uart_port serial_req; unsigned short vend, dev;
early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_VENDOR_ID, &vend);
early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_DEVICE_ID, &dev);
if ((vend == PCI_VENDOR_ID_VIA) &&
(dev == PCI_DEVICE_ID_VIA_82C586_1)) {
unsigned char temp;
/* put back original "standard" port base addresses */
early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
PCI_BASE_ADDRESS_0, 0x1f1);
early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
PCI_BASE_ADDRESS_1, 0x3f5);
early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
PCI_BASE_ADDRESS_2, 0x171);
early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
PCI_BASE_ADDRESS_3, 0x375);
early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
PCI_BASE_ADDRESS_4, 0xcc01);
/* put into legacy mode */
early_read_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
&temp);
temp &= ~0x05;
early_write_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
temp);
}
}
/* Setup serial port access */ void
memset(&serial_req, 0, sizeof(serial_req)); mcpn765_set_VIA_IDE_native(void)
serial_req.uartclk = UART_CLK; {
serial_req.irq = 17; unsigned short vend, dev;
serial_req.flags = STD_COM_FLAGS;
serial_req.iotype = SERIAL_IO_MEM; early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_VENDOR_ID, &vend);
serial_req.membase = (u_char *)MCPN765_SERIAL_1; early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_DEVICE_ID, &dev);
serial_req.regshift = 4;
gen550_init(0, &serial_req); if ((vend == PCI_VENDOR_ID_VIA) &&
(dev == PCI_DEVICE_ID_VIA_82C586_1)) {
if (early_serial_setup(&serial_req) != 0) unsigned char temp;
printk(KERN_ERR "Early serial init of port 0 failed\n");
/* Assume early_serial_setup() doesn't modify serial_req */ /* put into native mode */
serial_req.line = 1; early_read_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
serial_req.irq = 17; &temp);
serial_req.membase = (u_char *)MCPN765_SERIAL_2; temp |= 0x05;
early_write_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
temp);
}
}
gen550_init(1, &serial_req); /*
* Initialize the VIA 82c586b.
*/
static void __init
mcpn765_setup_via_82c586b(void)
{
struct pci_dev *dev;
u_char c;
if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_82C586_0,
NULL)) == NULL) {
printk("No VIA ISA bridge found\n");
mcpn765_halt();
/* NOTREACHED */
}
/*
* If the firmware left the EISA 4d0/4d1 ports enabled, make sure
* IRQ 14 is set for edge.
*/
pci_read_config_byte(dev, 0x47, &c);
if (early_serial_setup(&serial_req) != 0) if (c & (1<<5)) {
printk(KERN_ERR "Early serial init of port 1 failed\n"); c = inb(0x4d1);
c &= ~(1<<6);
outb(c, 0x4d1);
}
/* Assume early_serial_setup() doesn't modify serial_req */ /* Disable PNP IRQ routing since we use the Hawk's MPIC */
serial_req.line = 2; pci_write_config_dword(dev, 0x54, 0);
serial_req.irq = 17; pci_write_config_byte(dev, 0x58, 0);
serial_req.membase = (u_char *)MCPN765_SERIAL_3;
gen550_init(2, &serial_req);
if (early_serial_setup(&serial_req) != 0) if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
printk(KERN_ERR "Early serial init of port 2 failed\n"); PCI_DEVICE_ID_VIA_82C586_1,
NULL)) == NULL) {
printk("No VIA ISA bridge found\n");
mcpn765_halt();
/* NOTREACHED */
}
/* Assume early_serial_setup() doesn't modify serial_req */ /*
serial_req.line = 3; * PPCBug doesn't set the enable bits for the IDE device.
serial_req.irq = 17; * Turn them on now.
serial_req.membase = (u_char *)MCPN765_SERIAL_4; */
pci_read_config_byte(dev, 0x40, &c);
c |= 0x03;
pci_write_config_byte(dev, 0x40, c);
gen550_init(3, &serial_req); return;
}
if (early_serial_setup(&serial_req) != 0) void __init
printk(KERN_ERR "Early serial init of port 3 failed\n"); mcpn765_pcibios_fixup(void)
{
/* Do MCPN765 board specific initialization. */
mcpn765_setup_via_82c586b();
} }
#endif
void __init
mcpn765_find_bridges(void)
{
struct pci_controller *hose;
hose = pcibios_alloc_controller();
if (!hose)
return;
hose->first_busno = 0;
hose->last_busno = 0xff;
hose->pci_mem_offset = MCPN765_PCI_PHY_MEM_OFFSET;
pci_init_resource(&hose->io_resource,
MCPN765_PCI_IO_START,
MCPN765_PCI_IO_END,
IORESOURCE_IO,
"PCI host bridge");
pci_init_resource(&hose->mem_resources[0],
MCPN765_PCI_MEM_START,
MCPN765_PCI_MEM_END,
IORESOURCE_MEM,
"PCI host bridge");
hose->io_space.start = MCPN765_PCI_IO_START;
hose->io_space.end = MCPN765_PCI_IO_END;
hose->mem_space.start = MCPN765_PCI_MEM_START;
hose->mem_space.end = MCPN765_PCI_MEM_END - HAWK_MPIC_SIZE;
if (hawk_init(hose,
MCPN765_HAWK_PPC_REG_BASE,
MCPN765_PROC_PCI_MEM_START,
MCPN765_PROC_PCI_MEM_END - HAWK_MPIC_SIZE,
MCPN765_PROC_PCI_IO_START,
MCPN765_PROC_PCI_IO_END,
MCPN765_PCI_MEM_END - HAWK_MPIC_SIZE + 1) != 0) {
printk("Could not initialize HAWK bridge\n");
}
/* VIA IDE BAR decoders are only 16-bits wide. PCI Auto Config
* will reassign the bars outside of 16-bit I/O space, which will
* "break" things. To prevent this, we'll set the IDE chip into
* legacy mode and seed the bars with their legacy addresses (in 16-bit
* I/O space). The Auto Config code will skip the IDE contoller in
* legacy mode, so our bar values will stick.
*/
mcpn765_set_VIA_IDE_legacy();
hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
/* Now that we've got 16-bit addresses in the bars, we can switch the
* IDE controller back into native mode so we can do "modern" resource
* and interrupt management.
*/
mcpn765_set_VIA_IDE_native();
ppc_md.pcibios_fixup = mcpn765_pcibios_fixup;
ppc_md.pcibios_fixup_bus = NULL;
ppc_md.pci_swizzle = common_swizzle;
ppc_md.pci_map_irq = mcpn765_map_irq;
return;
}
static void __init static void __init
mcpn765_setup_arch(void) mcpn765_setup_arch(void)
{ {
...@@ -190,39 +358,9 @@ mcpn765_setup_arch(void) ...@@ -190,39 +358,9 @@ mcpn765_setup_arch(void)
return; return;
} }
/*
* Initialize the VIA 82c586b.
*/
static void __init
mcpn765_setup_via_82c586b(void)
{
struct pci_dev *dev;
u_char c;
if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_82C586_1,
NULL)) == NULL) {
printk("No VIA ISA bridge found\n");
mcpn765_halt();
/* NOTREACHED */
}
/*
* PPCBug doesn't set the enable bits for the IDE device.
* Turn them on now.
*/
pci_read_config_byte(dev, 0x40, &c);
c |= 0x03;
pci_write_config_byte(dev, 0x40, c);
return;
}
static void __init static void __init
mcpn765_init2(void) mcpn765_init2(void)
{ {
/* Do MCPN765 board specific initialization. */
mcpn765_setup_via_82c586b();
request_region(0x00,0x20,"dma1"); request_region(0x00,0x20,"dma1");
request_region(0x20,0x20,"pic1"); request_region(0x20,0x20,"pic1");
...@@ -271,7 +409,7 @@ mcpn765_irq_canonicalize(u32 irq) ...@@ -271,7 +409,7 @@ mcpn765_irq_canonicalize(u32 irq)
static unsigned long __init static unsigned long __init
mcpn765_find_end_of_memory(void) mcpn765_find_end_of_memory(void)
{ {
return pplus_get_mem_size(MCPN765_HAWK_SMC_BASE); return hawk_get_mem_size(MCPN765_HAWK_SMC_BASE);
} }
static void __init static void __init
...@@ -285,6 +423,9 @@ mcpn765_reset_board(void) ...@@ -285,6 +423,9 @@ mcpn765_reset_board(void)
{ {
local_irq_disable(); local_irq_disable();
/* set VIA IDE controller into native mode */
mcpn765_set_VIA_IDE_native();
/* Set exception prefix high - to the firmware */ /* Set exception prefix high - to the firmware */
_nmask_and_or_msr(0, MSR_IP); _nmask_and_or_msr(0, MSR_IP);
...@@ -328,92 +469,6 @@ mcpn765_show_cpuinfo(struct seq_file *m) ...@@ -328,92 +469,6 @@ mcpn765_show_cpuinfo(struct seq_file *m)
return 0; return 0;
} }
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
/*
* IDE support.
*/
static int mcpn765_ide_ports_known = 0;
static unsigned long mcpn765_ide_regbase[MAX_HWIFS];
static unsigned long mcpn765_ide_ctl_regbase[MAX_HWIFS];
static unsigned long mcpn765_idedma_regbase;
static void
mcpn765_ide_probe(void)
{
struct pci_dev *pdev = pci_find_device(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_82C586_1,
NULL);
if(pdev) {
mcpn765_ide_regbase[0]=pdev->resource[0].start;
mcpn765_ide_regbase[1]=pdev->resource[2].start;
mcpn765_ide_ctl_regbase[0]=pdev->resource[1].start;
mcpn765_ide_ctl_regbase[1]=pdev->resource[3].start;
mcpn765_idedma_regbase=pdev->resource[4].start;
}
mcpn765_ide_ports_known = 1;
return;
}
static int
mcpn765_ide_default_irq(unsigned long base)
{
if (mcpn765_ide_ports_known == 0)
mcpn765_ide_probe();
if (base == mcpn765_ide_regbase[0])
return 14;
else if (base == mcpn765_ide_regbase[1])
return 14;
else
return 0;
}
static unsigned long
mcpn765_ide_default_io_base(int index)
{
if (mcpn765_ide_ports_known == 0)
mcpn765_ide_probe();
return mcpn765_ide_regbase[index];
}
static void __init
mcpn765_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
unsigned long reg = data_port;
uint alt_status_base;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg++;
}
if (data_port == mcpn765_ide_regbase[0]) {
alt_status_base = mcpn765_ide_ctl_regbase[0] + 2;
hw->irq = 14;
} else if (data_port == mcpn765_ide_regbase[1]) {
alt_status_base = mcpn765_ide_ctl_regbase[1] + 2;
hw->irq = 14;
} else {
alt_status_base = 0;
hw->irq = 0;
}
if (ctrl_port)
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
else
hw->io_ports[IDE_CONTROL_OFFSET] = alt_status_base;
if (irq != NULL)
*irq = hw->irq;
return;
}
#endif
/* /*
* Set BAT 3 to map 0xf0000000 to end of physical memory space. * Set BAT 3 to map 0xf0000000 to end of physical memory space.
*/ */
...@@ -467,21 +522,11 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ...@@ -467,21 +522,11 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
ppc_md.heartbeat_reset = 0; ppc_md.heartbeat_reset = 0;
ppc_md.heartbeat_count = 0; ppc_md.heartbeat_count = 0;
#if defined(CONFIG_SERIAL_8250) && \
(defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG))
mcpn765_early_serial_map();
#ifdef CONFIG_KGDB
ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
#endif
#ifdef CONFIG_SERIAL_TEXT_DEBUG #ifdef CONFIG_SERIAL_TEXT_DEBUG
ppc_md.progress = gen550_progress; ppc_md.progress = gen550_progress;
#endif #endif
#endif #ifdef CONFIG_KGDB
ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
ppc_ide_md.default_irq = mcpn765_ide_default_irq;
ppc_ide_md.default_io_base = mcpn765_ide_default_io_base;
ppc_ide_md.ide_init_hwif = mcpn765_ide_init_hwif_ports;
#endif #endif
return; return;
......
arch/ppc/platforms/mcpn765_pci.c deleted 100644 → 0
View file @ 7ce42ae1
/*
* arch/ppc/platforms/mcpn765_pci.c
*
* PCI setup routines for the Motorola MCG MCPN765 cPCI board.
*
* Author: Mark A. Greer
* mgreer@mvista.com
*
* 2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/pplus.h>
#include "mcpn765.h"
/*
* Motorola MCG MCPN765 interrupt routing.
*/
static inline int
mcpn765_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{ 14, 0, 0, 0 }, /* IDSEL 11 - have to manually set */
{ 0, 0, 0, 0 }, /* IDSEL 12 - unused */
{ 0, 0, 0, 0 }, /* IDSEL 13 - unused */
{ 18, 0, 0, 0 }, /* IDSEL 14 - Enet 0 */
{ 0, 0, 0, 0 }, /* IDSEL 15 - unused */
{ 25, 26, 27, 28 }, /* IDSEL 16 - PMC Slot 1 */
{ 28, 25, 26, 27 }, /* IDSEL 17 - PMC Slot 2 */
{ 0, 0, 0, 0 }, /* IDSEL 18 - PMC 2B Connector XXXX */
{ 29, 0, 0, 0 }, /* IDSEL 19 - Enet 1 */
{ 20, 0, 0, 0 }, /* IDSEL 20 - 21554 cPCI bridge */
};
const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
}
void __init
mcpn765_find_bridges(void)
{
struct pci_controller *hose;
hose = pcibios_alloc_controller();
if (!hose)
return;
hose->first_busno = 0;
hose->last_busno = 0xff;
hose->pci_mem_offset = MCPN765_PCI_PHY_MEM_OFFSET;
pci_init_resource(&hose->io_resource,
MCPN765_PCI_IO_START,
MCPN765_PCI_IO_END,
IORESOURCE_IO,
"PCI host bridge");
pci_init_resource(&hose->mem_resources[0],
MCPN765_PCI_MEM_START,
MCPN765_PCI_MEM_END,
IORESOURCE_MEM,
"PCI host bridge");
hose->io_space.start = MCPN765_PCI_IO_START;
hose->io_space.end = MCPN765_PCI_IO_END;
hose->mem_space.start = MCPN765_PCI_MEM_START;
hose->mem_space.end = MCPN765_PCI_MEM_END - PPLUS_MPIC_SIZE;
if (pplus_init(hose,
MCPN765_HAWK_PPC_REG_BASE,
MCPN765_PROC_PCI_MEM_START,
MCPN765_PROC_PCI_MEM_END - PPLUS_MPIC_SIZE,
MCPN765_PROC_PCI_IO_START,
MCPN765_PROC_PCI_IO_END,
MCPN765_PCI_MEM_END - PPLUS_MPIC_SIZE + 1) != 0) {
printk("Could not initialize HAWK bridge\n");
}
hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
ppc_md.pcibios_fixup = NULL;
ppc_md.pcibios_fixup_bus = NULL;
ppc_md.pci_swizzle = common_swizzle;
ppc_md.pci_map_irq = mcpn765_map_irq;
return;
}
arch/ppc/platforms/pplus.c
View file @ ed2f05a9
...@@ -513,7 +513,7 @@ void __init pplus_find_bridges(void) ...@@ -513,7 +513,7 @@ void __init pplus_find_bridges(void)
hose->mem_space.start = PPLUS_PCI_MEM_START; hose->mem_space.start = PPLUS_PCI_MEM_START;
hose->mem_space.end = PPLUS_PCI_MEM_END - HAWK_MPIC_SIZE; hose->mem_space.end = PPLUS_PCI_MEM_END - HAWK_MPIC_SIZE;
if (pplus_init(hose, PPLUS_HAWK_PPC_REG_BASE, PPLUS_PROC_PCI_MEM_START, if (hawk_init(hose, PPLUS_HAWK_PPC_REG_BASE, PPLUS_PROC_PCI_MEM_START,
PPLUS_PROC_PCI_MEM_END - HAWK_MPIC_SIZE, PPLUS_PROC_PCI_MEM_END - HAWK_MPIC_SIZE,
PPLUS_PROC_PCI_IO_START, PPLUS_PROC_PCI_IO_END, PPLUS_PROC_PCI_IO_START, PPLUS_PROC_PCI_IO_END,
PPLUS_PROC_PCI_MEM_END - HAWK_MPIC_SIZE + 1) PPLUS_PROC_PCI_MEM_END - HAWK_MPIC_SIZE + 1)
...@@ -816,7 +816,7 @@ static unsigned long __init pplus_find_end_of_memory(void) ...@@ -816,7 +816,7 @@ static unsigned long __init pplus_find_end_of_memory(void)
dump_dbats(); dump_dbats();
#endif #endif
total = pplus_get_mem_size(PPLUS_HAWK_SMC_BASE); total = hawk_get_mem_size(PPLUS_HAWK_SMC_BASE);
return (total); return (total);
} }
......
arch/ppc/platforms/pplus.h
View file @ ed2f05a9
...@@ -64,14 +64,4 @@ ...@@ -64,14 +64,4 @@
#define PPLUS_VGA_MEM_BASE 0xf0000000U #define PPLUS_VGA_MEM_BASE 0xf0000000U
extern int pplus_init(struct pci_controller *hose, #endif /* __PPC_PPLUS_H */
unsigned int ppc_reg_base, unsigned long processor_pci_mem_start,
unsigned long processor_pci_mem_end,
unsigned long processor_pci_io_start,
unsigned long processor_pci_io_end,
unsigned long processor_mpic_base);
extern unsigned long pplus_get_mem_size(unsigned int smc_base);
extern int pplus_mpic_init(unsigned int pci_mem_offset);
#endif /* __PPC_PPLUS_H */
arch/ppc/platforms/prep_pci.c
View file @ ed2f05a9
...@@ -311,11 +311,11 @@ static char Genesis2_pci_IRQ_map[23] __prepdata = ...@@ -311,11 +311,11 @@ static char Genesis2_pci_IRQ_map[23] __prepdata =
0, /* Slot 7 - unused */ 0, /* Slot 7 - unused */
0, /* Slot 8 - unused */ 0, /* Slot 8 - unused */
0, /* Slot 9 - unused */ 0, /* Slot 9 - unused */
0, /* Slot 10 - Ethernet */ 0, /* Slot 10 - unused */
0, /* Slot 11 - Universe PCI - VME Bridge */ 0, /* Slot 11 - IDE */
3, /* Slot 12 - unused */ 3, /* Slot 12 - SCSI */
0, /* Slot 13 - unused */ 5, /* Slot 13 - Universe PCI - VME Bridge */
2, /* Slot 14 - SCSI */ 2, /* Slot 14 - Ethernet */
0, /* Slot 15 - unused */ 0, /* Slot 15 - unused */
9, /* Slot 16 - PMC 1 */ 9, /* Slot 16 - PMC 1 */
12, /* Slot 17 - pci */ 12, /* Slot 17 - pci */
......
arch/ppc/platforms/prep_setup.c
View file @ ed2f05a9
...@@ -323,7 +323,7 @@ prep_carolina_cpuinfo(struct seq_file *m) ...@@ -323,7 +323,7 @@ prep_carolina_cpuinfo(struct seq_file *m)
/* L2 size */ /* L2 size */
if ((l2_reg & 0x60) == 0) if ((l2_reg & 0x60) == 0)
seq_printf(m, "256KiB"); seq_printf(m, "256KiB");
else if ((l2_reg & 0x60) == 1) else if ((l2_reg & 0x60) == 0x20)
seq_printf(m, "512KiB"); seq_printf(m, "512KiB");
else else
seq_printf(m, "unknown size"); seq_printf(m, "unknown size");
...@@ -725,6 +725,7 @@ prep_setup_arch(void) ...@@ -725,6 +725,7 @@ prep_setup_arch(void)
case PREP_IBM_CAROLINA_IDE_0: case PREP_IBM_CAROLINA_IDE_0:
case PREP_IBM_CAROLINA_IDE_1: case PREP_IBM_CAROLINA_IDE_1:
case PREP_IBM_CAROLINA_IDE_2: case PREP_IBM_CAROLINA_IDE_2:
case PREP_IBM_CAROLINA_IDE_3:
is_ide = 1; is_ide = 1;
case PREP_IBM_CAROLINA_SCSI_0: case PREP_IBM_CAROLINA_SCSI_0:
case PREP_IBM_CAROLINA_SCSI_1: case PREP_IBM_CAROLINA_SCSI_1:
......
arch/ppc/syslib/Makefile
View file @ ed2f05a9
...@@ -42,28 +42,24 @@ obj-$(CONFIG_EV64260) += gt64260_common.o gt64260_pic.o \ ...@@ -42,28 +42,24 @@ obj-$(CONFIG_EV64260) += gt64260_common.o gt64260_pic.o \
obj-$(CONFIG_GEMINI) += open_pic.o i8259.o indirect_pci.o obj-$(CONFIG_GEMINI) += open_pic.o i8259.o indirect_pci.o
obj-$(CONFIG_K2) += i8259.o indirect_pci.o todc_time.o \ obj-$(CONFIG_K2) += i8259.o indirect_pci.o todc_time.o \
pci_auto.o pci_auto.o
obj-$(CONFIG_LOPEC) += mpc10x_common.o indirect_pci.o pci_auto.o \ obj-$(CONFIG_LOPEC) += pci_auto.o open_pic.o i8259.o todc_time.o
open_pic.o i8259.o todc_time.o
obj-$(CONFIG_MCPN765) += todc_time.o indirect_pci.o pci_auto.o \ obj-$(CONFIG_MCPN765) += todc_time.o indirect_pci.o pci_auto.o \
open_pic.o i8259.o pplus_common.o open_pic.o i8259.o hawk_common.o
obj-$(CONFIG_MENF1) += todc_time.o i8259.o mpc10x_common.o \ obj-$(CONFIG_MENF1) += todc_time.o i8259.o mpc10x_common.o \
pci_auto.o indirect_pci.o pci_auto.o indirect_pci.o
obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o indirect_pci.o \ obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o indirect_pci.o \
i8259.o pci_auto.o pplus_common.o i8259.o pci_auto.o hawk_common.o
obj-$(CONFIG_OCOTEA) += indirect_pci.o pci_auto.o todc_time.o obj-$(CONFIG_OCOTEA) += indirect_pci.o pci_auto.o todc_time.o
obj-$(CONFIG_PAL4) += cpc700_pic.o obj-$(CONFIG_PAL4) += cpc700_pic.o
obj-$(CONFIG_PCORE) += mpc10x_common.o todc_time.o i8259.o \ obj-$(CONFIG_PCORE) += todc_time.o i8259.o pci_auto.o
indirect_pci.o pci_auto.o obj-$(CONFIG_POWERPMC250) += open_pic.o pci_auto.o
obj-$(CONFIG_POWERPMC250) += open_pic.o mpc10x_common.o \ obj-$(CONFIG_PPLUS) += hawk_common.o open_pic.o i8259.o \
indirect_pci.o pci_auto.o
obj-$(CONFIG_PPLUS) += pplus_common.o open_pic.o i8259.o \
indirect_pci.o todc_time.o pci_auto.o indirect_pci.o todc_time.o pci_auto.o
obj-$(CONFIG_PRPMC750) += open_pic.o indirect_pci.o pci_auto.o \ obj-$(CONFIG_PRPMC750) += open_pic.o indirect_pci.o pci_auto.o \
pplus_common.o hawk_common.o
obj-$(CONFIG_PRPMC800) += open_pic.o indirect_pci.o pci_auto.o \ obj-$(CONFIG_PRPMC800) += open_pic.o indirect_pci.o pci_auto.o \
pplus_common.o harrier.o hawk_common.o harrier.o
obj-$(CONFIG_SANDPOINT) += i8259.o open_pic.o mpc10x_common.o \ obj-$(CONFIG_SANDPOINT) += i8259.o open_pic.o pci_auto.o todc_time.o
pci_auto.o indirect_pci.o todc_time.o
obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \ obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \
todc_time.o todc_time.o
obj-$(CONFIG_8260) += m8260_setup.o ppc8260_pic.o obj-$(CONFIG_8260) += m8260_setup.o ppc8260_pic.o
...@@ -72,3 +68,4 @@ obj-$(CONFIG_KGDB) += gen550_kgdb.o gen550_dbg.o ...@@ -72,3 +68,4 @@ obj-$(CONFIG_KGDB) += gen550_kgdb.o gen550_dbg.o
obj-$(CONFIG_SERIAL_TEXT_DEBUG) += gen550_dbg.o obj-$(CONFIG_SERIAL_TEXT_DEBUG) += gen550_dbg.o
endif endif
obj-$(CONFIG_BOOTX_TEXT) += btext.o obj-$(CONFIG_BOOTX_TEXT) += btext.o
obj-$(CONFIG_MPC10X_BRIDGE) += mpc10x_common.o indirect_pci.o
arch/ppc/syslib/pplus_common.c → arch/ppc/syslib/hawk_common.c
View file @ ed2f05a9
/* /*
* arch/ppc/syslib/pplus_common.c * arch/ppc/syslib/hawk_common.c
* *
* Common Motorola PowerPlus Platform--really Falcon/Raven or HAWK. * Common Motorola PowerPlus Platform--really Falcon/Raven or HAWK.
* *
...@@ -44,7 +44,7 @@ ...@@ -44,7 +44,7 @@
* 'OpenPIC_Addr' will be set correctly by this routine. * 'OpenPIC_Addr' will be set correctly by this routine.
*/ */
int __init int __init
pplus_init(struct pci_controller *hose, hawk_init(struct pci_controller *hose,
uint ppc_reg_base, uint ppc_reg_base,
ulong processor_pci_mem_start, ulong processor_pci_mem_start,
ulong processor_pci_mem_end, ulong processor_pci_mem_end,
...@@ -59,14 +59,14 @@ pplus_init(struct pci_controller *hose, ...@@ -59,14 +59,14 @@ pplus_init(struct pci_controller *hose,
*/ */
if (((processor_pci_mem_start&0xffff0000) != processor_pci_mem_start) || if (((processor_pci_mem_start&0xffff0000) != processor_pci_mem_start) ||
((processor_pci_io_start &0xffff0000) != processor_pci_io_start)) { ((processor_pci_io_start &0xffff0000) != processor_pci_io_start)) {
printk("pplus_init: %s\n", printk("hawk_init: %s\n",
"PPC to PCI mappings must start on 64 KB boundaries"); "PPC to PCI mappings must start on 64 KB boundaries");
return -1; return -1;
} }
if (((processor_pci_mem_end &0x0000ffff) != 0x0000ffff) || if (((processor_pci_mem_end &0x0000ffff) != 0x0000ffff) ||
((processor_pci_io_end &0x0000ffff) != 0x0000ffff)) { ((processor_pci_io_end &0x0000ffff) != 0x0000ffff)) {
printk("pplus_init: PPC to PCI mappings %s\n", printk("hawk_init: PPC to PCI mappings %s\n",
"must end just before a 64 KB boundaries"); "must end just before a 64 KB boundaries");
return -1; return -1;
} }
...@@ -75,19 +75,19 @@ pplus_init(struct pci_controller *hose, ...@@ -75,19 +75,19 @@ pplus_init(struct pci_controller *hose,
(hose->mem_space.end - hose->mem_space.start)) || (hose->mem_space.end - hose->mem_space.start)) ||
((processor_pci_io_end - processor_pci_io_start) != ((processor_pci_io_end - processor_pci_io_start) !=
(hose->io_space.end - hose->io_space.start))) { (hose->io_space.end - hose->io_space.start))) {
printk("pplus_init: %s\n", printk("hawk_init: %s\n",
"PPC and PCI memory or I/O space sizes don't match"); "PPC and PCI memory or I/O space sizes don't match");
return -1; return -1;
} }
if ((processor_mpic_base & 0xfffc0000) != processor_mpic_base) { if ((processor_mpic_base & 0xfffc0000) != processor_mpic_base) {
printk("pplus_init: %s\n", printk("hawk_init: %s\n",
"MPIC address must start on 256 MB boundary"); "MPIC address must start on 256 MB boundary");
return -1; return -1;
} }
if ((pci_dram_offset & 0xffff0000) != pci_dram_offset) { if ((pci_dram_offset & 0xffff0000) != pci_dram_offset) {
printk("pplus_init: %s\n", printk("hawk_init: %s\n",
"pci_dram_offset must be multiple of 64 KB"); "pci_dram_offset must be multiple of 64 KB");
return -1; return -1;
} }
...@@ -226,7 +226,7 @@ static uint hawk_size_table[] __initdata = { ...@@ -226,7 +226,7 @@ static uint hawk_size_table[] __initdata = {
* into virtual memory--too early to use ioremap(). * into virtual memory--too early to use ioremap().
*/ */
unsigned long __init unsigned long __init
pplus_get_mem_size(uint smc_base) hawk_get_mem_size(uint smc_base)
{ {
unsigned long total; unsigned long total;
int i, size_table_entries, reg_limit; int i, size_table_entries, reg_limit;
...@@ -238,7 +238,7 @@ pplus_get_mem_size(uint smc_base) ...@@ -238,7 +238,7 @@ pplus_get_mem_size(uint smc_base)
vend_dev_id = in_be32((uint *)smc_base + PCI_VENDOR_ID); vend_dev_id = in_be32((uint *)smc_base + PCI_VENDOR_ID);
if (((vend_dev_id & 0xffff0000) >> 16) != PCI_VENDOR_ID_MOTOROLA) { if (((vend_dev_id & 0xffff0000) >> 16) != PCI_VENDOR_ID_MOTOROLA) {
printk("pplus_get_mem_size: %s (0x%x)\n", printk("hawk_get_mem_size: %s (0x%x)\n",
"Not a Motorola Memory Controller", vend_dev_id); "Not a Motorola Memory Controller", vend_dev_id);
return 0; return 0;
} }
...@@ -259,7 +259,7 @@ pplus_get_mem_size(uint smc_base) ...@@ -259,7 +259,7 @@ pplus_get_mem_size(uint smc_base)
reg_limit = HAWK_SMC_REG_COUNT; reg_limit = HAWK_SMC_REG_COUNT;
} }
else { else {
printk("pplus_get_mem_size: %s (0x%x)\n", printk("hawk_get_mem_size: %s (0x%x)\n",
"Not a Falcon or HAWK", vend_dev_id); "Not a Falcon or HAWK", vend_dev_id);
return 0; return 0;
} }
...@@ -285,35 +285,3 @@ pplus_get_mem_size(uint smc_base) ...@@ -285,35 +285,3 @@ pplus_get_mem_size(uint smc_base)
return total; return total;
} }
int __init
pplus_mpic_init(unsigned int pci_mem_offset)
{
unsigned short devid;
unsigned int pci_membase;
/* Check the first PCI device to see if it is a Raven or Hawk. */
early_read_config_word(0, 0, 0, PCI_DEVICE_ID, &devid);
switch (devid) {
case PCI_DEVICE_ID_MOTOROLA_RAVEN:
case PCI_DEVICE_ID_MOTOROLA_HAWK:
break;
default:
OpenPIC_Addr = NULL;
return 1;
}
/* Read the memory base register. */
early_read_config_dword(0, 0, 0, PCI_BASE_ADDRESS_1, &pci_membase);
if (pci_membase == 0) {
OpenPIC_Addr = NULL;
return 1;
}
/* Map the MPIC registers to virtual memory. */
OpenPIC_Addr = ioremap(pci_membase + pci_mem_offset, 0x22000);
return 0;
}
include/asm-ppc/cputable.h
View file @ ed2f05a9
...@@ -75,6 +75,7 @@ extern struct cpu_spec *cur_cpu_spec[]; ...@@ -75,6 +75,7 @@ extern struct cpu_spec *cur_cpu_spec[];
#define CPU_FTR_DUAL_PLL_750FX 0x00004000 #define CPU_FTR_DUAL_PLL_750FX 0x00004000
#define CPU_FTR_NO_DPM 0x00008000 #define CPU_FTR_NO_DPM 0x00008000
#define CPU_FTR_HAS_HIGH_BATS 0x00010000 #define CPU_FTR_HAS_HIGH_BATS 0x00010000
#define CPU_FTR_NEED_COHERENT 0x00020000
#ifdef __ASSEMBLY__ #ifdef __ASSEMBLY__
......
include/asm-ppc/hawk.h
View file @ ed2f05a9
...@@ -29,4 +29,4 @@ extern int hawk_init(struct pci_controller *hose, ...@@ -29,4 +29,4 @@ extern int hawk_init(struct pci_controller *hose,
extern unsigned long hawk_get_mem_size(unsigned int smc_base); extern unsigned long hawk_get_mem_size(unsigned int smc_base);
extern int hawk_mpic_init(unsigned int pci_mem_offset); extern int hawk_mpic_init(unsigned int pci_mem_offset);
#endif /* __ASMPPC_PPLUS_H */ #endif /* __ASMPPC_HAWK_H */
include/asm-ppc/highmem.h
View file @ ed2f05a9
...@@ -87,7 +87,7 @@ static inline void *kmap_atomic(struct page *page, enum km_type type) ...@@ -87,7 +87,7 @@ static inline void *kmap_atomic(struct page *page, enum km_type type)
idx = type + KM_TYPE_NR*smp_processor_id(); idx = type + KM_TYPE_NR*smp_processor_id();
vaddr = KMAP_FIX_BEGIN + idx * PAGE_SIZE; vaddr = KMAP_FIX_BEGIN + idx * PAGE_SIZE;
#if HIGHMEM_DEBUG #ifdef HIGHMEM_DEBUG
BUG_ON(!pte_none(*(kmap_pte+idx))); BUG_ON(!pte_none(*(kmap_pte+idx)));
#endif #endif
set_pte(kmap_pte+idx, mk_pte(page, kmap_prot)); set_pte(kmap_pte+idx, mk_pte(page, kmap_prot));
...@@ -98,7 +98,7 @@ static inline void *kmap_atomic(struct page *page, enum km_type type) ...@@ -98,7 +98,7 @@ static inline void *kmap_atomic(struct page *page, enum km_type type)
static inline void kunmap_atomic(void *kvaddr, enum km_type type) static inline void kunmap_atomic(void *kvaddr, enum km_type type)
{ {
#if HIGHMEM_DEBUG #ifdef HIGHMEM_DEBUG
unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
unsigned int idx = type + KM_TYPE_NR*smp_processor_id(); unsigned int idx = type + KM_TYPE_NR*smp_processor_id();
......
include/asm-ppc/rwsem.h
View file @ ed2f05a9
...@@ -27,7 +27,7 @@ struct rw_semaphore { ...@@ -27,7 +27,7 @@ struct rw_semaphore {
#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
spinlock_t wait_lock; spinlock_t wait_lock;
struct list_head wait_list; struct list_head wait_list;
#if RWSEM_DEBUG #ifdef RWSEM_DEBUG
int debug; int debug;
#endif #endif
}; };
...@@ -35,7 +35,7 @@ struct rw_semaphore { ...@@ -35,7 +35,7 @@ struct rw_semaphore {
/* /*
* initialisation * initialisation
*/ */
#if RWSEM_DEBUG #ifdef RWSEM_DEBUG
#define __RWSEM_DEBUG_INIT , 0 #define __RWSEM_DEBUG_INIT , 0
#else #else
#define __RWSEM_DEBUG_INIT /* */ #define __RWSEM_DEBUG_INIT /* */
...@@ -59,7 +59,7 @@ static inline void init_rwsem(struct rw_semaphore *sem) ...@@ -59,7 +59,7 @@ static inline void init_rwsem(struct rw_semaphore *sem)
sem->count = RWSEM_UNLOCKED_VALUE; sem->count = RWSEM_UNLOCKED_VALUE;
spin_lock_init(&sem->wait_lock); spin_lock_init(&sem->wait_lock);
INIT_LIST_HEAD(&sem->wait_list); INIT_LIST_HEAD(&sem->wait_list);
#if RWSEM_DEBUG #ifdef RWSEM_DEBUG
sem->debug = 0; sem->debug = 0;
#endif #endif
} }
......
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