Commit ed3525ed authored by Ilias Apalodimas's avatar Ilias Apalodimas Committed by David S. Miller

net: ethernet: ti: introduce cpsw switchdev based driver part 1 - dual-emac

Part 1:
 Introduce basic CPSW dual_mac driver (cpsw_new.c) which is operating in
dual-emac mode by default, thus working as 2 individual network interfaces.
Main differences from legacy CPSW driver are:

 - optimized promiscuous mode: The P0_UNI_FLOOD (both ports) is enabled in
addition to ALLMULTI (current port) instead of ALE_BYPASS. So, Ports in
promiscuous mode will keep possibility of mcast and vlan filtering, which
is provides significant benefits when ports are joined to the same bridge,
but without enabling "switch" mode, or to different bridges.
 - learning disabled on ports as it make not too much sense for
   segregated ports - no forwarding in HW.
 - enabled basic support for devlink.

	devlink dev show
		platform/48484000.switch

	devlink dev param show
	 platform/48484000.switch:
	name ale_bypass type driver-specific
	 values:
		cmode runtime value false

 - "ale_bypass" devlink driver parameter allows to enable
ALE_CONTROL(4).BYPASS mode for debug purposes.
 - updated DT bindings.
Signed-off-by: default avatarIlias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: default avatarMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent ef63fe72
...@@ -59,9 +59,24 @@ config TI_CPSW ...@@ -59,9 +59,24 @@ config TI_CPSW
To compile this driver as a module, choose M here: the module To compile this driver as a module, choose M here: the module
will be called cpsw. will be called cpsw.
config TI_CPSW_SWITCHDEV
tristate "TI CPSW Switch Support with switchdev"
depends on ARCH_DAVINCI || ARCH_OMAP2PLUS || COMPILE_TEST
select NET_SWITCHDEV
select TI_DAVINCI_MDIO
select MFD_SYSCON
select REGMAP
select NET_DEVLINK
imply PHY_TI_GMII_SEL
help
This driver supports TI's CPSW Ethernet Switch.
To compile this driver as a module, choose M here: the module
will be called cpsw_new.
config TI_CPTS config TI_CPTS
bool "TI Common Platform Time Sync (CPTS) Support" bool "TI Common Platform Time Sync (CPTS) Support"
depends on TI_CPSW || TI_KEYSTONE_NETCP || COMPILE_TEST depends on TI_CPSW || TI_KEYSTONE_NETCP || TI_CPSW_SWITCHDEV || COMPILE_TEST
depends on COMMON_CLK depends on COMMON_CLK
depends on POSIX_TIMERS depends on POSIX_TIMERS
---help--- ---help---
...@@ -73,7 +88,7 @@ config TI_CPTS ...@@ -73,7 +88,7 @@ config TI_CPTS
config TI_CPTS_MOD config TI_CPTS_MOD
tristate tristate
depends on TI_CPTS depends on TI_CPTS
default y if TI_CPSW=y || TI_KEYSTONE_NETCP=y default y if TI_CPSW=y || TI_KEYSTONE_NETCP=y || TI_CPSW_SWITCHDEV=y
select NET_PTP_CLASSIFY select NET_PTP_CLASSIFY
imply PTP_1588_CLOCK imply PTP_1588_CLOCK
default m default m
......
...@@ -15,6 +15,8 @@ obj-$(CONFIG_TI_CPSW_PHY_SEL) += cpsw-phy-sel.o ...@@ -15,6 +15,8 @@ obj-$(CONFIG_TI_CPSW_PHY_SEL) += cpsw-phy-sel.o
obj-$(CONFIG_TI_CPTS_MOD) += cpts.o obj-$(CONFIG_TI_CPTS_MOD) += cpts.o
obj-$(CONFIG_TI_CPSW) += ti_cpsw.o obj-$(CONFIG_TI_CPSW) += ti_cpsw.o
ti_cpsw-y := cpsw.o davinci_cpdma.o cpsw_ale.o cpsw_priv.o cpsw_sl.o cpsw_ethtool.o ti_cpsw-y := cpsw.o davinci_cpdma.o cpsw_ale.o cpsw_priv.o cpsw_sl.o cpsw_ethtool.o
obj-$(CONFIG_TI_CPSW_SWITCHDEV) += ti_cpsw_new.o
ti_cpsw_new-y := cpsw_new.o davinci_cpdma.o cpsw_ale.o cpsw_sl.o cpsw_priv.o cpsw_ethtool.o
obj-$(CONFIG_TI_KEYSTONE_NETCP) += keystone_netcp.o obj-$(CONFIG_TI_KEYSTONE_NETCP) += keystone_netcp.o
keystone_netcp-y := netcp_core.o cpsw_ale.o keystone_netcp-y := netcp_core.o cpsw_ale.o
......
This diff is collapsed.
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/netdevice.h> #include <linux/netdevice.h>
#include <linux/net_tstamp.h> #include <linux/net_tstamp.h>
#include <linux/of.h>
#include <linux/phy.h> #include <linux/phy.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
...@@ -422,6 +423,7 @@ int cpsw_init_common(struct cpsw_common *cpsw, void __iomem *ss_regs, ...@@ -422,6 +423,7 @@ int cpsw_init_common(struct cpsw_common *cpsw, void __iomem *ss_regs,
struct cpsw_platform_data *data; struct cpsw_platform_data *data;
struct cpdma_params dma_params; struct cpdma_params dma_params;
struct device *dev = cpsw->dev; struct device *dev = cpsw->dev;
struct device_node *cpts_node;
void __iomem *cpts_regs; void __iomem *cpts_regs;
int ret = 0, i; int ret = 0, i;
...@@ -516,11 +518,16 @@ int cpsw_init_common(struct cpsw_common *cpsw, void __iomem *ss_regs, ...@@ -516,11 +518,16 @@ int cpsw_init_common(struct cpsw_common *cpsw, void __iomem *ss_regs,
return -ENOMEM; return -ENOMEM;
} }
cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpsw->dev->of_node); cpts_node = of_get_child_by_name(cpsw->dev->of_node, "cpts");
if (!cpts_node)
cpts_node = cpsw->dev->of_node;
cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpts_node);
if (IS_ERR(cpsw->cpts)) { if (IS_ERR(cpsw->cpts)) {
ret = PTR_ERR(cpsw->cpts); ret = PTR_ERR(cpsw->cpts);
cpdma_ctlr_destroy(cpsw->dma); cpdma_ctlr_destroy(cpsw->dma);
} }
of_node_put(cpts_node);
return ret; return ret;
} }
......
...@@ -54,6 +54,7 @@ do { \ ...@@ -54,6 +54,7 @@ do { \
#define HOST_PORT_NUM 0 #define HOST_PORT_NUM 0
#define CPSW_ALE_PORTS_NUM 3 #define CPSW_ALE_PORTS_NUM 3
#define CPSW_SLAVE_PORTS_NUM 2
#define SLIVER_SIZE 0x40 #define SLIVER_SIZE 0x40
#define CPSW1_HOST_PORT_OFFSET 0x028 #define CPSW1_HOST_PORT_OFFSET 0x028
...@@ -65,6 +66,7 @@ do { \ ...@@ -65,6 +66,7 @@ do { \
#define CPSW1_CPTS_OFFSET 0x500 #define CPSW1_CPTS_OFFSET 0x500
#define CPSW1_ALE_OFFSET 0x600 #define CPSW1_ALE_OFFSET 0x600
#define CPSW1_SLIVER_OFFSET 0x700 #define CPSW1_SLIVER_OFFSET 0x700
#define CPSW1_WR_OFFSET 0x900
#define CPSW2_HOST_PORT_OFFSET 0x108 #define CPSW2_HOST_PORT_OFFSET 0x108
#define CPSW2_SLAVE_OFFSET 0x200 #define CPSW2_SLAVE_OFFSET 0x200
...@@ -76,6 +78,7 @@ do { \ ...@@ -76,6 +78,7 @@ do { \
#define CPSW2_ALE_OFFSET 0xd00 #define CPSW2_ALE_OFFSET 0xd00
#define CPSW2_SLIVER_OFFSET 0xd80 #define CPSW2_SLIVER_OFFSET 0xd80
#define CPSW2_BD_OFFSET 0x2000 #define CPSW2_BD_OFFSET 0x2000
#define CPSW2_WR_OFFSET 0x1200
#define CPDMA_RXTHRESH 0x0c0 #define CPDMA_RXTHRESH 0x0c0
#define CPDMA_RXFREE 0x0e0 #define CPDMA_RXFREE 0x0e0
...@@ -113,12 +116,15 @@ do { \ ...@@ -113,12 +116,15 @@ do { \
#define IRQ_NUM 2 #define IRQ_NUM 2
#define CPSW_MAX_QUEUES 8 #define CPSW_MAX_QUEUES 8
#define CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT 256 #define CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT 256
#define CPSW_ALE_AGEOUT_DEFAULT 10 /* sec */
#define CPSW_ALE_NUM_ENTRIES 1024
#define CPSW_FIFO_QUEUE_TYPE_SHIFT 16 #define CPSW_FIFO_QUEUE_TYPE_SHIFT 16
#define CPSW_FIFO_SHAPE_EN_SHIFT 16 #define CPSW_FIFO_SHAPE_EN_SHIFT 16
#define CPSW_FIFO_RATE_EN_SHIFT 20 #define CPSW_FIFO_RATE_EN_SHIFT 20
#define CPSW_TC_NUM 4 #define CPSW_TC_NUM 4
#define CPSW_FIFO_SHAPERS_NUM (CPSW_TC_NUM - 1) #define CPSW_FIFO_SHAPERS_NUM (CPSW_TC_NUM - 1)
#define CPSW_PCT_MASK 0x7f #define CPSW_PCT_MASK 0x7f
#define CPSW_BD_RAM_SIZE 0x2000
#define CPSW_RX_VLAN_ENCAP_HDR_PRIO_SHIFT 29 #define CPSW_RX_VLAN_ENCAP_HDR_PRIO_SHIFT 29
#define CPSW_RX_VLAN_ENCAP_HDR_PRIO_MSK GENMASK(2, 0) #define CPSW_RX_VLAN_ENCAP_HDR_PRIO_MSK GENMASK(2, 0)
...@@ -279,6 +285,7 @@ struct cpsw_slave_data { ...@@ -279,6 +285,7 @@ struct cpsw_slave_data {
u8 mac_addr[ETH_ALEN]; u8 mac_addr[ETH_ALEN];
u16 dual_emac_res_vlan; /* Reserved VLAN for DualEMAC */ u16 dual_emac_res_vlan; /* Reserved VLAN for DualEMAC */
struct phy *ifphy; struct phy *ifphy;
bool disabled;
}; };
struct cpsw_platform_data { struct cpsw_platform_data {
...@@ -286,7 +293,7 @@ struct cpsw_platform_data { ...@@ -286,7 +293,7 @@ struct cpsw_platform_data {
u32 ss_reg_ofs; /* Subsystem control register offset */ u32 ss_reg_ofs; /* Subsystem control register offset */
u32 channels; /* number of cpdma channels (symmetric) */ u32 channels; /* number of cpdma channels (symmetric) */
u32 slaves; /* number of slave cpgmac ports */ u32 slaves; /* number of slave cpgmac ports */
u32 active_slave; /* time stamping, ethtool and SIOCGMIIPHY slave */ u32 active_slave;/* time stamping, ethtool and SIOCGMIIPHY slave */
u32 ale_entries; /* ale table size */ u32 ale_entries; /* ale table size */
u32 bd_ram_size; /*buffer descriptor ram size */ u32 bd_ram_size; /*buffer descriptor ram size */
u32 mac_control; /* Mac control register */ u32 mac_control; /* Mac control register */
...@@ -344,6 +351,7 @@ struct cpsw_common { ...@@ -344,6 +351,7 @@ struct cpsw_common {
bool tx_irq_disabled; bool tx_irq_disabled;
u32 irqs_table[IRQ_NUM]; u32 irqs_table[IRQ_NUM];
struct cpts *cpts; struct cpts *cpts;
struct devlink *devlink;
int rx_ch_num, tx_ch_num; int rx_ch_num, tx_ch_num;
int speed; int speed;
int usage_count; int usage_count;
......
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