Commit f0692bb8 authored by Adam Ford's avatar Adam Ford Committed by Shawn Guo

arm64: dts: enable fspi in imx8mm dts

Pull in downstream patch from NXP repository to enable fspi device.
Signed-off-by: default avatarHan Xu <han.xu@nxp.com>
Signed-off-by: default avatarAdam Ford <aford173@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent f5ff5a21
...@@ -560,7 +560,8 @@ aips3: bus@30800000 { ...@@ -560,7 +560,8 @@ aips3: bus@30800000 {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0x30800000 0x30800000 0x400000>; ranges = <0x30800000 0x30800000 0x400000>,
<0x8000000 0x8000000 0x10000000>;
ecspi1: spi@30820000 { ecspi1: spi@30820000 {
compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
...@@ -762,6 +763,19 @@ usdhc3: mmc@30b60000 { ...@@ -762,6 +763,19 @@ usdhc3: mmc@30b60000 {
status = "disabled"; status = "disabled";
}; };
flexspi: spi@30bb0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nxp,imx8mm-fspi";
reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>;
reg-names = "fspi_base", "fspi_mmap";
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_QSPI_ROOT>,
<&clk IMX8MM_CLK_QSPI_ROOT>;
clock-names = "fspi", "fspi_en";
status = "disabled";
};
sdma1: dma-controller@30bd0000 { sdma1: dma-controller@30bd0000 {
compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma"; compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
reg = <0x30bd0000 0x10000>; reg = <0x30bd0000 0x10000>;
......
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