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Commit f1362749 authored by Jens Axboe's avatar Jens Axboe
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via update

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drivers/ide/pci/via82cxxx.c
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/*
* $Id: via82cxxx.c,v 3.34 2002/02/12 11:26:11 vojtech Exp $
* $Id: via82cxxx.c,v 3.35-ac1 2002/08/19 Alan Exp $
*
* Copyright (c) 2000-2001 Vojtech Pavlik
*
......@@ -10,52 +10,26 @@
*/
/*
* VIA IDE driver for Linux. Supports
* Version 3.35
*
* vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
* vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a
*
* southbridges, which can be found in
*
* VIA Apollo Master, VP, VP2, VP2/97, VP3, VPX, VPX/97, MVP3, MVP4, P6, Pro,
* ProII, ProPlus, Pro133, Pro133+, Pro133A, Pro133A Dual, Pro133T, Pro133Z,
* PLE133, PLE133T, Pro266, Pro266T, ProP4X266, PM601, PM133, PN133, PL133T,
* PX266, PM266, KX133, KT133, KT133A, KT133E, KLE133, KT266, KX266, KM133,
* KM133A, KL133, KN133, KM266
* PC-Chips VXPro, VXPro+, VXTwo, TXPro-III, TXPro-AGP, AGPPro, ViaGra, BXToo,
* BXTel, BXpert
* AMD 640, 640 AGP, 750 IronGate, 760, 760MP
* ETEQ 6618, 6628, 6629, 6638
* Micron Samurai
* VIA IDE driver for Linux. Supported southbridges:
*
* chipsets. Supports
* vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
* vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
* vt8235
*
* PIO 0-5, MWDMA 0-2, SWDMA 0-2 and UDMA 0-6
* Copyright (c) 2000-2002 Vojtech Pavlik
*
* (this includes UDMA33, 66, 100 and 133) modes. UDMA66 and higher modes are
* autoenabled only in case the BIOS has detected a 80 wire cable. To ignore
* the BIOS data and assume the cable is present, use 'ide0=ata66' or
* 'ide1=ata66' on the kernel command line.
* Based on the work of:
* Michel Aubry
* Jeff Garzik
* Andre Hedrick
*/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Should you need to contact me, the author, you can do so either by
* e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
* Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#include <linux/config.h>
......@@ -68,6 +42,7 @@
#include <asm/io.h>
#include "ide-timing.h"
#include "via82cxxx.h"
#define VIA_IDE_ENABLE 0x40
#define VIA_IDE_CONFIG 0x41
......@@ -98,15 +73,15 @@
static struct via_isa_bridge {
char *name;
unsigned short id;
unsigned char rev_min;
unsigned char rev_max;
unsigned short flags;
u16 id;
u8 rev_min;
u8 rev_max;
u16 flags;
} via_isa_bridges[] = {
#ifdef FUTURE_BRIDGES
{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 },
{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 },
#endif
{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 },
{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 },
{ "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
{ "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
......@@ -136,14 +111,14 @@ static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" }
* VIA /proc entry.
*/
#ifdef CONFIG_PROC_FS
#if defined(DISPLAY_VIA_TIMINGS) && defined(CONFIG_PROC_FS)
#include <linux/stat.h>
#include <linux/proc_fs.h>
int via_proc, via_base;
static u8 via_proc = 0;
static unsigned long via_base;
static struct pci_dev *bmide_dev, *isa_dev;
extern int (*via_display_info)(char *, char **, off_t, int); /* ide-proc.c */
static char *via_control3[] = { "No limit", "64", "128", "192" };
......@@ -151,54 +126,83 @@ static char *via_control3[] = { "No limit", "64", "128", "192" };
#define via_print_drive(name, format, arg...)\
p += sprintf(p, name); for (i = 0; i < 4; i++) p += sprintf(p, format, ## arg); p += sprintf(p, "\n");
/**
* via_get_info - generate via /proc file
* @buffer: buffer for data
* @addr: set to start of data to use
* @offset: current file offset
* @count: size of read
*
* Fills in buffer with the debugging/configuration information for
* the VIA chipset tuning and attached drives
*/
static int via_get_info(char *buffer, char **addr, off_t offset, int count)
{
int speed[4], cycle[4], setup[4], active[4], recover[4], den[4],
uen[4], udma[4], umul[4], active8b[4], recover8b[4];
struct pci_dev *dev = bmide_dev;
unsigned int v, u, i;
unsigned short c, w;
unsigned char t, x;
u16 c, w;
u8 t, x;
char *p = buffer;
via_print("----------VIA BusMastering IDE Configuration----------------");
via_print("----------VIA BusMastering IDE Configuration"
"----------------");
via_print("Driver Version: 3.34");
via_print("South Bridge: VIA %s", via_config->name);
via_print("Driver Version: 3.35-ac");
via_print("South Bridge: VIA %s",
via_config->name);
pci_read_config_byte(isa_dev, PCI_REVISION_ID, &t);
pci_read_config_byte(dev, PCI_REVISION_ID, &x);
via_print("Revision: ISA %#x IDE %#x", t, x);
via_print("Highest DMA rate: %s", via_dma[via_config->flags & VIA_UDMA]);
via_print("Highest DMA rate: %s",
via_dma[via_config->flags & VIA_UDMA]);
via_print("BM-DMA base: %#x", via_base);
via_print("PCI clock: %d.%dMHz", via_clock / 1000, via_clock / 100 % 10);
via_print("PCI clock: %d.%dMHz",
via_clock / 1000, via_clock / 100 % 10);
pci_read_config_byte(dev, VIA_MISC_1, &t);
via_print("Master Read Cycle IRDY: %dws", (t & 64) >> 6);
via_print("Master Write Cycle IRDY: %dws", (t & 32) >> 5);
via_print("BM IDE Status Register Read Retry: %s", (t & 8) ? "yes" : "no");
via_print("Master Read Cycle IRDY: %dws",
(t & 64) >> 6);
via_print("Master Write Cycle IRDY: %dws",
(t & 32) >> 5);
via_print("BM IDE Status Register Read Retry: %s",
(t & 8) ? "yes" : "no");
pci_read_config_byte(dev, VIA_MISC_3, &t);
via_print("Max DRDY Pulse Width: %s%s", via_control3[(t & 0x03)], (t & 0x03) ? " PCI clocks" : "");
via_print("Max DRDY Pulse Width: %s%s",
via_control3[(t & 0x03)], (t & 0x03) ? " PCI clocks" : "");
via_print("-----------------------Primary IDE-------Secondary IDE------");
via_print("Read DMA FIFO flush: %10s%20s", (t & 0x80) ? "yes" : "no", (t & 0x40) ? "yes" : "no");
via_print("End Sector FIFO flush: %10s%20s", (t & 0x20) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
via_print("-----------------------Primary IDE"
"-------Secondary IDE------");
via_print("Read DMA FIFO flush: %10s%20s",
(t & 0x80) ? "yes" : "no", (t & 0x40) ? "yes" : "no");
via_print("End Sector FIFO flush: %10s%20s",
(t & 0x20) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
pci_read_config_byte(dev, VIA_IDE_CONFIG, &t);
via_print("Prefetch Buffer: %10s%20s", (t & 0x80) ? "yes" : "no", (t & 0x20) ? "yes" : "no");
via_print("Post Write Buffer: %10s%20s", (t & 0x40) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
via_print("Prefetch Buffer: %10s%20s",
(t & 0x80) ? "yes" : "no", (t & 0x20) ? "yes" : "no");
via_print("Post Write Buffer: %10s%20s",
(t & 0x40) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
pci_read_config_byte(dev, VIA_IDE_ENABLE, &t);
via_print("Enabled: %10s%20s", (t & 0x02) ? "yes" : "no", (t & 0x01) ? "yes" : "no");
via_print("Enabled: %10s%20s",
(t & 0x02) ? "yes" : "no", (t & 0x01) ? "yes" : "no");
c = IN_BYTE(via_base + 0x02) | (IN_BYTE(via_base + 0x0a) << 8);
via_print("Simplex only: %10s%20s", (c & 0x80) ? "yes" : "no", (c & 0x8000) ? "yes" : "no");
c = inb(via_base + 0x02) | (inb(via_base + 0x0a) << 8);
via_print("Simplex only: %10s%20s",
(c & 0x80) ? "yes" : "no", (c & 0x8000) ? "yes" : "no");
via_print("Cable Type: %10s%20s", (via_80w & 1) ? "80w" : "40w", (via_80w & 2) ? "80w" : "40w");
via_print("Cable Type: %10s%20s",
(via_80w & 1) ? "80w" : "40w", (via_80w & 2) ? "80w" : "40w");
via_print("-------------------drive0----drive1----drive2----drive3-----");
via_print("-------------------drive0----drive1"
"----drive2----drive3-----");
pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
pci_read_config_dword(dev, VIA_DRIVE_TIMING, &v);
......@@ -250,28 +254,42 @@ static int via_get_info(char *buffer, char **addr, off_t offset, int count)
}
}
via_print_drive("Transfer Mode: ", "%10s", den[i] ? (uen[i] ? "UDMA" : "DMA") : "PIO");
via_print_drive("Address Setup: ", "%8dns", 1000000 * setup[i] / via_clock);
via_print_drive("Cmd Active: ", "%8dns", 1000000 * active8b[i] / via_clock);
via_print_drive("Cmd Recovery: ", "%8dns", 1000000 * recover8b[i] / via_clock);
via_print_drive("Data Active: ", "%8dns", 1000000 * active[i] / via_clock);
via_print_drive("Data Recovery: ", "%8dns", 1000000 * recover[i] / via_clock);
via_print_drive("Cycle Time: ", "%8dns", cycle[i]);
via_print_drive("Transfer Rate: ", "%4d.%dMB/s", speed[i] / 1000, speed[i] / 100 % 10);
return p - buffer; /* hoping it is less than 4K... */
via_print_drive("Transfer Mode: ", "%10s",
den[i] ? (uen[i] ? "UDMA" : "DMA") : "PIO");
via_print_drive("Address Setup: ", "%8dns",
1000000 * setup[i] / via_clock);
via_print_drive("Cmd Active: ", "%8dns",
1000000 * active8b[i] / via_clock);
via_print_drive("Cmd Recovery: ", "%8dns",
1000000 * recover8b[i] / via_clock);
via_print_drive("Data Active: ", "%8dns",
1000000 * active[i] / via_clock);
via_print_drive("Data Recovery: ", "%8dns",
1000000 * recover[i] / via_clock);
via_print_drive("Cycle Time: ", "%8dns",
cycle[i]);
via_print_drive("Transfer Rate: ", "%4d.%dMB/s",
speed[i] / 1000, speed[i] / 100 % 10);
/* hoping it is less than 4K... */
return p - buffer;
}
#endif
#endif /* DISPLAY_VIA_TIMINGS && CONFIG_PROC_FS */
/*
* via_set_speed() writes timing values to the chipset registers
/**
* via_set_speed - write timing registers
* @dev: PCI device
* @dn: device
* @timing: IDE timing data to use
*
* via_set_speed writes timing values to the chipset registers
*/
static void via_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timing *timing)
static void via_set_speed(struct pci_dev *dev, u8 dn, struct ide_timing *timing)
{
unsigned char t;
u8 t;
pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
......@@ -294,13 +312,17 @@ static void via_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi
pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
}
/*
* via_set_drive() computes timing values configures the drive and
* the chipset to a desired transfer mode. It also can be called
* by upper layers.
/**
* via_set_drive - configure transfer mode
* @drive: Drive to set up
* @speed: desired speed
*
* via_set_drive() computes timing values configures the drive and
* the chipset to a desired transfer mode. It also can be called
* by upper layers.
*/
static int via_set_drive(ide_drive_t *drive, unsigned char speed)
static int via_set_drive(ide_drive_t *drive, u8 speed)
{
ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
struct ide_timing t, p;
......@@ -308,7 +330,8 @@ static int via_set_drive(ide_drive_t *drive, unsigned char speed)
if (speed != XFER_PIO_SLOW && speed != drive->current_speed)
if (ide_config_drive_speed(drive, speed))
printk(KERN_WARNING "ide%d: Drive %d didn't accept speed setting. Oh, well.\n",
printk(KERN_WARNING "ide%d: Drive %d didn't "
"accept speed setting. Oh, well.\n",
drive->dn >> 1, drive->dn & 1);
T = 1000000000 / via_clock;
......@@ -337,18 +360,22 @@ static int via_set_drive(ide_drive_t *drive, unsigned char speed)
return 0;
}
/*
* via82cxxx_tune_drive() is a callback from upper layers for
* PIO-only tuning.
/**
* via82cxxx_tune_drive - PIO setup
* @drive: drive to set up
* @pio: mode to use (255 for 'best possible')
*
* A callback from the upper layers for PIO-only tuning.
*/
static void via82cxxx_tune_drive(ide_drive_t *drive, unsigned char pio)
static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
{
if (!((via_enabled >> HWIF(drive)->channel) & 1))
return;
if (pio == 255) {
via_set_drive(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
via_set_drive(drive,
ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
return;
}
......@@ -357,132 +384,161 @@ static void via82cxxx_tune_drive(ide_drive_t *drive, unsigned char pio)
#ifdef CONFIG_BLK_DEV_IDEDMA
/*
* via82cxxx_dmaproc() is a callback from upper layers that can do
* a lot, but we use it for DMA/PIO tuning only, delegating everything
* else to the default ide_dmaproc().
/**
* via82cxxx_ide_dma_check - set up for DMA if possible
* @drive: IDE drive to set up
*
* Set up the drive for the highest supported speed considering the
* driver, controller and cable
*/
int via82cxxx_dmaproc(ide_dma_action_t func, ide_drive_t *drive)
static int via82cxxx_ide_dma_check (ide_drive_t *drive)
{
u16 w80 = HWIF(drive)->udma_four;
if (func == ide_dma_check) {
short w80 = HWIF(drive)->udma_four;
short speed = ide_find_best_mode(drive,
XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
(via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
(w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
(w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) |
(w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0));
u16 speed = ide_find_best_mode(drive,
XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
(via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
(w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
(w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) |
(w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0));
via_set_drive(drive, speed);
func = (HWIF(drive)->autodma && (speed & XFER_MODE) != XFER_PIO)
? ide_dma_on : ide_dma_off_quietly;
}
via_set_drive(drive, speed);
return ide_dmaproc(func, drive);
if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
return HWIF(drive)->ide_dma_on(drive);
return HWIF(drive)->ide_dma_off_quietly(drive);
}
#endif /* CONFIG_BLK_DEV_IDEDMA */
/*
* The initialization callback. Here we determine the IDE chip type
* and initialize its drive independent registers.
/**
* init_chipset_via82cxxx - initialization handler
* @dev: PCI device
* @name: Name of interface
*
* The initialization callback. Here we determine the IDE chip type
* and initialize its drive independent registers.
*/
unsigned int __init pci_init_via82cxxx(struct pci_dev *dev, const char *name)
static unsigned int __init init_chipset_via82cxxx(struct pci_dev *dev, const char *name)
{
struct pci_dev *isa = NULL;
unsigned char t, v;
u8 t, v;
unsigned int u;
int i;
/*
* Find the ISA bridge to see how good the IDE is.
*/
/*
* Find the ISA bridge to see how good the IDE is.
*/
for (via_config = via_isa_bridges; via_config->id; via_config++)
if ((isa = pci_find_device(PCI_VENDOR_ID_VIA +
!!(via_config->flags & VIA_BAD_ID), via_config->id, NULL))) {
!!(via_config->flags & VIA_BAD_ID),
via_config->id, NULL))) {
pci_read_config_byte(isa, PCI_REVISION_ID, &t);
if (t >= via_config->rev_min && t <= via_config->rev_max)
if (t >= via_config->rev_min &&
t <= via_config->rev_max)
break;
}
if (!via_config->id) {
printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, contact Vojtech Pavlik <vojtech@ucw.cz>\n");
printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
return -ENODEV;
}
/*
* Check 80-wire cable presence and setup Clk66.
*/
/*
* Check 80-wire cable presence and setup Clk66.
*/
switch (via_config->flags & VIA_UDMA) {
case VIA_UDMA_66:
pci_read_config_dword(dev, VIA_UDMA_TIMING, &u); /* Enable Clk66 */
pci_write_config_dword(dev, VIA_UDMA_TIMING, u | 0x80008);
/* Enable Clk66 */
pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
for (i = 24; i >= 0; i -= 8)
if (((u >> (i & 16)) & 8) && ((u >> i) & 0x20) && (((u >> i) & 7) < 2))
via_80w |= (1 << (1 - (i >> 4))); /* 2x PCI clock and UDMA w/ < 3T/cycle */
if (((u >> (i & 16)) & 8) &&
((u >> i) & 0x20) &&
(((u >> i) & 7) < 2)) {
/*
* 2x PCI clock and
* UDMA w/ < 3T/cycle
*/
via_80w |= (1 << (1 - (i >> 4)));
}
break;
case VIA_UDMA_100:
pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
for (i = 24; i >= 0; i -= 8)
if (((u >> i) & 0x10) || (((u >> i) & 0x20) && (((u >> i) & 7) < 4)))
via_80w |= (1 << (1 - (i >> 4))); /* BIOS 80-wire bit or UDMA w/ < 60ns/cycle */
if (((u >> i) & 0x10) ||
(((u >> i) & 0x20) &&
(((u >> i) & 7) < 4))) {
/* BIOS 80-wire bit or
* UDMA w/ < 60ns/cycle
*/
via_80w |= (1 << (1 - (i >> 4)));
}
break;
case VIA_UDMA_133:
pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
for (i = 24; i >= 0; i -= 8)
if (((u >> i) & 0x10) || (((u >> i) & 0x20) && (((u >> i) & 7) < 8)))
via_80w |= (1 << (1 - (i >> 4))); /* BIOS 80-wire bit or UDMA w/ < 60ns/cycle */
if (((u >> i) & 0x10) ||
(((u >> i) & 0x20) &&
(((u >> i) & 7) < 8))) {
/* BIOS 80-wire bit or
* UDMA w/ < 60ns/cycle
*/
via_80w |= (1 << (1 - (i >> 4)));
}
break;
}
if (via_config->flags & VIA_BAD_CLK66) { /* Disable Clk66 */
pci_read_config_dword(dev, VIA_UDMA_TIMING, &u); /* Would cause trouble on 596a and 686 */
/* Disable Clk66 */
if (via_config->flags & VIA_BAD_CLK66) {
/* Would cause trouble on 596a and 686 */
pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
}
/*
* Check whether interfaces are enabled.
*/
/*
* Check whether interfaces are enabled.
*/
pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
via_enabled = ((v & 1) ? 2 : 0) | ((v & 2) ? 1 : 0);
/*
* Set up FIFO sizes and thresholds.
*/
/*
* Set up FIFO sizes and thresholds.
*/
pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
if (via_config->flags & VIA_BAD_PREQ) /* Disable PREQ# till DDACK# */
t &= 0x7f; /* Would crash on 586b rev 41 */
/* Disable PREQ# till DDACK# */
if (via_config->flags & VIA_BAD_PREQ) {
/* Would crash on 586b rev 41 */
t &= 0x7f;
}
if (via_config->flags & VIA_SET_FIFO) { /* Fix FIFO split between channels */
/* Fix FIFO split between channels */
if (via_config->flags & VIA_SET_FIFO) {
t &= (t & 0x9f);
switch (via_enabled) {
case 1: t |= 0x00; break; /* 16 on primary */
case 2: t |= 0x60; break; /* 16 on secondary */
case 3: t |= 0x20; break; /* 8 pri 8 sec */
case 1: t |= 0x00; break; /* 16 on primary */
case 2: t |= 0x60; break; /* 16 on secondary */
case 3: t |= 0x20; break; /* 8 pri 8 sec */
}
}
pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
/*
* Determine system bus clock.
*/
/*
* Determine system bus clock.
*/
via_clock = system_bus_clock() * 1000;
......@@ -493,48 +549,48 @@ unsigned int __init pci_init_via82cxxx(struct pci_dev *dev, const char *name)
}
if (via_clock < 20000 || via_clock > 50000) {
printk(KERN_WARNING "VP_IDE: User given PCI clock speed impossible (%d), using 33 MHz instead.\n", via_clock);
printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want to assume 80-wire cable.\n");
printk(KERN_WARNING "VP_IDE: User given PCI clock speed "
"impossible (%d), using 33 MHz instead.\n", via_clock);
printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want "
"to assume 80-wire cable.\n");
via_clock = 33333;
}
/*
* Print the boot message.
*/
/*
* Print the boot message.
*/
pci_read_config_byte(isa, PCI_REVISION_ID, &t);
printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s controller on pci%s\n",
via_config->name, t, via_dma[via_config->flags & VIA_UDMA], dev->slot_name);
printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s "
"controller on pci%s\n",
via_config->name, t,
via_dma[via_config->flags & VIA_UDMA],
dev->slot_name);
/*
* Setup /proc/ide/via entry.
*/
/*
* Setup /proc/ide/via entry.
*/
#ifdef CONFIG_PROC_FS
#if defined(DISPLAY_VIA_TIMINGS) && defined(CONFIG_PROC_FS)
if (!via_proc) {
via_base = pci_resource_start(dev, 4);
bmide_dev = dev;
isa_dev = isa;
via_display_info = &via_get_info;
ide_pci_register_host_proc(&via_procs[0]);
via_proc = 1;
}
#endif
#endif /* DISPLAY_VIA_TIMINGS && CONFIG_PROC_FS */
return 0;
}
unsigned int __init ata66_via82cxxx(ide_hwif_t *hwif)
{
return ((via_enabled & via_80w) >> hwif->channel) & 1;
}
void __init ide_init_via82cxxx(ide_hwif_t *hwif)
static void __init init_hwif_via82cxxx(ide_hwif_t *hwif)
{
int i;
hwif->autodma = 0;
hwif->tuneproc = &via82cxxx_tune_drive;
hwif->speedproc = &via_set_drive;
hwif->autodma = 0;
for (i = 0; i < 2; i++) {
hwif->drives[i].io_32bit = 1;
......@@ -543,23 +599,73 @@ void __init ide_init_via82cxxx(ide_hwif_t *hwif)
hwif->drives[i].dn = hwif->channel * 2 + i;
}
if (!hwif->dma_base)
return;
hwif->atapi_dma = 1;
hwif->ultra_mask = 0x7f;
hwif->mwdma_mask = 0x07;
hwif->swdma_mask = 0x07;
#ifdef CONFIG_BLK_DEV_IDEDMA
if (hwif->dma_base) {
hwif->dmaproc = &via82cxxx_dmaproc;
#ifdef CONFIG_IDEDMA_AUTO
if (!noautodma)
hwif->autodma = 1;
#endif
}
if (!(hwif->udma_four))
hwif->udma_four = ((via_enabled & via_80w) >> hwif->channel) & 1;
hwif->ide_dma_check = &via82cxxx_ide_dma_check;
if (!noautodma)
hwif->autodma = 1;
hwif->drives[0].autodma = hwif->autodma;
hwif->drives[1].autodma = hwif->autodma;
#endif /* CONFIG_BLK_DEV_IDEDMA */
}
/*
* We allow the BM-DMA driver to only work on enabled interfaces.
/**
* init_dma_via82cxxx - set up for IDE DMA
* @hwif: IDE interface
* @dmabase: DMA base address
*
* We allow the BM-DMA driver to only work on enabled interfaces.
*/
void __init ide_dmacapable_via82cxxx(ide_hwif_t *hwif, unsigned long dmabase)
static void __init init_dma_via82cxxx(ide_hwif_t *hwif, unsigned long dmabase)
{
if ((via_enabled >> hwif->channel) & 1)
ide_setup_dma(hwif, dmabase, 8);
}
extern void ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *);
/*
* FIXME: should not be needed
*/
static void __init init_setup_via82cxxx (struct pci_dev *dev, ide_pci_device_t *d)
{
ide_setup_pci_device(dev, d);
}
/**
* via82cxxx_scan_pcidev - set up any via devices
* @dev: PCI device we are offered
*
* Any controller we are offered that we can configure we set up
* and return 1. Anything we cannot drive we return 0
*/
int __init via82cxxx_scan_pcidev (struct pci_dev *dev)
{
ide_pci_device_t *d;
if (dev->vendor != PCI_VENDOR_ID_VIA)
return 0;
for (d = via82cxxx_chipsets; d && d->vendor && d->device; ++d) {
if (((d->vendor == dev->vendor) &&
(d->device == dev->device)) &&
(d->init_setup)) {
d->init_setup(dev, d);
return 1;
}
}
return 0;
}
drivers/ide/pci/via82cxxx.h 0 → 100644
View file @ f1362749
#ifndef VIA82CXXX_H
#define VIA82CXXX_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
#define DISPLAY_VIA_TIMINGS
#if defined(DISPLAY_VIA_TIMINGS) && defined(CONFIG_PROC_FS)
#include <linux/stat.h>
#include <linux/proc_fs.h>
static u8 via_proc;
static int via_get_info(char *, char **, off_t, int);
static ide_pci_host_proc_t via_procs[] __initdata = {
{
name: "via",
set: 1,
get_info: via_get_info,
parent: NULL,
},
};
#endif /* DISPLAY_VIA_TIMINGS && CONFIG_PROC_FS */
static void init_setup_via82cxxx(struct pci_dev *, ide_pci_device_t *);
static unsigned int init_chipset_via82cxxx(struct pci_dev *, const char *);
static void init_hwif_via82cxxx(ide_hwif_t *);
static void init_dma_via82cxxx(ide_hwif_t *, unsigned long);
static ide_pci_device_t via82cxxx_chipsets[] __initdata = {
{
vendor: PCI_VENDOR_ID_VIA,
device: PCI_DEVICE_ID_VIA_82C576_1,
name: "VP_IDE",
init_setup: init_setup_via82cxxx,
init_chipset: init_chipset_via82cxxx,
init_iops: NULL,
init_hwif: init_hwif_via82cxxx,
init_dma: init_dma_via82cxxx,
channels: 2,
autodma: NOAUTODMA,
enablebits: {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
bootable: ON_BOARD,
extra: 0,
},{
vendor: PCI_VENDOR_ID_VIA,
device: PCI_DEVICE_ID_VIA_82C586_1,
name: "VP_IDE",
init_setup: init_setup_via82cxxx,
init_chipset: init_chipset_via82cxxx,
init_iops: NULL,
init_hwif: init_hwif_via82cxxx,
init_dma: init_dma_via82cxxx,
channels: 2,
autodma: NOAUTODMA,
enablebits: {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
bootable: ON_BOARD,
extra: 0,
},{
vendor: 0,
device: 0,
channels: 0,
bootable: EOL,
}
};
#endif /* VIA82CXXX_H */
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