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Commit f23395b4 authored by Jakub Kicinski's avatar Jakub Kicinski
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Merge branch 'net-wangxun-adjust-code-structure' 

Jiawen Wu says:

====================
net: wangxun: Adjust code structure

Remove useless structs 'txgbe_hw' and 'ngbe_hw' make the codes clear.
And move the same codes which sets MAC address between txgbe and ngbe
to libwx. Further more, rename struct 'wx_hw' to 'wx' and move total
adapter members to wx.
====================

Link: https://lore.kernel.org/r/20230106033853.2806007-1-jiawenwu@trustnetic.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 7abd92a5 803df55d
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Showing with 704 additions and 921 deletions
drivers/net/ethernet/wangxun/libwx/wx_hw.c
View file @ f23395b4
...@@ -2,6 +2,7 @@ ...@@ -2,6 +2,7 @@
/* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */ /* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */
#include <linux/etherdevice.h> #include <linux/etherdevice.h>
#include <linux/netdevice.h>
#include <linux/if_ether.h> #include <linux/if_ether.h>
#include <linux/iopoll.h> #include <linux/iopoll.h>
#include <linux/pci.h> #include <linux/pci.h>
...@@ -9,18 +10,18 @@ ...@@ -9,18 +10,18 @@
#include "wx_type.h" #include "wx_type.h"
#include "wx_hw.h" #include "wx_hw.h"
static void wx_intr_disable(struct wx_hw *wxhw, u64 qmask) static void wx_intr_disable(struct wx *wx, u64 qmask)
{ {
u32 mask; u32 mask;
mask = (qmask & 0xFFFFFFFF); mask = (qmask & 0xFFFFFFFF);
if (mask) if (mask)
wr32(wxhw, WX_PX_IMS(0), mask); wr32(wx, WX_PX_IMS(0), mask);
if (wxhw->mac.type == wx_mac_sp) { if (wx->mac.type == wx_mac_sp) {
mask = (qmask >> 32); mask = (qmask >> 32);
if (mask) if (mask)
wr32(wxhw, WX_PX_IMS(1), mask); wr32(wx, WX_PX_IMS(1), mask);
} }
} }
...@@ -28,33 +29,33 @@ static void wx_intr_disable(struct wx_hw *wxhw, u64 qmask) ...@@ -28,33 +29,33 @@ static void wx_intr_disable(struct wx_hw *wxhw, u64 qmask)
* 1. to be sector address, when implemented erase sector command * 1. to be sector address, when implemented erase sector command
* 2. to be flash address when implemented read, write flash address * 2. to be flash address when implemented read, write flash address
*/ */
static int wx_fmgr_cmd_op(struct wx_hw *wxhw, u32 cmd, u32 cmd_addr) static int wx_fmgr_cmd_op(struct wx *wx, u32 cmd, u32 cmd_addr)
{ {
u32 cmd_val = 0, val = 0; u32 cmd_val = 0, val = 0;
cmd_val = WX_SPI_CMD_CMD(cmd) | cmd_val = WX_SPI_CMD_CMD(cmd) |
WX_SPI_CMD_CLK(WX_SPI_CLK_DIV) | WX_SPI_CMD_CLK(WX_SPI_CLK_DIV) |
cmd_addr; cmd_addr;
wr32(wxhw, WX_SPI_CMD, cmd_val); wr32(wx, WX_SPI_CMD, cmd_val);
return read_poll_timeout(rd32, val, (val & 0x1), 10, 100000, return read_poll_timeout(rd32, val, (val & 0x1), 10, 100000,
false, wxhw, WX_SPI_STATUS); false, wx, WX_SPI_STATUS);
} }
static int wx_flash_read_dword(struct wx_hw *wxhw, u32 addr, u32 *data) static int wx_flash_read_dword(struct wx *wx, u32 addr, u32 *data)
{ {
int ret = 0; int ret = 0;
ret = wx_fmgr_cmd_op(wxhw, WX_SPI_CMD_READ_DWORD, addr); ret = wx_fmgr_cmd_op(wx, WX_SPI_CMD_READ_DWORD, addr);
if (ret < 0) if (ret < 0)
return ret; return ret;
*data = rd32(wxhw, WX_SPI_DATA); *data = rd32(wx, WX_SPI_DATA);
return ret; return ret;
} }
int wx_check_flash_load(struct wx_hw *hw, u32 check_bit) int wx_check_flash_load(struct wx *hw, u32 check_bit)
{ {
u32 reg = 0; u32 reg = 0;
int err = 0; int err = 0;
...@@ -73,15 +74,15 @@ int wx_check_flash_load(struct wx_hw *hw, u32 check_bit) ...@@ -73,15 +74,15 @@ int wx_check_flash_load(struct wx_hw *hw, u32 check_bit)
} }
EXPORT_SYMBOL(wx_check_flash_load); EXPORT_SYMBOL(wx_check_flash_load);
void wx_control_hw(struct wx_hw *wxhw, bool drv) void wx_control_hw(struct wx *wx, bool drv)
{ {
if (drv) { if (drv) {
/* Let firmware know the driver has taken over */ /* Let firmware know the driver has taken over */
wr32m(wxhw, WX_CFG_PORT_CTL, wr32m(wx, WX_CFG_PORT_CTL,
WX_CFG_PORT_CTL_DRV_LOAD, WX_CFG_PORT_CTL_DRV_LOAD); WX_CFG_PORT_CTL_DRV_LOAD, WX_CFG_PORT_CTL_DRV_LOAD);
} else { } else {
/* Let firmware take over control of hw */ /* Let firmware take over control of hw */
wr32m(wxhw, WX_CFG_PORT_CTL, wr32m(wx, WX_CFG_PORT_CTL,
WX_CFG_PORT_CTL_DRV_LOAD, 0); WX_CFG_PORT_CTL_DRV_LOAD, 0);
} }
} }
...@@ -89,13 +90,13 @@ EXPORT_SYMBOL(wx_control_hw); ...@@ -89,13 +90,13 @@ EXPORT_SYMBOL(wx_control_hw);
/** /**
* wx_mng_present - returns 0 when management capability is present * wx_mng_present - returns 0 when management capability is present
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
*/ */
int wx_mng_present(struct wx_hw *wxhw) int wx_mng_present(struct wx *wx)
{ {
u32 fwsm; u32 fwsm;
fwsm = rd32(wxhw, WX_MIS_ST); fwsm = rd32(wx, WX_MIS_ST);
if (fwsm & WX_MIS_ST_MNG_INIT_DN) if (fwsm & WX_MIS_ST_MNG_INIT_DN)
return 0; return 0;
else else
...@@ -108,40 +109,40 @@ static DEFINE_MUTEX(wx_sw_sync_lock); ...@@ -108,40 +109,40 @@ static DEFINE_MUTEX(wx_sw_sync_lock);
/** /**
* wx_release_sw_sync - Release SW semaphore * wx_release_sw_sync - Release SW semaphore
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* @mask: Mask to specify which semaphore to release * @mask: Mask to specify which semaphore to release
* *
* Releases the SW semaphore for the specified * Releases the SW semaphore for the specified
* function (CSR, PHY0, PHY1, EEPROM, Flash) * function (CSR, PHY0, PHY1, EEPROM, Flash)
**/ **/
static void wx_release_sw_sync(struct wx_hw *wxhw, u32 mask) static void wx_release_sw_sync(struct wx *wx, u32 mask)
{ {
mutex_lock(&wx_sw_sync_lock); mutex_lock(&wx_sw_sync_lock);
wr32m(wxhw, WX_MNG_SWFW_SYNC, mask, 0); wr32m(wx, WX_MNG_SWFW_SYNC, mask, 0);
mutex_unlock(&wx_sw_sync_lock); mutex_unlock(&wx_sw_sync_lock);
} }
/** /**
* wx_acquire_sw_sync - Acquire SW semaphore * wx_acquire_sw_sync - Acquire SW semaphore
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* @mask: Mask to specify which semaphore to acquire * @mask: Mask to specify which semaphore to acquire
* *
* Acquires the SW semaphore for the specified * Acquires the SW semaphore for the specified
* function (CSR, PHY0, PHY1, EEPROM, Flash) * function (CSR, PHY0, PHY1, EEPROM, Flash)
**/ **/
static int wx_acquire_sw_sync(struct wx_hw *wxhw, u32 mask) static int wx_acquire_sw_sync(struct wx *wx, u32 mask)
{ {
u32 sem = 0; u32 sem = 0;
int ret = 0; int ret = 0;
mutex_lock(&wx_sw_sync_lock); mutex_lock(&wx_sw_sync_lock);
ret = read_poll_timeout(rd32, sem, !(sem & mask), ret = read_poll_timeout(rd32, sem, !(sem & mask),
5000, 2000000, false, wxhw, WX_MNG_SWFW_SYNC); 5000, 2000000, false, wx, WX_MNG_SWFW_SYNC);
if (!ret) { if (!ret) {
sem |= mask; sem |= mask;
wr32(wxhw, WX_MNG_SWFW_SYNC, sem); wr32(wx, WX_MNG_SWFW_SYNC, sem);
} else { } else {
wx_err(wxhw, "SW Semaphore not granted: 0x%x.\n", sem); wx_err(wx, "SW Semaphore not granted: 0x%x.\n", sem);
} }
mutex_unlock(&wx_sw_sync_lock); mutex_unlock(&wx_sw_sync_lock);
...@@ -150,7 +151,7 @@ static int wx_acquire_sw_sync(struct wx_hw *wxhw, u32 mask) ...@@ -150,7 +151,7 @@ static int wx_acquire_sw_sync(struct wx_hw *wxhw, u32 mask)
/** /**
* wx_host_interface_command - Issue command to manageability block * wx_host_interface_command - Issue command to manageability block
* @wxhw: pointer to the HW structure * @wx: pointer to the HW structure
* @buffer: contains the command to write and where the return status will * @buffer: contains the command to write and where the return status will
* be placed * be placed
* @length: length of buffer, must be multiple of 4 bytes * @length: length of buffer, must be multiple of 4 bytes
...@@ -162,7 +163,7 @@ static int wx_acquire_sw_sync(struct wx_hw *wxhw, u32 mask) ...@@ -162,7 +163,7 @@ static int wx_acquire_sw_sync(struct wx_hw *wxhw, u32 mask)
* So we will leave this up to the caller to read back the data * So we will leave this up to the caller to read back the data
* in these cases. * in these cases.
**/ **/
int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer, int wx_host_interface_command(struct wx *wx, u32 *buffer,
u32 length, u32 timeout, bool return_data) u32 length, u32 timeout, bool return_data)
{ {
u32 hdr_size = sizeof(struct wx_hic_hdr); u32 hdr_size = sizeof(struct wx_hic_hdr);
...@@ -172,17 +173,17 @@ int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer, ...@@ -172,17 +173,17 @@ int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer,
u16 buf_len; u16 buf_len;
if (length == 0 || length > WX_HI_MAX_BLOCK_BYTE_LENGTH) { if (length == 0 || length > WX_HI_MAX_BLOCK_BYTE_LENGTH) {
wx_err(wxhw, "Buffer length failure buffersize=%d.\n", length); wx_err(wx, "Buffer length failure buffersize=%d.\n", length);
return -EINVAL; return -EINVAL;
} }
status = wx_acquire_sw_sync(wxhw, WX_MNG_SWFW_SYNC_SW_MB); status = wx_acquire_sw_sync(wx, WX_MNG_SWFW_SYNC_SW_MB);
if (status != 0) if (status != 0)
return status; return status;
/* Calculate length in DWORDs. We must be DWORD aligned */ /* Calculate length in DWORDs. We must be DWORD aligned */
if ((length % (sizeof(u32))) != 0) { if ((length % (sizeof(u32))) != 0) {
wx_err(wxhw, "Buffer length failure, not aligned to dword"); wx_err(wx, "Buffer length failure, not aligned to dword");
status = -EINVAL; status = -EINVAL;
goto rel_out; goto rel_out;
} }
...@@ -193,38 +194,38 @@ int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer, ...@@ -193,38 +194,38 @@ int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer,
* into the ram area. * into the ram area.
*/ */
for (i = 0; i < dword_len; i++) { for (i = 0; i < dword_len; i++) {
wr32a(wxhw, WX_MNG_MBOX, i, (__force u32)cpu_to_le32(buffer[i])); wr32a(wx, WX_MNG_MBOX, i, (__force u32)cpu_to_le32(buffer[i]));
/* write flush */ /* write flush */
buf[i] = rd32a(wxhw, WX_MNG_MBOX, i); buf[i] = rd32a(wx, WX_MNG_MBOX, i);
} }
/* Setting this bit tells the ARC that a new command is pending. */ /* Setting this bit tells the ARC that a new command is pending. */
wr32m(wxhw, WX_MNG_MBOX_CTL, wr32m(wx, WX_MNG_MBOX_CTL,
WX_MNG_MBOX_CTL_SWRDY, WX_MNG_MBOX_CTL_SWRDY); WX_MNG_MBOX_CTL_SWRDY, WX_MNG_MBOX_CTL_SWRDY);
status = read_poll_timeout(rd32, hicr, hicr & WX_MNG_MBOX_CTL_FWRDY, 1000, status = read_poll_timeout(rd32, hicr, hicr & WX_MNG_MBOX_CTL_FWRDY, 1000,
timeout * 1000, false, wxhw, WX_MNG_MBOX_CTL); timeout * 1000, false, wx, WX_MNG_MBOX_CTL);
/* Check command completion */ /* Check command completion */
if (status) { if (status) {
wx_dbg(wxhw, "Command has failed with no status valid.\n"); wx_dbg(wx, "Command has failed with no status valid.\n");
buf[0] = rd32(wxhw, WX_MNG_MBOX); buf[0] = rd32(wx, WX_MNG_MBOX);
if ((buffer[0] & 0xff) != (~buf[0] >> 24)) { if ((buffer[0] & 0xff) != (~buf[0] >> 24)) {
status = -EINVAL; status = -EINVAL;
goto rel_out; goto rel_out;
} }
if ((buf[0] & 0xff0000) >> 16 == 0x80) { if ((buf[0] & 0xff0000) >> 16 == 0x80) {
wx_dbg(wxhw, "It's unknown cmd.\n"); wx_dbg(wx, "It's unknown cmd.\n");
status = -EINVAL; status = -EINVAL;
goto rel_out; goto rel_out;
} }
wx_dbg(wxhw, "write value:\n"); wx_dbg(wx, "write value:\n");
for (i = 0; i < dword_len; i++) for (i = 0; i < dword_len; i++)
wx_dbg(wxhw, "%x ", buffer[i]); wx_dbg(wx, "%x ", buffer[i]);
wx_dbg(wxhw, "read value:\n"); wx_dbg(wx, "read value:\n");
for (i = 0; i < dword_len; i++) for (i = 0; i < dword_len; i++)
wx_dbg(wxhw, "%x ", buf[i]); wx_dbg(wx, "%x ", buf[i]);
} }
if (!return_data) if (!return_data)
...@@ -235,7 +236,7 @@ int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer, ...@@ -235,7 +236,7 @@ int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer,
/* first pull in the header so we know the buffer length */ /* first pull in the header so we know the buffer length */
for (bi = 0; bi < dword_len; bi++) { for (bi = 0; bi < dword_len; bi++) {
buffer[bi] = rd32a(wxhw, WX_MNG_MBOX, bi); buffer[bi] = rd32a(wx, WX_MNG_MBOX, bi);
le32_to_cpus(&buffer[bi]); le32_to_cpus(&buffer[bi]);
} }
...@@ -245,7 +246,7 @@ int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer, ...@@ -245,7 +246,7 @@ int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer,
goto rel_out; goto rel_out;
if (length < buf_len + hdr_size) { if (length < buf_len + hdr_size) {
wx_err(wxhw, "Buffer not large enough for reply message.\n"); wx_err(wx, "Buffer not large enough for reply message.\n");
status = -EFAULT; status = -EFAULT;
goto rel_out; goto rel_out;
} }
...@@ -255,12 +256,12 @@ int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer, ...@@ -255,12 +256,12 @@ int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer,
/* Pull in the rest of the buffer (bi is where we left off) */ /* Pull in the rest of the buffer (bi is where we left off) */
for (; bi <= dword_len; bi++) { for (; bi <= dword_len; bi++) {
buffer[bi] = rd32a(wxhw, WX_MNG_MBOX, bi); buffer[bi] = rd32a(wx, WX_MNG_MBOX, bi);
le32_to_cpus(&buffer[bi]); le32_to_cpus(&buffer[bi]);
} }
rel_out: rel_out:
wx_release_sw_sync(wxhw, WX_MNG_SWFW_SYNC_SW_MB); wx_release_sw_sync(wx, WX_MNG_SWFW_SYNC_SW_MB);
return status; return status;
} }
EXPORT_SYMBOL(wx_host_interface_command); EXPORT_SYMBOL(wx_host_interface_command);
...@@ -268,13 +269,13 @@ EXPORT_SYMBOL(wx_host_interface_command); ...@@ -268,13 +269,13 @@ EXPORT_SYMBOL(wx_host_interface_command);
/** /**
* wx_read_ee_hostif_data - Read EEPROM word using a host interface cmd * wx_read_ee_hostif_data - Read EEPROM word using a host interface cmd
* assuming that the semaphore is already obtained. * assuming that the semaphore is already obtained.
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* @offset: offset of word in the EEPROM to read * @offset: offset of word in the EEPROM to read
* @data: word read from the EEPROM * @data: word read from the EEPROM
* *
* Reads a 16 bit word from the EEPROM using the hostif. * Reads a 16 bit word from the EEPROM using the hostif.
**/ **/
static int wx_read_ee_hostif_data(struct wx_hw *wxhw, u16 offset, u16 *data) static int wx_read_ee_hostif_data(struct wx *wx, u16 offset, u16 *data)
{ {
struct wx_hic_read_shadow_ram buffer; struct wx_hic_read_shadow_ram buffer;
int status; int status;
...@@ -289,33 +290,33 @@ static int wx_read_ee_hostif_data(struct wx_hw *wxhw, u16 offset, u16 *data) ...@@ -289,33 +290,33 @@ static int wx_read_ee_hostif_data(struct wx_hw *wxhw, u16 offset, u16 *data)
/* one word */ /* one word */
buffer.length = (__force u16)cpu_to_be16(sizeof(u16)); buffer.length = (__force u16)cpu_to_be16(sizeof(u16));
status = wx_host_interface_command(wxhw, (u32 *)&buffer, sizeof(buffer), status = wx_host_interface_command(wx, (u32 *)&buffer, sizeof(buffer),
WX_HI_COMMAND_TIMEOUT, false); WX_HI_COMMAND_TIMEOUT, false);
if (status != 0) if (status != 0)
return status; return status;
*data = (u16)rd32a(wxhw, WX_MNG_MBOX, FW_NVM_DATA_OFFSET); *data = (u16)rd32a(wx, WX_MNG_MBOX, FW_NVM_DATA_OFFSET);
return status; return status;
} }
/** /**
* wx_read_ee_hostif - Read EEPROM word using a host interface cmd * wx_read_ee_hostif - Read EEPROM word using a host interface cmd
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* @offset: offset of word in the EEPROM to read * @offset: offset of word in the EEPROM to read
* @data: word read from the EEPROM * @data: word read from the EEPROM
* *
* Reads a 16 bit word from the EEPROM using the hostif. * Reads a 16 bit word from the EEPROM using the hostif.
**/ **/
int wx_read_ee_hostif(struct wx_hw *wxhw, u16 offset, u16 *data) int wx_read_ee_hostif(struct wx *wx, u16 offset, u16 *data)
{ {
int status = 0; int status = 0;
status = wx_acquire_sw_sync(wxhw, WX_MNG_SWFW_SYNC_SW_FLASH); status = wx_acquire_sw_sync(wx, WX_MNG_SWFW_SYNC_SW_FLASH);
if (status == 0) { if (status == 0) {
status = wx_read_ee_hostif_data(wxhw, offset, data); status = wx_read_ee_hostif_data(wx, offset, data);
wx_release_sw_sync(wxhw, WX_MNG_SWFW_SYNC_SW_FLASH); wx_release_sw_sync(wx, WX_MNG_SWFW_SYNC_SW_FLASH);
} }
return status; return status;
...@@ -324,14 +325,14 @@ EXPORT_SYMBOL(wx_read_ee_hostif); ...@@ -324,14 +325,14 @@ EXPORT_SYMBOL(wx_read_ee_hostif);
/** /**
* wx_read_ee_hostif_buffer- Read EEPROM word(s) using hostif * wx_read_ee_hostif_buffer- Read EEPROM word(s) using hostif
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* @offset: offset of word in the EEPROM to read * @offset: offset of word in the EEPROM to read
* @words: number of words * @words: number of words
* @data: word(s) read from the EEPROM * @data: word(s) read from the EEPROM
* *
* Reads a 16 bit word(s) from the EEPROM using the hostif. * Reads a 16 bit word(s) from the EEPROM using the hostif.
**/ **/
int wx_read_ee_hostif_buffer(struct wx_hw *wxhw, int wx_read_ee_hostif_buffer(struct wx *wx,
u16 offset, u16 words, u16 *data) u16 offset, u16 words, u16 *data)
{ {
struct wx_hic_read_shadow_ram buffer; struct wx_hic_read_shadow_ram buffer;
...@@ -342,7 +343,7 @@ int wx_read_ee_hostif_buffer(struct wx_hw *wxhw, ...@@ -342,7 +343,7 @@ int wx_read_ee_hostif_buffer(struct wx_hw *wxhw,
u32 i; u32 i;
/* Take semaphore for the entire operation. */ /* Take semaphore for the entire operation. */
status = wx_acquire_sw_sync(wxhw, WX_MNG_SWFW_SYNC_SW_FLASH); status = wx_acquire_sw_sync(wx, WX_MNG_SWFW_SYNC_SW_FLASH);
if (status != 0) if (status != 0)
return status; return status;
...@@ -361,20 +362,20 @@ int wx_read_ee_hostif_buffer(struct wx_hw *wxhw, ...@@ -361,20 +362,20 @@ int wx_read_ee_hostif_buffer(struct wx_hw *wxhw,
buffer.address = (__force u32)cpu_to_be32((offset + current_word) * 2); buffer.address = (__force u32)cpu_to_be32((offset + current_word) * 2);
buffer.length = (__force u16)cpu_to_be16(words_to_read * 2); buffer.length = (__force u16)cpu_to_be16(words_to_read * 2);
status = wx_host_interface_command(wxhw, (u32 *)&buffer, status = wx_host_interface_command(wx, (u32 *)&buffer,
sizeof(buffer), sizeof(buffer),
WX_HI_COMMAND_TIMEOUT, WX_HI_COMMAND_TIMEOUT,
false); false);
if (status != 0) { if (status != 0) {
wx_err(wxhw, "Host interface command failed\n"); wx_err(wx, "Host interface command failed\n");
goto out; goto out;
} }
for (i = 0; i < words_to_read; i++) { for (i = 0; i < words_to_read; i++) {
u32 reg = WX_MNG_MBOX + (FW_NVM_DATA_OFFSET << 2) + 2 * i; u32 reg = WX_MNG_MBOX + (FW_NVM_DATA_OFFSET << 2) + 2 * i;
value = rd32(wxhw, reg); value = rd32(wx, reg);
data[current_word] = (u16)(value & 0xffff); data[current_word] = (u16)(value & 0xffff);
current_word++; current_word++;
i++; i++;
...@@ -388,7 +389,7 @@ int wx_read_ee_hostif_buffer(struct wx_hw *wxhw, ...@@ -388,7 +389,7 @@ int wx_read_ee_hostif_buffer(struct wx_hw *wxhw,
} }
out: out:
wx_release_sw_sync(wxhw, WX_MNG_SWFW_SYNC_SW_FLASH); wx_release_sw_sync(wx, WX_MNG_SWFW_SYNC_SW_FLASH);
return status; return status;
} }
EXPORT_SYMBOL(wx_read_ee_hostif_buffer); EXPORT_SYMBOL(wx_read_ee_hostif_buffer);
...@@ -416,12 +417,12 @@ static u8 wx_calculate_checksum(u8 *buffer, u32 length) ...@@ -416,12 +417,12 @@ static u8 wx_calculate_checksum(u8 *buffer, u32 length)
/** /**
* wx_reset_hostif - send reset cmd to fw * wx_reset_hostif - send reset cmd to fw
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* *
* Sends reset cmd to firmware through the manageability * Sends reset cmd to firmware through the manageability
* block. * block.
**/ **/
int wx_reset_hostif(struct wx_hw *wxhw) int wx_reset_hostif(struct wx *wx)
{ {
struct wx_hic_reset reset_cmd; struct wx_hic_reset reset_cmd;
int ret_val = 0; int ret_val = 0;
...@@ -430,15 +431,15 @@ int wx_reset_hostif(struct wx_hw *wxhw) ...@@ -430,15 +431,15 @@ int wx_reset_hostif(struct wx_hw *wxhw)
reset_cmd.hdr.cmd = FW_RESET_CMD; reset_cmd.hdr.cmd = FW_RESET_CMD;
reset_cmd.hdr.buf_len = FW_RESET_LEN; reset_cmd.hdr.buf_len = FW_RESET_LEN;
reset_cmd.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED; reset_cmd.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED;
reset_cmd.lan_id = wxhw->bus.func; reset_cmd.lan_id = wx->bus.func;
reset_cmd.reset_type = (u16)wxhw->reset_type; reset_cmd.reset_type = (u16)wx->reset_type;
reset_cmd.hdr.checksum = 0; reset_cmd.hdr.checksum = 0;
reset_cmd.hdr.checksum = wx_calculate_checksum((u8 *)&reset_cmd, reset_cmd.hdr.checksum = wx_calculate_checksum((u8 *)&reset_cmd,
(FW_CEM_HDR_LEN + (FW_CEM_HDR_LEN +
reset_cmd.hdr.buf_len)); reset_cmd.hdr.buf_len));
for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) { for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {
ret_val = wx_host_interface_command(wxhw, (u32 *)&reset_cmd, ret_val = wx_host_interface_command(wx, (u32 *)&reset_cmd,
sizeof(reset_cmd), sizeof(reset_cmd),
WX_HI_COMMAND_TIMEOUT, WX_HI_COMMAND_TIMEOUT,
true); true);
...@@ -460,14 +461,14 @@ EXPORT_SYMBOL(wx_reset_hostif); ...@@ -460,14 +461,14 @@ EXPORT_SYMBOL(wx_reset_hostif);
/** /**
* wx_init_eeprom_params - Initialize EEPROM params * wx_init_eeprom_params - Initialize EEPROM params
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* *
* Initializes the EEPROM parameters wx_eeprom_info within the * Initializes the EEPROM parameters wx_eeprom_info within the
* wx_hw struct in order to set up EEPROM access. * wx_hw struct in order to set up EEPROM access.
**/ **/
void wx_init_eeprom_params(struct wx_hw *wxhw) void wx_init_eeprom_params(struct wx *wx)
{ {
struct wx_eeprom_info *eeprom = &wxhw->eeprom; struct wx_eeprom_info *eeprom = &wx->eeprom;
u16 eeprom_size; u16 eeprom_size;
u16 data = 0x80; u16 data = 0x80;
...@@ -475,21 +476,21 @@ void wx_init_eeprom_params(struct wx_hw *wxhw) ...@@ -475,21 +476,21 @@ void wx_init_eeprom_params(struct wx_hw *wxhw)
eeprom->semaphore_delay = 10; eeprom->semaphore_delay = 10;
eeprom->type = wx_eeprom_none; eeprom->type = wx_eeprom_none;
if (!(rd32(wxhw, WX_SPI_STATUS) & if (!(rd32(wx, WX_SPI_STATUS) &
WX_SPI_STATUS_FLASH_BYPASS)) { WX_SPI_STATUS_FLASH_BYPASS)) {
eeprom->type = wx_flash; eeprom->type = wx_flash;
eeprom_size = 4096; eeprom_size = 4096;
eeprom->word_size = eeprom_size >> 1; eeprom->word_size = eeprom_size >> 1;
wx_dbg(wxhw, "Eeprom params: type = %d, size = %d\n", wx_dbg(wx, "Eeprom params: type = %d, size = %d\n",
eeprom->type, eeprom->word_size); eeprom->type, eeprom->word_size);
} }
} }
if (wxhw->mac.type == wx_mac_sp) { if (wx->mac.type == wx_mac_sp) {
if (wx_read_ee_hostif(wxhw, WX_SW_REGION_PTR, &data)) { if (wx_read_ee_hostif(wx, WX_SW_REGION_PTR, &data)) {
wx_err(wxhw, "NVM Read Error\n"); wx_err(wx, "NVM Read Error\n");
return; return;
} }
data = data >> 1; data = data >> 1;
...@@ -501,22 +502,22 @@ EXPORT_SYMBOL(wx_init_eeprom_params); ...@@ -501,22 +502,22 @@ EXPORT_SYMBOL(wx_init_eeprom_params);
/** /**
* wx_get_mac_addr - Generic get MAC address * wx_get_mac_addr - Generic get MAC address
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* @mac_addr: Adapter MAC address * @mac_addr: Adapter MAC address
* *
* Reads the adapter's MAC address from first Receive Address Register (RAR0) * Reads the adapter's MAC address from first Receive Address Register (RAR0)
* A reset of the adapter must be performed prior to calling this function * A reset of the adapter must be performed prior to calling this function
* in order for the MAC address to have been loaded from the EEPROM into RAR0 * in order for the MAC address to have been loaded from the EEPROM into RAR0
**/ **/
void wx_get_mac_addr(struct wx_hw *wxhw, u8 *mac_addr) void wx_get_mac_addr(struct wx *wx, u8 *mac_addr)
{ {
u32 rar_high; u32 rar_high;
u32 rar_low; u32 rar_low;
u16 i; u16 i;
wr32(wxhw, WX_PSR_MAC_SWC_IDX, 0); wr32(wx, WX_PSR_MAC_SWC_IDX, 0);
rar_high = rd32(wxhw, WX_PSR_MAC_SWC_AD_H); rar_high = rd32(wx, WX_PSR_MAC_SWC_AD_H);
rar_low = rd32(wxhw, WX_PSR_MAC_SWC_AD_L); rar_low = rd32(wx, WX_PSR_MAC_SWC_AD_L);
for (i = 0; i < 2; i++) for (i = 0; i < 2; i++)
mac_addr[i] = (u8)(rar_high >> (1 - i) * 8); mac_addr[i] = (u8)(rar_high >> (1 - i) * 8);
...@@ -528,7 +529,7 @@ EXPORT_SYMBOL(wx_get_mac_addr); ...@@ -528,7 +529,7 @@ EXPORT_SYMBOL(wx_get_mac_addr);
/** /**
* wx_set_rar - Set Rx address register * wx_set_rar - Set Rx address register
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* @index: Receive address register to write * @index: Receive address register to write
* @addr: Address to put into receive address register * @addr: Address to put into receive address register
* @pools: VMDq "set" or "pool" index * @pools: VMDq "set" or "pool" index
...@@ -536,25 +537,25 @@ EXPORT_SYMBOL(wx_get_mac_addr); ...@@ -536,25 +537,25 @@ EXPORT_SYMBOL(wx_get_mac_addr);
* *
* Puts an ethernet address into a receive address register. * Puts an ethernet address into a receive address register.
**/ **/
int wx_set_rar(struct wx_hw *wxhw, u32 index, u8 *addr, u64 pools, static int wx_set_rar(struct wx *wx, u32 index, u8 *addr, u64 pools,
u32 enable_addr) u32 enable_addr)
{ {
u32 rar_entries = wxhw->mac.num_rar_entries; u32 rar_entries = wx->mac.num_rar_entries;
u32 rar_low, rar_high; u32 rar_low, rar_high;
/* Make sure we are using a valid rar index range */ /* Make sure we are using a valid rar index range */
if (index >= rar_entries) { if (index >= rar_entries) {
wx_err(wxhw, "RAR index %d is out of range.\n", index); wx_err(wx, "RAR index %d is out of range.\n", index);
return -EINVAL; return -EINVAL;
} }
/* select the MAC address */ /* select the MAC address */
wr32(wxhw, WX_PSR_MAC_SWC_IDX, index); wr32(wx, WX_PSR_MAC_SWC_IDX, index);
/* setup VMDq pool mapping */ /* setup VMDq pool mapping */
wr32(wxhw, WX_PSR_MAC_SWC_VM_L, pools & 0xFFFFFFFF); wr32(wx, WX_PSR_MAC_SWC_VM_L, pools & 0xFFFFFFFF);
if (wxhw->mac.type == wx_mac_sp) if (wx->mac.type == wx_mac_sp)
wr32(wxhw, WX_PSR_MAC_SWC_VM_H, pools >> 32); wr32(wx, WX_PSR_MAC_SWC_VM_H, pools >> 32);
/* HW expects these in little endian so we reverse the byte /* HW expects these in little endian so we reverse the byte
* order from network order (big endian) to little endian * order from network order (big endian) to little endian
...@@ -572,8 +573,8 @@ int wx_set_rar(struct wx_hw *wxhw, u32 index, u8 *addr, u64 pools, ...@@ -572,8 +573,8 @@ int wx_set_rar(struct wx_hw *wxhw, u32 index, u8 *addr, u64 pools,
if (enable_addr != 0) if (enable_addr != 0)
rar_high |= WX_PSR_MAC_SWC_AD_H_AV; rar_high |= WX_PSR_MAC_SWC_AD_H_AV;
wr32(wxhw, WX_PSR_MAC_SWC_AD_L, rar_low); wr32(wx, WX_PSR_MAC_SWC_AD_L, rar_low);
wr32m(wxhw, WX_PSR_MAC_SWC_AD_H, wr32m(wx, WX_PSR_MAC_SWC_AD_H,
(WX_PSR_MAC_SWC_AD_H_AD(~0) | (WX_PSR_MAC_SWC_AD_H_AD(~0) |
WX_PSR_MAC_SWC_AD_H_ADTYPE(~0) | WX_PSR_MAC_SWC_AD_H_ADTYPE(~0) |
WX_PSR_MAC_SWC_AD_H_AV), WX_PSR_MAC_SWC_AD_H_AV),
...@@ -581,22 +582,21 @@ int wx_set_rar(struct wx_hw *wxhw, u32 index, u8 *addr, u64 pools, ...@@ -581,22 +582,21 @@ int wx_set_rar(struct wx_hw *wxhw, u32 index, u8 *addr, u64 pools,
return 0; return 0;
} }
EXPORT_SYMBOL(wx_set_rar);
/** /**
* wx_clear_rar - Remove Rx address register * wx_clear_rar - Remove Rx address register
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* @index: Receive address register to write * @index: Receive address register to write
* *
* Clears an ethernet address from a receive address register. * Clears an ethernet address from a receive address register.
**/ **/
int wx_clear_rar(struct wx_hw *wxhw, u32 index) static int wx_clear_rar(struct wx *wx, u32 index)
{ {
u32 rar_entries = wxhw->mac.num_rar_entries; u32 rar_entries = wx->mac.num_rar_entries;
/* Make sure we are using a valid rar index range */ /* Make sure we are using a valid rar index range */
if (index >= rar_entries) { if (index >= rar_entries) {
wx_err(wxhw, "RAR index %d is out of range.\n", index); wx_err(wx, "RAR index %d is out of range.\n", index);
return -EINVAL; return -EINVAL;
} }
...@@ -604,13 +604,13 @@ int wx_clear_rar(struct wx_hw *wxhw, u32 index) ...@@ -604,13 +604,13 @@ int wx_clear_rar(struct wx_hw *wxhw, u32 index)
* so save everything except the lower 16 bits that hold part * so save everything except the lower 16 bits that hold part
* of the address and the address valid bit. * of the address and the address valid bit.
*/ */
wr32(wxhw, WX_PSR_MAC_SWC_IDX, index); wr32(wx, WX_PSR_MAC_SWC_IDX, index);
wr32(wxhw, WX_PSR_MAC_SWC_VM_L, 0); wr32(wx, WX_PSR_MAC_SWC_VM_L, 0);
wr32(wxhw, WX_PSR_MAC_SWC_VM_H, 0); wr32(wx, WX_PSR_MAC_SWC_VM_H, 0);
wr32(wxhw, WX_PSR_MAC_SWC_AD_L, 0); wr32(wx, WX_PSR_MAC_SWC_AD_L, 0);
wr32m(wxhw, WX_PSR_MAC_SWC_AD_H, wr32m(wx, WX_PSR_MAC_SWC_AD_H,
(WX_PSR_MAC_SWC_AD_H_AD(~0) | (WX_PSR_MAC_SWC_AD_H_AD(~0) |
WX_PSR_MAC_SWC_AD_H_ADTYPE(~0) | WX_PSR_MAC_SWC_AD_H_ADTYPE(~0) |
WX_PSR_MAC_SWC_AD_H_AV), WX_PSR_MAC_SWC_AD_H_AV),
...@@ -618,64 +618,63 @@ int wx_clear_rar(struct wx_hw *wxhw, u32 index) ...@@ -618,64 +618,63 @@ int wx_clear_rar(struct wx_hw *wxhw, u32 index)
return 0; return 0;
} }
EXPORT_SYMBOL(wx_clear_rar);
/** /**
* wx_clear_vmdq - Disassociate a VMDq pool index from a rx address * wx_clear_vmdq - Disassociate a VMDq pool index from a rx address
* @wxhw: pointer to hardware struct * @wx: pointer to hardware struct
* @rar: receive address register index to disassociate * @rar: receive address register index to disassociate
* @vmdq: VMDq pool index to remove from the rar * @vmdq: VMDq pool index to remove from the rar
**/ **/
static int wx_clear_vmdq(struct wx_hw *wxhw, u32 rar, u32 __maybe_unused vmdq) static int wx_clear_vmdq(struct wx *wx, u32 rar, u32 __maybe_unused vmdq)
{ {
u32 rar_entries = wxhw->mac.num_rar_entries; u32 rar_entries = wx->mac.num_rar_entries;
u32 mpsar_lo, mpsar_hi; u32 mpsar_lo, mpsar_hi;
/* Make sure we are using a valid rar index range */ /* Make sure we are using a valid rar index range */
if (rar >= rar_entries) { if (rar >= rar_entries) {
wx_err(wxhw, "RAR index %d is out of range.\n", rar); wx_err(wx, "RAR index %d is out of range.\n", rar);
return -EINVAL; return -EINVAL;
} }
wr32(wxhw, WX_PSR_MAC_SWC_IDX, rar); wr32(wx, WX_PSR_MAC_SWC_IDX, rar);
mpsar_lo = rd32(wxhw, WX_PSR_MAC_SWC_VM_L); mpsar_lo = rd32(wx, WX_PSR_MAC_SWC_VM_L);
mpsar_hi = rd32(wxhw, WX_PSR_MAC_SWC_VM_H); mpsar_hi = rd32(wx, WX_PSR_MAC_SWC_VM_H);
if (!mpsar_lo && !mpsar_hi) if (!mpsar_lo && !mpsar_hi)
return 0; return 0;
/* was that the last pool using this rar? */ /* was that the last pool using this rar? */
if (mpsar_lo == 0 && mpsar_hi == 0 && rar != 0) if (mpsar_lo == 0 && mpsar_hi == 0 && rar != 0)
wx_clear_rar(wxhw, rar); wx_clear_rar(wx, rar);
return 0; return 0;
} }
/** /**
* wx_init_uta_tables - Initialize the Unicast Table Array * wx_init_uta_tables - Initialize the Unicast Table Array
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
**/ **/
static void wx_init_uta_tables(struct wx_hw *wxhw) static void wx_init_uta_tables(struct wx *wx)
{ {
int i; int i;
wx_dbg(wxhw, " Clearing UTA\n"); wx_dbg(wx, " Clearing UTA\n");
for (i = 0; i < 128; i++) for (i = 0; i < 128; i++)
wr32(wxhw, WX_PSR_UC_TBL(i), 0); wr32(wx, WX_PSR_UC_TBL(i), 0);
} }
/** /**
* wx_init_rx_addrs - Initializes receive address filters. * wx_init_rx_addrs - Initializes receive address filters.
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* *
* Places the MAC address in receive address register 0 and clears the rest * Places the MAC address in receive address register 0 and clears the rest
* of the receive address registers. Clears the multicast table. Assumes * of the receive address registers. Clears the multicast table. Assumes
* the receiver is in reset when the routine is called. * the receiver is in reset when the routine is called.
**/ **/
void wx_init_rx_addrs(struct wx_hw *wxhw) void wx_init_rx_addrs(struct wx *wx)
{ {
u32 rar_entries = wxhw->mac.num_rar_entries; u32 rar_entries = wx->mac.num_rar_entries;
u32 psrctl; u32 psrctl;
int i; int i;
...@@ -683,67 +682,166 @@ void wx_init_rx_addrs(struct wx_hw *wxhw) ...@@ -683,67 +682,166 @@ void wx_init_rx_addrs(struct wx_hw *wxhw)
* to the permanent address. * to the permanent address.
* Otherwise, use the permanent address from the eeprom. * Otherwise, use the permanent address from the eeprom.
*/ */
if (!is_valid_ether_addr(wxhw->mac.addr)) { if (!is_valid_ether_addr(wx->mac.addr)) {
/* Get the MAC address from the RAR0 for later reference */ /* Get the MAC address from the RAR0 for later reference */
wx_get_mac_addr(wxhw, wxhw->mac.addr); wx_get_mac_addr(wx, wx->mac.addr);
wx_dbg(wxhw, "Keeping Current RAR0 Addr = %pM\n", wxhw->mac.addr); wx_dbg(wx, "Keeping Current RAR0 Addr = %pM\n", wx->mac.addr);
} else { } else {
/* Setup the receive address. */ /* Setup the receive address. */
wx_dbg(wxhw, "Overriding MAC Address in RAR[0]\n"); wx_dbg(wx, "Overriding MAC Address in RAR[0]\n");
wx_dbg(wxhw, "New MAC Addr = %pM\n", wxhw->mac.addr); wx_dbg(wx, "New MAC Addr = %pM\n", wx->mac.addr);
wx_set_rar(wxhw, 0, wxhw->mac.addr, 0, WX_PSR_MAC_SWC_AD_H_AV); wx_set_rar(wx, 0, wx->mac.addr, 0, WX_PSR_MAC_SWC_AD_H_AV);
if (wxhw->mac.type == wx_mac_sp) { if (wx->mac.type == wx_mac_sp) {
/* clear VMDq pool/queue selection for RAR 0 */ /* clear VMDq pool/queue selection for RAR 0 */
wx_clear_vmdq(wxhw, 0, WX_CLEAR_VMDQ_ALL); wx_clear_vmdq(wx, 0, WX_CLEAR_VMDQ_ALL);
} }
} }
/* Zero out the other receive addresses. */ /* Zero out the other receive addresses. */
wx_dbg(wxhw, "Clearing RAR[1-%d]\n", rar_entries - 1); wx_dbg(wx, "Clearing RAR[1-%d]\n", rar_entries - 1);
for (i = 1; i < rar_entries; i++) { for (i = 1; i < rar_entries; i++) {
wr32(wxhw, WX_PSR_MAC_SWC_IDX, i); wr32(wx, WX_PSR_MAC_SWC_IDX, i);
wr32(wxhw, WX_PSR_MAC_SWC_AD_L, 0); wr32(wx, WX_PSR_MAC_SWC_AD_L, 0);
wr32(wxhw, WX_PSR_MAC_SWC_AD_H, 0); wr32(wx, WX_PSR_MAC_SWC_AD_H, 0);
} }
/* Clear the MTA */ /* Clear the MTA */
wxhw->addr_ctrl.mta_in_use = 0; wx->addr_ctrl.mta_in_use = 0;
psrctl = rd32(wxhw, WX_PSR_CTL); psrctl = rd32(wx, WX_PSR_CTL);
psrctl &= ~(WX_PSR_CTL_MO | WX_PSR_CTL_MFE); psrctl &= ~(WX_PSR_CTL_MO | WX_PSR_CTL_MFE);
psrctl |= wxhw->mac.mc_filter_type << WX_PSR_CTL_MO_SHIFT; psrctl |= wx->mac.mc_filter_type << WX_PSR_CTL_MO_SHIFT;
wr32(wxhw, WX_PSR_CTL, psrctl); wr32(wx, WX_PSR_CTL, psrctl);
wx_dbg(wxhw, " Clearing MTA\n"); wx_dbg(wx, " Clearing MTA\n");
for (i = 0; i < wxhw->mac.mcft_size; i++) for (i = 0; i < wx->mac.mcft_size; i++)
wr32(wxhw, WX_PSR_MC_TBL(i), 0); wr32(wx, WX_PSR_MC_TBL(i), 0);
wx_init_uta_tables(wxhw); wx_init_uta_tables(wx);
} }
EXPORT_SYMBOL(wx_init_rx_addrs); EXPORT_SYMBOL(wx_init_rx_addrs);
void wx_disable_rx(struct wx_hw *wxhw) static void wx_sync_mac_table(struct wx *wx)
{
int i;
for (i = 0; i < wx->mac.num_rar_entries; i++) {
if (wx->mac_table[i].state & WX_MAC_STATE_MODIFIED) {
if (wx->mac_table[i].state & WX_MAC_STATE_IN_USE) {
wx_set_rar(wx, i,
wx->mac_table[i].addr,
wx->mac_table[i].pools,
WX_PSR_MAC_SWC_AD_H_AV);
} else {
wx_clear_rar(wx, i);
}
wx->mac_table[i].state &= ~(WX_MAC_STATE_MODIFIED);
}
}
}
/* this function destroys the first RAR entry */
void wx_mac_set_default_filter(struct wx *wx, u8 *addr)
{
memcpy(&wx->mac_table[0].addr, addr, ETH_ALEN);
wx->mac_table[0].pools = 1ULL;
wx->mac_table[0].state = (WX_MAC_STATE_DEFAULT | WX_MAC_STATE_IN_USE);
wx_set_rar(wx, 0, wx->mac_table[0].addr,
wx->mac_table[0].pools,
WX_PSR_MAC_SWC_AD_H_AV);
}
EXPORT_SYMBOL(wx_mac_set_default_filter);
void wx_flush_sw_mac_table(struct wx *wx)
{
u32 i;
for (i = 0; i < wx->mac.num_rar_entries; i++) {
if (!(wx->mac_table[i].state & WX_MAC_STATE_IN_USE))
continue;
wx->mac_table[i].state |= WX_MAC_STATE_MODIFIED;
wx->mac_table[i].state &= ~WX_MAC_STATE_IN_USE;
memset(wx->mac_table[i].addr, 0, ETH_ALEN);
wx->mac_table[i].pools = 0;
}
wx_sync_mac_table(wx);
}
EXPORT_SYMBOL(wx_flush_sw_mac_table);
static int wx_del_mac_filter(struct wx *wx, u8 *addr, u16 pool)
{
u32 i;
if (is_zero_ether_addr(addr))
return -EINVAL;
/* search table for addr, if found, set to 0 and sync */
for (i = 0; i < wx->mac.num_rar_entries; i++) {
if (!ether_addr_equal(addr, wx->mac_table[i].addr))
continue;
wx->mac_table[i].state |= WX_MAC_STATE_MODIFIED;
wx->mac_table[i].pools &= ~(1ULL << pool);
if (!wx->mac_table[i].pools) {
wx->mac_table[i].state &= ~WX_MAC_STATE_IN_USE;
memset(wx->mac_table[i].addr, 0, ETH_ALEN);
}
wx_sync_mac_table(wx);
return 0;
}
return -ENOMEM;
}
/**
* wx_set_mac - Change the Ethernet Address of the NIC
* @netdev: network interface device structure
* @p: pointer to an address structure
*
* Returns 0 on success, negative on failure
**/
int wx_set_mac(struct net_device *netdev, void *p)
{
struct wx *wx = netdev_priv(netdev);
struct sockaddr *addr = p;
int retval;
retval = eth_prepare_mac_addr_change(netdev, addr);
if (retval)
return retval;
wx_del_mac_filter(wx, wx->mac.addr, 0);
eth_hw_addr_set(netdev, addr->sa_data);
memcpy(wx->mac.addr, addr->sa_data, netdev->addr_len);
wx_mac_set_default_filter(wx, wx->mac.addr);
return 0;
}
EXPORT_SYMBOL(wx_set_mac);
void wx_disable_rx(struct wx *wx)
{ {
u32 pfdtxgswc; u32 pfdtxgswc;
u32 rxctrl; u32 rxctrl;
rxctrl = rd32(wxhw, WX_RDB_PB_CTL); rxctrl = rd32(wx, WX_RDB_PB_CTL);
if (rxctrl & WX_RDB_PB_CTL_RXEN) { if (rxctrl & WX_RDB_PB_CTL_RXEN) {
pfdtxgswc = rd32(wxhw, WX_PSR_CTL); pfdtxgswc = rd32(wx, WX_PSR_CTL);
if (pfdtxgswc & WX_PSR_CTL_SW_EN) { if (pfdtxgswc & WX_PSR_CTL_SW_EN) {
pfdtxgswc &= ~WX_PSR_CTL_SW_EN; pfdtxgswc &= ~WX_PSR_CTL_SW_EN;
wr32(wxhw, WX_PSR_CTL, pfdtxgswc); wr32(wx, WX_PSR_CTL, pfdtxgswc);
wxhw->mac.set_lben = true; wx->mac.set_lben = true;
} else { } else {
wxhw->mac.set_lben = false; wx->mac.set_lben = false;
} }
rxctrl &= ~WX_RDB_PB_CTL_RXEN; rxctrl &= ~WX_RDB_PB_CTL_RXEN;
wr32(wxhw, WX_RDB_PB_CTL, rxctrl); wr32(wx, WX_RDB_PB_CTL, rxctrl);
if (!(((wxhw->subsystem_device_id & WX_NCSI_MASK) == WX_NCSI_SUP) || if (!(((wx->subsystem_device_id & WX_NCSI_MASK) == WX_NCSI_SUP) ||
((wxhw->subsystem_device_id & WX_WOL_MASK) == WX_WOL_SUP))) { ((wx->subsystem_device_id & WX_WOL_MASK) == WX_WOL_SUP))) {
/* disable mac receiver */ /* disable mac receiver */
wr32m(wxhw, WX_MAC_RX_CFG, wr32m(wx, WX_MAC_RX_CFG,
WX_MAC_RX_CFG_RE, 0); WX_MAC_RX_CFG_RE, 0);
} }
} }
...@@ -752,28 +850,28 @@ EXPORT_SYMBOL(wx_disable_rx); ...@@ -752,28 +850,28 @@ EXPORT_SYMBOL(wx_disable_rx);
/** /**
* wx_disable_pcie_master - Disable PCI-express master access * wx_disable_pcie_master - Disable PCI-express master access
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* *
* Disables PCI-Express master access and verifies there are no pending * Disables PCI-Express master access and verifies there are no pending
* requests. * requests.
**/ **/
int wx_disable_pcie_master(struct wx_hw *wxhw) int wx_disable_pcie_master(struct wx *wx)
{ {
int status = 0; int status = 0;
u32 val; u32 val;
/* Always set this bit to ensure any future transactions are blocked */ /* Always set this bit to ensure any future transactions are blocked */
pci_clear_master(wxhw->pdev); pci_clear_master(wx->pdev);
/* Exit if master requests are blocked */ /* Exit if master requests are blocked */
if (!(rd32(wxhw, WX_PX_TRANSACTION_PENDING))) if (!(rd32(wx, WX_PX_TRANSACTION_PENDING)))
return 0; return 0;
/* Poll for master request bit to clear */ /* Poll for master request bit to clear */
status = read_poll_timeout(rd32, val, !val, 100, WX_PCI_MASTER_DISABLE_TIMEOUT, status = read_poll_timeout(rd32, val, !val, 100, WX_PCI_MASTER_DISABLE_TIMEOUT,
false, wxhw, WX_PX_TRANSACTION_PENDING); false, wx, WX_PX_TRANSACTION_PENDING);
if (status < 0) if (status < 0)
wx_err(wxhw, "PCIe transaction pending bit did not clear.\n"); wx_err(wx, "PCIe transaction pending bit did not clear.\n");
return status; return status;
} }
...@@ -781,106 +879,106 @@ EXPORT_SYMBOL(wx_disable_pcie_master); ...@@ -781,106 +879,106 @@ EXPORT_SYMBOL(wx_disable_pcie_master);
/** /**
* wx_stop_adapter - Generic stop Tx/Rx units * wx_stop_adapter - Generic stop Tx/Rx units
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* *
* Sets the adapter_stopped flag within wx_hw struct. Clears interrupts, * Sets the adapter_stopped flag within wx_hw struct. Clears interrupts,
* disables transmit and receive units. The adapter_stopped flag is used by * disables transmit and receive units. The adapter_stopped flag is used by
* the shared code and drivers to determine if the adapter is in a stopped * the shared code and drivers to determine if the adapter is in a stopped
* state and should not touch the hardware. * state and should not touch the hardware.
**/ **/
int wx_stop_adapter(struct wx_hw *wxhw) int wx_stop_adapter(struct wx *wx)
{ {
u16 i; u16 i;
/* Set the adapter_stopped flag so other driver functions stop touching /* Set the adapter_stopped flag so other driver functions stop touching
* the hardware * the hardware
*/ */
wxhw->adapter_stopped = true; wx->adapter_stopped = true;
/* Disable the receive unit */ /* Disable the receive unit */
wx_disable_rx(wxhw); wx_disable_rx(wx);
/* Set interrupt mask to stop interrupts from being generated */ /* Set interrupt mask to stop interrupts from being generated */
wx_intr_disable(wxhw, WX_INTR_ALL); wx_intr_disable(wx, WX_INTR_ALL);
/* Clear any pending interrupts, flush previous writes */ /* Clear any pending interrupts, flush previous writes */
wr32(wxhw, WX_PX_MISC_IC, 0xffffffff); wr32(wx, WX_PX_MISC_IC, 0xffffffff);
wr32(wxhw, WX_BME_CTL, 0x3); wr32(wx, WX_BME_CTL, 0x3);
/* Disable the transmit unit. Each queue must be disabled. */ /* Disable the transmit unit. Each queue must be disabled. */
for (i = 0; i < wxhw->mac.max_tx_queues; i++) { for (i = 0; i < wx->mac.max_tx_queues; i++) {
wr32m(wxhw, WX_PX_TR_CFG(i), wr32m(wx, WX_PX_TR_CFG(i),
WX_PX_TR_CFG_SWFLSH | WX_PX_TR_CFG_ENABLE, WX_PX_TR_CFG_SWFLSH | WX_PX_TR_CFG_ENABLE,
WX_PX_TR_CFG_SWFLSH); WX_PX_TR_CFG_SWFLSH);
} }
/* Disable the receive unit by stopping each queue */ /* Disable the receive unit by stopping each queue */
for (i = 0; i < wxhw->mac.max_rx_queues; i++) { for (i = 0; i < wx->mac.max_rx_queues; i++) {
wr32m(wxhw, WX_PX_RR_CFG(i), wr32m(wx, WX_PX_RR_CFG(i),
WX_PX_RR_CFG_RR_EN, 0); WX_PX_RR_CFG_RR_EN, 0);
} }
/* flush all queues disables */ /* flush all queues disables */
WX_WRITE_FLUSH(wxhw); WX_WRITE_FLUSH(wx);
/* Prevent the PCI-E bus from hanging by disabling PCI-E master /* Prevent the PCI-E bus from hanging by disabling PCI-E master
* access and verify no pending requests * access and verify no pending requests
*/ */
return wx_disable_pcie_master(wxhw); return wx_disable_pcie_master(wx);
} }
EXPORT_SYMBOL(wx_stop_adapter); EXPORT_SYMBOL(wx_stop_adapter);
void wx_reset_misc(struct wx_hw *wxhw) void wx_reset_misc(struct wx *wx)
{ {
int i; int i;
/* receive packets that size > 2048 */ /* receive packets that size > 2048 */
wr32m(wxhw, WX_MAC_RX_CFG, WX_MAC_RX_CFG_JE, WX_MAC_RX_CFG_JE); wr32m(wx, WX_MAC_RX_CFG, WX_MAC_RX_CFG_JE, WX_MAC_RX_CFG_JE);
/* clear counters on read */ /* clear counters on read */
wr32m(wxhw, WX_MMC_CONTROL, wr32m(wx, WX_MMC_CONTROL,
WX_MMC_CONTROL_RSTONRD, WX_MMC_CONTROL_RSTONRD); WX_MMC_CONTROL_RSTONRD, WX_MMC_CONTROL_RSTONRD);
wr32m(wxhw, WX_MAC_RX_FLOW_CTRL, wr32m(wx, WX_MAC_RX_FLOW_CTRL,
WX_MAC_RX_FLOW_CTRL_RFE, WX_MAC_RX_FLOW_CTRL_RFE); WX_MAC_RX_FLOW_CTRL_RFE, WX_MAC_RX_FLOW_CTRL_RFE);
wr32(wxhw, WX_MAC_PKT_FLT, WX_MAC_PKT_FLT_PR); wr32(wx, WX_MAC_PKT_FLT, WX_MAC_PKT_FLT_PR);
wr32m(wxhw, WX_MIS_RST_ST, wr32m(wx, WX_MIS_RST_ST,
WX_MIS_RST_ST_RST_INIT, 0x1E00); WX_MIS_RST_ST_RST_INIT, 0x1E00);
/* errata 4: initialize mng flex tbl and wakeup flex tbl*/ /* errata 4: initialize mng flex tbl and wakeup flex tbl*/
wr32(wxhw, WX_PSR_MNG_FLEX_SEL, 0); wr32(wx, WX_PSR_MNG_FLEX_SEL, 0);
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
wr32(wxhw, WX_PSR_MNG_FLEX_DW_L(i), 0); wr32(wx, WX_PSR_MNG_FLEX_DW_L(i), 0);
wr32(wxhw, WX_PSR_MNG_FLEX_DW_H(i), 0); wr32(wx, WX_PSR_MNG_FLEX_DW_H(i), 0);
wr32(wxhw, WX_PSR_MNG_FLEX_MSK(i), 0); wr32(wx, WX_PSR_MNG_FLEX_MSK(i), 0);
} }
wr32(wxhw, WX_PSR_LAN_FLEX_SEL, 0); wr32(wx, WX_PSR_LAN_FLEX_SEL, 0);
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
wr32(wxhw, WX_PSR_LAN_FLEX_DW_L(i), 0); wr32(wx, WX_PSR_LAN_FLEX_DW_L(i), 0);
wr32(wxhw, WX_PSR_LAN_FLEX_DW_H(i), 0); wr32(wx, WX_PSR_LAN_FLEX_DW_H(i), 0);
wr32(wxhw, WX_PSR_LAN_FLEX_MSK(i), 0); wr32(wx, WX_PSR_LAN_FLEX_MSK(i), 0);
} }
/* set pause frame dst mac addr */ /* set pause frame dst mac addr */
wr32(wxhw, WX_RDB_PFCMACDAL, 0xC2000001); wr32(wx, WX_RDB_PFCMACDAL, 0xC2000001);
wr32(wxhw, WX_RDB_PFCMACDAH, 0x0180); wr32(wx, WX_RDB_PFCMACDAH, 0x0180);
} }
EXPORT_SYMBOL(wx_reset_misc); EXPORT_SYMBOL(wx_reset_misc);
/** /**
* wx_get_pcie_msix_counts - Gets MSI-X vector count * wx_get_pcie_msix_counts - Gets MSI-X vector count
* @wxhw: pointer to hardware structure * @wx: pointer to hardware structure
* @msix_count: number of MSI interrupts that can be obtained * @msix_count: number of MSI interrupts that can be obtained
* @max_msix_count: number of MSI interrupts that mac need * @max_msix_count: number of MSI interrupts that mac need
* *
* Read PCIe configuration space, and get the MSI-X vector count from * Read PCIe configuration space, and get the MSI-X vector count from
* the capabilities table. * the capabilities table.
**/ **/
int wx_get_pcie_msix_counts(struct wx_hw *wxhw, u16 *msix_count, u16 max_msix_count) int wx_get_pcie_msix_counts(struct wx *wx, u16 *msix_count, u16 max_msix_count)
{ {
struct pci_dev *pdev = wxhw->pdev; struct pci_dev *pdev = wx->pdev;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
int pos; int pos;
...@@ -904,31 +1002,39 @@ int wx_get_pcie_msix_counts(struct wx_hw *wxhw, u16 *msix_count, u16 max_msix_co ...@@ -904,31 +1002,39 @@ int wx_get_pcie_msix_counts(struct wx_hw *wxhw, u16 *msix_count, u16 max_msix_co
} }
EXPORT_SYMBOL(wx_get_pcie_msix_counts); EXPORT_SYMBOL(wx_get_pcie_msix_counts);
int wx_sw_init(struct wx_hw *wxhw) int wx_sw_init(struct wx *wx)
{ {
struct pci_dev *pdev = wxhw->pdev; struct pci_dev *pdev = wx->pdev;
u32 ssid = 0; u32 ssid = 0;
int err = 0; int err = 0;
wxhw->vendor_id = pdev->vendor; wx->vendor_id = pdev->vendor;
wxhw->device_id = pdev->device; wx->device_id = pdev->device;
wxhw->revision_id = pdev->revision; wx->revision_id = pdev->revision;
wxhw->oem_svid = pdev->subsystem_vendor; wx->oem_svid = pdev->subsystem_vendor;
wxhw->oem_ssid = pdev->subsystem_device; wx->oem_ssid = pdev->subsystem_device;
wxhw->bus.device = PCI_SLOT(pdev->devfn); wx->bus.device = PCI_SLOT(pdev->devfn);
wxhw->bus.func = PCI_FUNC(pdev->devfn); wx->bus.func = PCI_FUNC(pdev->devfn);
if (wxhw->oem_svid == PCI_VENDOR_ID_WANGXUN) { if (wx->oem_svid == PCI_VENDOR_ID_WANGXUN) {
wxhw->subsystem_vendor_id = pdev->subsystem_vendor; wx->subsystem_vendor_id = pdev->subsystem_vendor;
wxhw->subsystem_device_id = pdev->subsystem_device; wx->subsystem_device_id = pdev->subsystem_device;
} else { } else {
err = wx_flash_read_dword(wxhw, 0xfffdc, &ssid); err = wx_flash_read_dword(wx, 0xfffdc, &ssid);
if (!err) if (!err)
wxhw->subsystem_device_id = swab16((u16)ssid); wx->subsystem_device_id = swab16((u16)ssid);
return err; return err;
} }
wx->mac_table = kcalloc(wx->mac.num_rar_entries,
sizeof(struct wx_mac_addr),
GFP_KERNEL);
if (!wx->mac_table) {
wx_err(wx, "mac_table allocation failed\n");
return -ENOMEM;
}
return 0; return 0;
} }
EXPORT_SYMBOL(wx_sw_init); EXPORT_SYMBOL(wx_sw_init);
......
drivers/net/ethernet/wangxun/libwx/wx_hw.h
View file @ f23395b4
...@@ -4,25 +4,26 @@ ...@@ -4,25 +4,26 @@
#ifndef _WX_HW_H_ #ifndef _WX_HW_H_
#define _WX_HW_H_ #define _WX_HW_H_
int wx_check_flash_load(struct wx_hw *hw, u32 check_bit); int wx_check_flash_load(struct wx *wx, u32 check_bit);
void wx_control_hw(struct wx_hw *wxhw, bool drv); void wx_control_hw(struct wx *wx, bool drv);
int wx_mng_present(struct wx_hw *wxhw); int wx_mng_present(struct wx *wx);
int wx_host_interface_command(struct wx_hw *wxhw, u32 *buffer, int wx_host_interface_command(struct wx *wx, u32 *buffer,
u32 length, u32 timeout, bool return_data); u32 length, u32 timeout, bool return_data);
int wx_read_ee_hostif(struct wx_hw *wxhw, u16 offset, u16 *data); int wx_read_ee_hostif(struct wx *wx, u16 offset, u16 *data);
int wx_read_ee_hostif_buffer(struct wx_hw *wxhw, int wx_read_ee_hostif_buffer(struct wx *wx,
u16 offset, u16 words, u16 *data); u16 offset, u16 words, u16 *data);
int wx_reset_hostif(struct wx_hw *wxhw); int wx_reset_hostif(struct wx *wx);
void wx_init_eeprom_params(struct wx_hw *wxhw); void wx_init_eeprom_params(struct wx *wx);
void wx_get_mac_addr(struct wx_hw *wxhw, u8 *mac_addr); void wx_get_mac_addr(struct wx *wx, u8 *mac_addr);
int wx_set_rar(struct wx_hw *wxhw, u32 index, u8 *addr, u64 pools, u32 enable_addr); void wx_init_rx_addrs(struct wx *wx);
int wx_clear_rar(struct wx_hw *wxhw, u32 index); void wx_mac_set_default_filter(struct wx *wx, u8 *addr);
void wx_init_rx_addrs(struct wx_hw *wxhw); void wx_flush_sw_mac_table(struct wx *wx);
void wx_disable_rx(struct wx_hw *wxhw); int wx_set_mac(struct net_device *netdev, void *p);
int wx_disable_pcie_master(struct wx_hw *wxhw); void wx_disable_rx(struct wx *wx);
int wx_stop_adapter(struct wx_hw *wxhw); int wx_disable_pcie_master(struct wx *wx);
void wx_reset_misc(struct wx_hw *wxhw); int wx_stop_adapter(struct wx *wx);
int wx_get_pcie_msix_counts(struct wx_hw *wxhw, u16 *msix_count, u16 max_msix_count); void wx_reset_misc(struct wx *wx);
int wx_sw_init(struct wx_hw *wxhw); int wx_get_pcie_msix_counts(struct wx *wx, u16 *msix_count, u16 max_msix_count);
int wx_sw_init(struct wx *wx);
#endif /* _WX_HW_H_ */ #endif /* _WX_HW_H_ */
drivers/net/ethernet/wangxun/libwx/wx_type.h
View file @ f23395b4
...@@ -185,6 +185,12 @@ ...@@ -185,6 +185,12 @@
#define WX_SW_REGION_PTR 0x1C #define WX_SW_REGION_PTR 0x1C
#define WX_MAC_STATE_DEFAULT 0x1
#define WX_MAC_STATE_MODIFIED 0x2
#define WX_MAC_STATE_IN_USE 0x4
#define WX_CFG_PORT_ST 0x14404
/* Host Interface Command Structures */ /* Host Interface Command Structures */
struct wx_hic_hdr { struct wx_hic_hdr {
u8 cmd; u8 cmd;
...@@ -249,6 +255,12 @@ enum wx_mac_type { ...@@ -249,6 +255,12 @@ enum wx_mac_type {
wx_mac_em wx_mac_em
}; };
enum em_mac_type {
em_mac_type_unknown = 0,
em_mac_type_mdi,
em_mac_type_rgmii
};
struct wx_mac_info { struct wx_mac_info {
enum wx_mac_type type; enum wx_mac_type type;
bool set_lben; bool set_lben;
...@@ -284,19 +296,28 @@ struct wx_addr_filter_info { ...@@ -284,19 +296,28 @@ struct wx_addr_filter_info {
bool user_set_promisc; bool user_set_promisc;
}; };
struct wx_mac_addr {
u8 addr[ETH_ALEN];
u16 state; /* bitmask */
u64 pools;
};
enum wx_reset_type { enum wx_reset_type {
WX_LAN_RESET = 0, WX_LAN_RESET = 0,
WX_SW_RESET, WX_SW_RESET,
WX_GLOBAL_RESET WX_GLOBAL_RESET
}; };
struct wx_hw { struct wx {
u8 __iomem *hw_addr; u8 __iomem *hw_addr;
struct pci_dev *pdev; struct pci_dev *pdev;
struct net_device *netdev;
struct wx_bus_info bus; struct wx_bus_info bus;
struct wx_mac_info mac; struct wx_mac_info mac;
enum em_mac_type mac_type;
struct wx_eeprom_info eeprom; struct wx_eeprom_info eeprom;
struct wx_addr_filter_info addr_ctrl; struct wx_addr_filter_info addr_ctrl;
struct wx_mac_addr *mac_table;
u16 device_id; u16 device_id;
u16 vendor_id; u16 vendor_id;
u16 subsystem_device_id; u16 subsystem_device_id;
...@@ -304,8 +325,39 @@ struct wx_hw { ...@@ -304,8 +325,39 @@ struct wx_hw {
u8 revision_id; u8 revision_id;
u16 oem_ssid; u16 oem_ssid;
u16 oem_svid; u16 oem_svid;
u16 msg_enable;
bool adapter_stopped; bool adapter_stopped;
char eeprom_id[32];
enum wx_reset_type reset_type; enum wx_reset_type reset_type;
bool wol_enabled;
bool ncsi_enabled;
bool gpio_ctrl;
/* Tx fast path data */
int num_tx_queues;
u16 tx_itr_setting;
u16 tx_work_limit;
/* Rx fast path data */
int num_rx_queues;
u16 rx_itr_setting;
u16 rx_work_limit;
int num_q_vectors; /* current number of q_vectors for device */
int max_q_vectors; /* upper limit of q_vectors for device */
u32 tx_ring_count;
u32 rx_ring_count;
#define WX_MAX_RETA_ENTRIES 128
u8 rss_indir_tbl[WX_MAX_RETA_ENTRIES];
#define WX_RSS_KEY_SIZE 40 /* size of RSS Hash Key in bytes */
u32 *rss_key;
u32 wol;
u16 bd_number;
}; };
#define WX_INTR_ALL (~0ULL) #define WX_INTR_ALL (~0ULL)
...@@ -319,23 +371,23 @@ struct wx_hw { ...@@ -319,23 +371,23 @@ struct wx_hw {
wr32((a), (reg) + ((off) << 2), (val)) wr32((a), (reg) + ((off) << 2), (val))
static inline u32 static inline u32
rd32m(struct wx_hw *wxhw, u32 reg, u32 mask) rd32m(struct wx *wx, u32 reg, u32 mask)
{ {
u32 val; u32 val;
val = rd32(wxhw, reg); val = rd32(wx, reg);
return val & mask; return val & mask;
} }
static inline void static inline void
wr32m(struct wx_hw *wxhw, u32 reg, u32 mask, u32 field) wr32m(struct wx *wx, u32 reg, u32 mask, u32 field)
{ {
u32 val; u32 val;
val = rd32(wxhw, reg); val = rd32(wx, reg);
val = ((val & ~mask) | (field & mask)); val = ((val & ~mask) | (field & mask));
wr32(wxhw, reg, val); wr32(wx, reg, val);
} }
/* On some domestic CPU platforms, sometimes IO is not synchronized with /* On some domestic CPU platforms, sometimes IO is not synchronized with
...@@ -343,10 +395,10 @@ wr32m(struct wx_hw *wxhw, u32 reg, u32 mask, u32 field) ...@@ -343,10 +395,10 @@ wr32m(struct wx_hw *wxhw, u32 reg, u32 mask, u32 field)
*/ */
#define WX_WRITE_FLUSH(H) rd32(H, WX_MIS_PWR) #define WX_WRITE_FLUSH(H) rd32(H, WX_MIS_PWR)
#define wx_err(wxhw, fmt, arg...) \ #define wx_err(wx, fmt, arg...) \
dev_err(&(wxhw)->pdev->dev, fmt, ##arg) dev_err(&(wx)->pdev->dev, fmt, ##arg)
#define wx_dbg(wxhw, fmt, arg...) \ #define wx_dbg(wx, fmt, arg...) \
dev_dbg(&(wxhw)->pdev->dev, fmt, ##arg) dev_dbg(&(wx)->pdev->dev, fmt, ##arg)
#endif /* _WX_TYPE_H_ */ #endif /* _WX_TYPE_H_ */
drivers/net/ethernet/wangxun/ngbe/ngbe.h deleted 100644 → 0
View file @ 7abd92a5
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2019 - 2022 Beijing WangXun Technology Co., Ltd. */
#ifndef _NGBE_H_
#define _NGBE_H_
#include "ngbe_type.h"
#define NGBE_MAX_FDIR_INDICES 7
#define NGBE_MAX_RX_QUEUES (NGBE_MAX_FDIR_INDICES + 1)
#define NGBE_MAX_TX_QUEUES (NGBE_MAX_FDIR_INDICES + 1)
#define NGBE_ETH_LENGTH_OF_ADDRESS 6
#define NGBE_MAX_MSIX_VECTORS 0x09
#define NGBE_RAR_ENTRIES 32
/* TX/RX descriptor defines */
#define NGBE_DEFAULT_TXD 512 /* default ring size */
#define NGBE_DEFAULT_TX_WORK 256
#define NGBE_MAX_TXD 8192
#define NGBE_MIN_TXD 128
#define NGBE_DEFAULT_RXD 512 /* default ring size */
#define NGBE_DEFAULT_RX_WORK 256
#define NGBE_MAX_RXD 8192
#define NGBE_MIN_RXD 128
#define NGBE_MAC_STATE_DEFAULT 0x1
#define NGBE_MAC_STATE_MODIFIED 0x2
#define NGBE_MAC_STATE_IN_USE 0x4
struct ngbe_mac_addr {
u8 addr[ETH_ALEN];
u16 state; /* bitmask */
u64 pools;
};
/* board specific private data structure */
struct ngbe_adapter {
u8 __iomem *io_addr; /* Mainly for iounmap use */
/* OS defined structs */
struct net_device *netdev;
struct pci_dev *pdev;
/* structs defined in ngbe_hw.h */
struct ngbe_hw hw;
struct ngbe_mac_addr *mac_table;
u16 msg_enable;
/* Tx fast path data */
int num_tx_queues;
u16 tx_itr_setting;
u16 tx_work_limit;
/* Rx fast path data */
int num_rx_queues;
u16 rx_itr_setting;
u16 rx_work_limit;
int num_q_vectors; /* current number of q_vectors for device */
int max_q_vectors; /* upper limit of q_vectors for device */
u32 tx_ring_count;
u32 rx_ring_count;
#define NGBE_MAX_RETA_ENTRIES 128
u8 rss_indir_tbl[NGBE_MAX_RETA_ENTRIES];
#define NGBE_RSS_KEY_SIZE 40 /* size of RSS Hash Key in bytes */
u32 *rss_key;
u32 wol;
u16 bd_number;
};
extern char ngbe_driver_name[];
#endif /* _NGBE_H_ */
drivers/net/ethernet/wangxun/ngbe/ngbe_hw.c
View file @ f23395b4
...@@ -9,12 +9,10 @@ ...@@ -9,12 +9,10 @@
#include "../libwx/wx_hw.h" #include "../libwx/wx_hw.h"
#include "ngbe_type.h" #include "ngbe_type.h"
#include "ngbe_hw.h" #include "ngbe_hw.h"
#include "ngbe.h"
int ngbe_eeprom_chksum_hostif(struct ngbe_hw *hw) int ngbe_eeprom_chksum_hostif(struct wx *wx)
{ {
struct wx_hic_read_shadow_ram buffer; struct wx_hic_read_shadow_ram buffer;
struct wx_hw *wxhw = &hw->wxhw;
int status; int status;
int tmp; int tmp;
...@@ -27,61 +25,58 @@ int ngbe_eeprom_chksum_hostif(struct ngbe_hw *hw) ...@@ -27,61 +25,58 @@ int ngbe_eeprom_chksum_hostif(struct ngbe_hw *hw)
/* one word */ /* one word */
buffer.length = 0; buffer.length = 0;
status = wx_host_interface_command(wxhw, (u32 *)&buffer, sizeof(buffer), status = wx_host_interface_command(wx, (u32 *)&buffer, sizeof(buffer),
WX_HI_COMMAND_TIMEOUT, false); WX_HI_COMMAND_TIMEOUT, false);
if (status < 0) if (status < 0)
return status; return status;
tmp = rd32a(wxhw, WX_MNG_MBOX, 1); tmp = rd32a(wx, WX_MNG_MBOX, 1);
if (tmp == NGBE_FW_CMD_ST_PASS) if (tmp == NGBE_FW_CMD_ST_PASS)
return 0; return 0;
return -EIO; return -EIO;
} }
static int ngbe_reset_misc(struct ngbe_hw *hw) static int ngbe_reset_misc(struct wx *wx)
{ {
struct wx_hw *wxhw = &hw->wxhw; wx_reset_misc(wx);
if (wx->mac_type == em_mac_type_rgmii)
wx_reset_misc(wxhw); wr32(wx, NGBE_MDIO_CLAUSE_SELECT, 0xF);
if (hw->mac_type == ngbe_mac_type_rgmii) if (wx->gpio_ctrl) {
wr32(wxhw, NGBE_MDIO_CLAUSE_SELECT, 0xF);
if (hw->gpio_ctrl) {
/* gpio0 is used to power on/off control*/ /* gpio0 is used to power on/off control*/
wr32(wxhw, NGBE_GPIO_DDR, 0x1); wr32(wx, NGBE_GPIO_DDR, 0x1);
wr32(wxhw, NGBE_GPIO_DR, NGBE_GPIO_DR_0); wr32(wx, NGBE_GPIO_DR, NGBE_GPIO_DR_0);
} }
return 0; return 0;
} }
/** /**
* ngbe_reset_hw - Perform hardware reset * ngbe_reset_hw - Perform hardware reset
* @hw: pointer to hardware structure * @wx: pointer to hardware structure
* *
* Resets the hardware by resetting the transmit and receive units, masks * Resets the hardware by resetting the transmit and receive units, masks
* and clears all interrupts, perform a PHY reset, and perform a link (MAC) * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
* reset. * reset.
**/ **/
int ngbe_reset_hw(struct ngbe_hw *hw) int ngbe_reset_hw(struct wx *wx)
{ {
struct wx_hw *wxhw = &hw->wxhw;
int status = 0; int status = 0;
u32 reset = 0; u32 reset = 0;
/* Call adapter stop to disable tx/rx and clear interrupts */ /* Call wx stop to disable tx/rx and clear interrupts */
status = wx_stop_adapter(wxhw); status = wx_stop_adapter(wx);
if (status != 0) if (status != 0)
return status; return status;
reset = WX_MIS_RST_LAN_RST(wxhw->bus.func); reset = WX_MIS_RST_LAN_RST(wx->bus.func);
wr32(wxhw, WX_MIS_RST, reset | rd32(wxhw, WX_MIS_RST)); wr32(wx, WX_MIS_RST, reset | rd32(wx, WX_MIS_RST));
ngbe_reset_misc(hw); ngbe_reset_misc(wx);
/* Store the permanent mac address */ /* Store the permanent mac address */
wx_get_mac_addr(wxhw, wxhw->mac.perm_addr); wx_get_mac_addr(wx, wx->mac.perm_addr);
/* reset num_rar_entries to 128 */ /* reset num_rar_entries to 128 */
wxhw->mac.num_rar_entries = NGBE_RAR_ENTRIES; wx->mac.num_rar_entries = NGBE_RAR_ENTRIES;
wx_init_rx_addrs(wxhw); wx_init_rx_addrs(wx);
pci_set_master(wxhw->pdev); pci_set_master(wx->pdev);
return 0; return 0;
} }
drivers/net/ethernet/wangxun/ngbe/ngbe_hw.h
View file @ f23395b4
...@@ -7,6 +7,6 @@ ...@@ -7,6 +7,6 @@
#ifndef _NGBE_HW_H_ #ifndef _NGBE_HW_H_
#define _NGBE_HW_H_ #define _NGBE_HW_H_
int ngbe_eeprom_chksum_hostif(struct ngbe_hw *hw); int ngbe_eeprom_chksum_hostif(struct wx *wx);
int ngbe_reset_hw(struct ngbe_hw *hw); int ngbe_reset_hw(struct wx *wx);
#endif /* _NGBE_HW_H_ */ #endif /* _NGBE_HW_H_ */
drivers/net/ethernet/wangxun/ngbe/ngbe_main.c
View file @ f23395b4
...@@ -14,7 +14,7 @@ ...@@ -14,7 +14,7 @@
#include "../libwx/wx_hw.h" #include "../libwx/wx_hw.h"
#include "ngbe_type.h" #include "ngbe_type.h"
#include "ngbe_hw.h" #include "ngbe_hw.h"
#include "ngbe.h"
char ngbe_driver_name[] = "ngbe"; char ngbe_driver_name[] = "ngbe";
/* ngbe_pci_tbl - PCI Device ID Table /* ngbe_pci_tbl - PCI Device ID Table
...@@ -39,70 +39,27 @@ static const struct pci_device_id ngbe_pci_tbl[] = { ...@@ -39,70 +39,27 @@ static const struct pci_device_id ngbe_pci_tbl[] = {
{ .device = 0 } { .device = 0 }
}; };
static void ngbe_mac_set_default_filter(struct ngbe_adapter *adapter, u8 *addr)
{
struct ngbe_hw *hw = &adapter->hw;
memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
adapter->mac_table[0].pools = 1ULL;
adapter->mac_table[0].state = (NGBE_MAC_STATE_DEFAULT |
NGBE_MAC_STATE_IN_USE);
wx_set_rar(&hw->wxhw, 0, adapter->mac_table[0].addr,
adapter->mac_table[0].pools,
WX_PSR_MAC_SWC_AD_H_AV);
}
/** /**
* ngbe_init_type_code - Initialize the shared code * ngbe_init_type_code - Initialize the shared code
* @hw: pointer to hardware structure * @wx: pointer to hardware structure
**/ **/
static void ngbe_init_type_code(struct ngbe_hw *hw) static void ngbe_init_type_code(struct wx *wx)
{ {
int wol_mask = 0, ncsi_mask = 0; int wol_mask = 0, ncsi_mask = 0;
struct wx_hw *wxhw = &hw->wxhw; u16 type_mask = 0, val;
u16 type_mask = 0;
wxhw->mac.type = wx_mac_em; wx->mac.type = wx_mac_em;
type_mask = (u16)(wxhw->subsystem_device_id & NGBE_OEM_MASK); type_mask = (u16)(wx->subsystem_device_id & NGBE_OEM_MASK);
ncsi_mask = wxhw->subsystem_device_id & NGBE_NCSI_MASK; ncsi_mask = wx->subsystem_device_id & NGBE_NCSI_MASK;
wol_mask = wxhw->subsystem_device_id & NGBE_WOL_MASK; wol_mask = wx->subsystem_device_id & NGBE_WOL_MASK;
switch (type_mask) { val = rd32(wx, WX_CFG_PORT_ST);
case NGBE_SUBID_M88E1512_SFP: wx->mac_type = (val & BIT(7)) >> 7 ?
case NGBE_SUBID_LY_M88E1512_SFP: em_mac_type_rgmii :
hw->phy.type = ngbe_phy_m88e1512_sfi; em_mac_type_mdi;
break;
case NGBE_SUBID_M88E1512_RJ45:
hw->phy.type = ngbe_phy_m88e1512;
break;
case NGBE_SUBID_M88E1512_MIX:
hw->phy.type = ngbe_phy_m88e1512_unknown;
break;
case NGBE_SUBID_YT8521S_SFP:
case NGBE_SUBID_YT8521S_SFP_GPIO:
case NGBE_SUBID_LY_YT8521S_SFP:
hw->phy.type = ngbe_phy_yt8521s_sfi;
break;
case NGBE_SUBID_INTERNAL_YT8521S_SFP:
case NGBE_SUBID_INTERNAL_YT8521S_SFP_GPIO:
hw->phy.type = ngbe_phy_internal_yt8521s_sfi;
break;
case NGBE_SUBID_RGMII_FPGA:
case NGBE_SUBID_OCP_CARD:
fallthrough;
default:
hw->phy.type = ngbe_phy_internal;
break;
}
if (hw->phy.type == ngbe_phy_internal || wx->wol_enabled = (wol_mask == NGBE_WOL_SUP) ? 1 : 0;
hw->phy.type == ngbe_phy_internal_yt8521s_sfi) wx->ncsi_enabled = (ncsi_mask == NGBE_NCSI_MASK ||
hw->mac_type = ngbe_mac_type_mdi;
else
hw->mac_type = ngbe_mac_type_rgmii;
hw->wol_enabled = (wol_mask == NGBE_WOL_SUP) ? 1 : 0;
hw->ncsi_enabled = (ncsi_mask == NGBE_NCSI_MASK ||
type_mask == NGBE_SUBID_OCP_CARD) ? 1 : 0; type_mask == NGBE_SUBID_OCP_CARD) ? 1 : 0;
switch (type_mask) { switch (type_mask) {
...@@ -110,31 +67,31 @@ static void ngbe_init_type_code(struct ngbe_hw *hw) ...@@ -110,31 +67,31 @@ static void ngbe_init_type_code(struct ngbe_hw *hw)
case NGBE_SUBID_LY_M88E1512_SFP: case NGBE_SUBID_LY_M88E1512_SFP:
case NGBE_SUBID_YT8521S_SFP_GPIO: case NGBE_SUBID_YT8521S_SFP_GPIO:
case NGBE_SUBID_INTERNAL_YT8521S_SFP_GPIO: case NGBE_SUBID_INTERNAL_YT8521S_SFP_GPIO:
hw->gpio_ctrl = 1; wx->gpio_ctrl = 1;
break; break;
default: default:
hw->gpio_ctrl = 0; wx->gpio_ctrl = 0;
break; break;
} }
} }
/** /**
* ngbe_init_rss_key - Initialize adapter RSS key * ngbe_init_rss_key - Initialize wx RSS key
* @adapter: device handle * @wx: device handle
* *
* Allocates and initializes the RSS key if it is not allocated. * Allocates and initializes the RSS key if it is not allocated.
**/ **/
static inline int ngbe_init_rss_key(struct ngbe_adapter *adapter) static inline int ngbe_init_rss_key(struct wx *wx)
{ {
u32 *rss_key; u32 *rss_key;
if (!adapter->rss_key) { if (!wx->rss_key) {
rss_key = kzalloc(NGBE_RSS_KEY_SIZE, GFP_KERNEL); rss_key = kzalloc(WX_RSS_KEY_SIZE, GFP_KERNEL);
if (unlikely(!rss_key)) if (unlikely(!rss_key))
return -ENOMEM; return -ENOMEM;
netdev_rss_key_fill(rss_key, NGBE_RSS_KEY_SIZE); netdev_rss_key_fill(rss_key, WX_RSS_KEY_SIZE);
adapter->rss_key = rss_key; wx->rss_key = rss_key;
} }
return 0; return 0;
...@@ -142,71 +99,57 @@ static inline int ngbe_init_rss_key(struct ngbe_adapter *adapter) ...@@ -142,71 +99,57 @@ static inline int ngbe_init_rss_key(struct ngbe_adapter *adapter)
/** /**
* ngbe_sw_init - Initialize general software structures * ngbe_sw_init - Initialize general software structures
* @adapter: board private structure to initialize * @wx: board private structure to initialize
**/ **/
static int ngbe_sw_init(struct ngbe_adapter *adapter) static int ngbe_sw_init(struct wx *wx)
{ {
struct pci_dev *pdev = adapter->pdev; struct pci_dev *pdev = wx->pdev;
struct ngbe_hw *hw = &adapter->hw;
struct wx_hw *wxhw = &hw->wxhw;
u16 msix_count = 0; u16 msix_count = 0;
int err = 0; int err = 0;
wxhw->hw_addr = adapter->io_addr; wx->mac.num_rar_entries = NGBE_RAR_ENTRIES;
wxhw->pdev = pdev; wx->mac.max_rx_queues = NGBE_MAX_RX_QUEUES;
wx->mac.max_tx_queues = NGBE_MAX_TX_QUEUES;
/* PCI config space info */ /* PCI config space info */
err = wx_sw_init(wxhw); err = wx_sw_init(wx);
if (err < 0) { if (err < 0) {
netif_err(adapter, probe, adapter->netdev, wx_err(wx, "read of internal subsystem device id failed\n");
"Read of internal subsystem device id failed\n");
return err; return err;
} }
/* mac type, phy type , oem type */ /* mac type, phy type , oem type */
ngbe_init_type_code(hw); ngbe_init_type_code(wx);
wxhw->mac.max_rx_queues = NGBE_MAX_RX_QUEUES;
wxhw->mac.max_tx_queues = NGBE_MAX_TX_QUEUES;
wxhw->mac.num_rar_entries = NGBE_RAR_ENTRIES;
/* Set common capability flags and settings */ /* Set common capability flags and settings */
adapter->max_q_vectors = NGBE_MAX_MSIX_VECTORS; wx->max_q_vectors = NGBE_MAX_MSIX_VECTORS;
err = wx_get_pcie_msix_counts(wx, &msix_count, NGBE_MAX_MSIX_VECTORS);
err = wx_get_pcie_msix_counts(wxhw, &msix_count, NGBE_MAX_MSIX_VECTORS);
if (err) if (err)
dev_err(&pdev->dev, "Do not support MSI-X\n"); dev_err(&pdev->dev, "Do not support MSI-X\n");
wxhw->mac.max_msix_vectors = msix_count; wx->mac.max_msix_vectors = msix_count;
adapter->mac_table = kcalloc(wxhw->mac.num_rar_entries, if (ngbe_init_rss_key(wx))
sizeof(struct ngbe_mac_addr),
GFP_KERNEL);
if (!adapter->mac_table) {
dev_err(&pdev->dev, "mac_table allocation failed: %d\n", err);
return -ENOMEM;
}
if (ngbe_init_rss_key(adapter))
return -ENOMEM; return -ENOMEM;
/* enable itr by default in dynamic mode */ /* enable itr by default in dynamic mode */
adapter->rx_itr_setting = 1; wx->rx_itr_setting = 1;
adapter->tx_itr_setting = 1; wx->tx_itr_setting = 1;
/* set default ring sizes */ /* set default ring sizes */
adapter->tx_ring_count = NGBE_DEFAULT_TXD; wx->tx_ring_count = NGBE_DEFAULT_TXD;
adapter->rx_ring_count = NGBE_DEFAULT_RXD; wx->rx_ring_count = NGBE_DEFAULT_RXD;
/* set default work limits */ /* set default work limits */
adapter->tx_work_limit = NGBE_DEFAULT_TX_WORK; wx->tx_work_limit = NGBE_DEFAULT_TX_WORK;
adapter->rx_work_limit = NGBE_DEFAULT_RX_WORK; wx->rx_work_limit = NGBE_DEFAULT_RX_WORK;
return 0; return 0;
} }
static void ngbe_down(struct ngbe_adapter *adapter) static void ngbe_down(struct wx *wx)
{ {
netif_carrier_off(adapter->netdev); netif_carrier_off(wx->netdev);
netif_tx_disable(adapter->netdev); netif_tx_disable(wx->netdev);
}; };
/** /**
...@@ -220,11 +163,9 @@ static void ngbe_down(struct ngbe_adapter *adapter) ...@@ -220,11 +163,9 @@ static void ngbe_down(struct ngbe_adapter *adapter)
**/ **/
static int ngbe_open(struct net_device *netdev) static int ngbe_open(struct net_device *netdev)
{ {
struct ngbe_adapter *adapter = netdev_priv(netdev); struct wx *wx = netdev_priv(netdev);
struct ngbe_hw *hw = &adapter->hw;
struct wx_hw *wxhw = &hw->wxhw;
wx_control_hw(wxhw, true); wx_control_hw(wx, true);
return 0; return 0;
} }
...@@ -242,10 +183,10 @@ static int ngbe_open(struct net_device *netdev) ...@@ -242,10 +183,10 @@ static int ngbe_open(struct net_device *netdev)
**/ **/
static int ngbe_close(struct net_device *netdev) static int ngbe_close(struct net_device *netdev)
{ {
struct ngbe_adapter *adapter = netdev_priv(netdev); struct wx *wx = netdev_priv(netdev);
ngbe_down(adapter); ngbe_down(wx);
wx_control_hw(&adapter->hw.wxhw, false); wx_control_hw(wx, false);
return 0; return 0;
} }
...@@ -256,52 +197,29 @@ static netdev_tx_t ngbe_xmit_frame(struct sk_buff *skb, ...@@ -256,52 +197,29 @@ static netdev_tx_t ngbe_xmit_frame(struct sk_buff *skb,
return NETDEV_TX_OK; return NETDEV_TX_OK;
} }
/**
* ngbe_set_mac - Change the Ethernet Address of the NIC
* @netdev: network interface device structure
* @p: pointer to an address structure
*
* Returns 0 on success, negative on failure
**/
static int ngbe_set_mac(struct net_device *netdev, void *p)
{
struct ngbe_adapter *adapter = netdev_priv(netdev);
struct wx_hw *wxhw = &adapter->hw.wxhw;
struct sockaddr *addr = p;
if (!is_valid_ether_addr(addr->sa_data))
return -EADDRNOTAVAIL;
eth_hw_addr_set(netdev, addr->sa_data);
memcpy(wxhw->mac.addr, addr->sa_data, netdev->addr_len);
ngbe_mac_set_default_filter(adapter, wxhw->mac.addr);
return 0;
}
static void ngbe_dev_shutdown(struct pci_dev *pdev, bool *enable_wake) static void ngbe_dev_shutdown(struct pci_dev *pdev, bool *enable_wake)
{ {
struct ngbe_adapter *adapter = pci_get_drvdata(pdev); struct wx *wx = pci_get_drvdata(pdev);
struct net_device *netdev = adapter->netdev; struct net_device *netdev;
netdev = wx->netdev;
netif_device_detach(netdev); netif_device_detach(netdev);
rtnl_lock(); rtnl_lock();
if (netif_running(netdev)) if (netif_running(netdev))
ngbe_down(adapter); ngbe_down(wx);
rtnl_unlock(); rtnl_unlock();
wx_control_hw(&adapter->hw.wxhw, false); wx_control_hw(wx, false);
pci_disable_device(pdev); pci_disable_device(pdev);
} }
static void ngbe_shutdown(struct pci_dev *pdev) static void ngbe_shutdown(struct pci_dev *pdev)
{ {
struct ngbe_adapter *adapter = pci_get_drvdata(pdev); struct wx *wx = pci_get_drvdata(pdev);
bool wake; bool wake;
wake = !!adapter->wol; wake = !!wx->wol;
ngbe_dev_shutdown(pdev, &wake); ngbe_dev_shutdown(pdev, &wake);
...@@ -316,7 +234,7 @@ static const struct net_device_ops ngbe_netdev_ops = { ...@@ -316,7 +234,7 @@ static const struct net_device_ops ngbe_netdev_ops = {
.ndo_stop = ngbe_close, .ndo_stop = ngbe_close,
.ndo_start_xmit = ngbe_xmit_frame, .ndo_start_xmit = ngbe_xmit_frame,
.ndo_validate_addr = eth_validate_addr, .ndo_validate_addr = eth_validate_addr,
.ndo_set_mac_address = ngbe_set_mac, .ndo_set_mac_address = wx_set_mac,
}; };
/** /**
...@@ -326,18 +244,16 @@ static const struct net_device_ops ngbe_netdev_ops = { ...@@ -326,18 +244,16 @@ static const struct net_device_ops ngbe_netdev_ops = {
* *
* Returns 0 on success, negative on failure * Returns 0 on success, negative on failure
* *
* ngbe_probe initializes an adapter identified by a pci_dev structure. * ngbe_probe initializes an wx identified by a pci_dev structure.
* The OS initialization, configuring of the adapter private structure, * The OS initialization, configuring of the wx private structure,
* and a hardware reset occur. * and a hardware reset occur.
**/ **/
static int ngbe_probe(struct pci_dev *pdev, static int ngbe_probe(struct pci_dev *pdev,
const struct pci_device_id __always_unused *ent) const struct pci_device_id __always_unused *ent)
{ {
struct ngbe_adapter *adapter = NULL;
struct ngbe_hw *hw = NULL;
struct wx_hw *wxhw = NULL;
struct net_device *netdev; struct net_device *netdev;
u32 e2rom_cksum_cap = 0; u32 e2rom_cksum_cap = 0;
struct wx *wx = NULL;
static int func_nums; static int func_nums;
u16 e2rom_ver = 0; u16 e2rom_ver = 0;
u32 etrack_id = 0; u32 etrack_id = 0;
...@@ -368,7 +284,7 @@ static int ngbe_probe(struct pci_dev *pdev, ...@@ -368,7 +284,7 @@ static int ngbe_probe(struct pci_dev *pdev,
pci_set_master(pdev); pci_set_master(pdev);
netdev = devm_alloc_etherdev_mqs(&pdev->dev, netdev = devm_alloc_etherdev_mqs(&pdev->dev,
sizeof(struct ngbe_adapter), sizeof(struct wx),
NGBE_MAX_TX_QUEUES, NGBE_MAX_TX_QUEUES,
NGBE_MAX_RX_QUEUES); NGBE_MAX_RX_QUEUES);
if (!netdev) { if (!netdev) {
...@@ -378,17 +294,15 @@ static int ngbe_probe(struct pci_dev *pdev, ...@@ -378,17 +294,15 @@ static int ngbe_probe(struct pci_dev *pdev,
SET_NETDEV_DEV(netdev, &pdev->dev); SET_NETDEV_DEV(netdev, &pdev->dev);
adapter = netdev_priv(netdev); wx = netdev_priv(netdev);
adapter->netdev = netdev; wx->netdev = netdev;
adapter->pdev = pdev; wx->pdev = pdev;
hw = &adapter->hw; wx->msg_enable = BIT(3) - 1;
wxhw = &hw->wxhw;
adapter->msg_enable = BIT(3) - 1; wx->hw_addr = devm_ioremap(&pdev->dev,
pci_resource_start(pdev, 0),
adapter->io_addr = devm_ioremap(&pdev->dev, pci_resource_len(pdev, 0));
pci_resource_start(pdev, 0), if (!wx->hw_addr) {
pci_resource_len(pdev, 0));
if (!adapter->io_addr) {
err = -EIO; err = -EIO;
goto err_pci_release_regions; goto err_pci_release_regions;
} }
...@@ -397,44 +311,44 @@ static int ngbe_probe(struct pci_dev *pdev, ...@@ -397,44 +311,44 @@ static int ngbe_probe(struct pci_dev *pdev,
netdev->features |= NETIF_F_HIGHDMA; netdev->features |= NETIF_F_HIGHDMA;
adapter->bd_number = func_nums; wx->bd_number = func_nums;
/* setup the private structure */ /* setup the private structure */
err = ngbe_sw_init(adapter); err = ngbe_sw_init(wx);
if (err) if (err)
goto err_free_mac_table; goto err_free_mac_table;
/* check if flash load is done after hw power up */ /* check if flash load is done after hw power up */
err = wx_check_flash_load(wxhw, NGBE_SPI_ILDR_STATUS_PERST); err = wx_check_flash_load(wx, NGBE_SPI_ILDR_STATUS_PERST);
if (err) if (err)
goto err_free_mac_table; goto err_free_mac_table;
err = wx_check_flash_load(wxhw, NGBE_SPI_ILDR_STATUS_PWRRST); err = wx_check_flash_load(wx, NGBE_SPI_ILDR_STATUS_PWRRST);
if (err) if (err)
goto err_free_mac_table; goto err_free_mac_table;
err = wx_mng_present(wxhw); err = wx_mng_present(wx);
if (err) { if (err) {
dev_err(&pdev->dev, "Management capability is not present\n"); dev_err(&pdev->dev, "Management capability is not present\n");
goto err_free_mac_table; goto err_free_mac_table;
} }
err = ngbe_reset_hw(hw); err = ngbe_reset_hw(wx);
if (err) { if (err) {
dev_err(&pdev->dev, "HW Init failed: %d\n", err); dev_err(&pdev->dev, "HW Init failed: %d\n", err);
goto err_free_mac_table; goto err_free_mac_table;
} }
if (wxhw->bus.func == 0) { if (wx->bus.func == 0) {
wr32(wxhw, NGBE_CALSUM_CAP_STATUS, 0x0); wr32(wx, NGBE_CALSUM_CAP_STATUS, 0x0);
wr32(wxhw, NGBE_EEPROM_VERSION_STORE_REG, 0x0); wr32(wx, NGBE_EEPROM_VERSION_STORE_REG, 0x0);
} else { } else {
e2rom_cksum_cap = rd32(wxhw, NGBE_CALSUM_CAP_STATUS); e2rom_cksum_cap = rd32(wx, NGBE_CALSUM_CAP_STATUS);
saved_ver = rd32(wxhw, NGBE_EEPROM_VERSION_STORE_REG); saved_ver = rd32(wx, NGBE_EEPROM_VERSION_STORE_REG);
} }
wx_init_eeprom_params(wxhw); wx_init_eeprom_params(wx);
if (wxhw->bus.func == 0 || e2rom_cksum_cap == 0) { if (wx->bus.func == 0 || e2rom_cksum_cap == 0) {
/* make sure the EEPROM is ready */ /* make sure the EEPROM is ready */
err = ngbe_eeprom_chksum_hostif(hw); err = ngbe_eeprom_chksum_hostif(wx);
if (err) { if (err) {
dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n"); dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
err = -EIO; err = -EIO;
...@@ -442,14 +356,14 @@ static int ngbe_probe(struct pci_dev *pdev, ...@@ -442,14 +356,14 @@ static int ngbe_probe(struct pci_dev *pdev,
} }
} }
adapter->wol = 0; wx->wol = 0;
if (hw->wol_enabled) if (wx->wol_enabled)
adapter->wol = NGBE_PSR_WKUP_CTL_MAG; wx->wol = NGBE_PSR_WKUP_CTL_MAG;
hw->wol_enabled = !!(adapter->wol); wx->wol_enabled = !!(wx->wol);
wr32(wxhw, NGBE_PSR_WKUP_CTL, adapter->wol); wr32(wx, NGBE_PSR_WKUP_CTL, wx->wol);
device_set_wakeup_enable(&pdev->dev, adapter->wol); device_set_wakeup_enable(&pdev->dev, wx->wol);
/* Save off EEPROM version number and Option Rom version which /* Save off EEPROM version number and Option Rom version which
* together make a unique identify for the eeprom * together make a unique identify for the eeprom
...@@ -457,37 +371,37 @@ static int ngbe_probe(struct pci_dev *pdev, ...@@ -457,37 +371,37 @@ static int ngbe_probe(struct pci_dev *pdev,
if (saved_ver) { if (saved_ver) {
etrack_id = saved_ver; etrack_id = saved_ver;
} else { } else {
wx_read_ee_hostif(wxhw, wx_read_ee_hostif(wx,
wxhw->eeprom.sw_region_offset + NGBE_EEPROM_VERSION_H, wx->eeprom.sw_region_offset + NGBE_EEPROM_VERSION_H,
&e2rom_ver); &e2rom_ver);
etrack_id = e2rom_ver << 16; etrack_id = e2rom_ver << 16;
wx_read_ee_hostif(wxhw, wx_read_ee_hostif(wx,
wxhw->eeprom.sw_region_offset + NGBE_EEPROM_VERSION_L, wx->eeprom.sw_region_offset + NGBE_EEPROM_VERSION_L,
&e2rom_ver); &e2rom_ver);
etrack_id |= e2rom_ver; etrack_id |= e2rom_ver;
wr32(wxhw, NGBE_EEPROM_VERSION_STORE_REG, etrack_id); wr32(wx, NGBE_EEPROM_VERSION_STORE_REG, etrack_id);
} }
eth_hw_addr_set(netdev, wxhw->mac.perm_addr); eth_hw_addr_set(netdev, wx->mac.perm_addr);
ngbe_mac_set_default_filter(adapter, wxhw->mac.perm_addr); wx_mac_set_default_filter(wx, wx->mac.perm_addr);
err = register_netdev(netdev); err = register_netdev(netdev);
if (err) if (err)
goto err_register; goto err_register;
pci_set_drvdata(pdev, adapter); pci_set_drvdata(pdev, wx);
netif_info(adapter, probe, netdev, netif_info(wx, probe, netdev,
"PHY: %s, PBA No: Wang Xun GbE Family Controller\n", "PHY: %s, PBA No: Wang Xun GbE Family Controller\n",
hw->phy.type == ngbe_phy_internal ? "Internal" : "External"); wx->mac_type == em_mac_type_mdi ? "Internal" : "External");
netif_info(adapter, probe, netdev, "%pM\n", netdev->dev_addr); netif_info(wx, probe, netdev, "%pM\n", netdev->dev_addr);
return 0; return 0;
err_register: err_register:
wx_control_hw(wxhw, false); wx_control_hw(wx, false);
err_free_mac_table: err_free_mac_table:
kfree(adapter->mac_table); kfree(wx->mac_table);
err_pci_release_regions: err_pci_release_regions:
pci_disable_pcie_error_reporting(pdev); pci_disable_pcie_error_reporting(pdev);
pci_release_selected_regions(pdev, pci_release_selected_regions(pdev,
...@@ -508,15 +422,15 @@ static int ngbe_probe(struct pci_dev *pdev, ...@@ -508,15 +422,15 @@ static int ngbe_probe(struct pci_dev *pdev,
**/ **/
static void ngbe_remove(struct pci_dev *pdev) static void ngbe_remove(struct pci_dev *pdev)
{ {
struct ngbe_adapter *adapter = pci_get_drvdata(pdev); struct wx *wx = pci_get_drvdata(pdev);
struct net_device *netdev; struct net_device *netdev;
netdev = adapter->netdev; netdev = wx->netdev;
unregister_netdev(netdev); unregister_netdev(netdev);
pci_release_selected_regions(pdev, pci_release_selected_regions(pdev,
pci_select_bars(pdev, IORESOURCE_MEM)); pci_select_bars(pdev, IORESOURCE_MEM));
kfree(adapter->mac_table); kfree(wx->mac_table);
pci_disable_pcie_error_reporting(pdev); pci_disable_pcie_error_reporting(pdev);
pci_disable_device(pdev); pci_disable_device(pdev);
......
drivers/net/ethernet/wangxun/ngbe/ngbe_type.h
View file @ f23395b4
...@@ -90,50 +90,26 @@ ...@@ -90,50 +90,26 @@
#define NGBE_FW_CMD_ST_PASS 0x80658383 #define NGBE_FW_CMD_ST_PASS 0x80658383
#define NGBE_FW_CMD_ST_FAIL 0x70657376 #define NGBE_FW_CMD_ST_FAIL 0x70657376
enum ngbe_phy_type { #define NGBE_MAX_FDIR_INDICES 7
ngbe_phy_unknown = 0,
ngbe_phy_none, #define NGBE_MAX_RX_QUEUES (NGBE_MAX_FDIR_INDICES + 1)
ngbe_phy_internal, #define NGBE_MAX_TX_QUEUES (NGBE_MAX_FDIR_INDICES + 1)
ngbe_phy_m88e1512,
ngbe_phy_m88e1512_sfi, #define NGBE_ETH_LENGTH_OF_ADDRESS 6
ngbe_phy_m88e1512_unknown, #define NGBE_MAX_MSIX_VECTORS 0x09
ngbe_phy_yt8521s, #define NGBE_RAR_ENTRIES 32
ngbe_phy_yt8521s_sfi,
ngbe_phy_internal_yt8521s_sfi, /* TX/RX descriptor defines */
ngbe_phy_generic #define NGBE_DEFAULT_TXD 512 /* default ring size */
}; #define NGBE_DEFAULT_TX_WORK 256
#define NGBE_MAX_TXD 8192
enum ngbe_media_type { #define NGBE_MIN_TXD 128
ngbe_media_type_unknown = 0,
ngbe_media_type_fiber, #define NGBE_DEFAULT_RXD 512 /* default ring size */
ngbe_media_type_copper, #define NGBE_DEFAULT_RX_WORK 256
ngbe_media_type_backplane, #define NGBE_MAX_RXD 8192
}; #define NGBE_MIN_RXD 128
enum ngbe_mac_type { extern char ngbe_driver_name[];
ngbe_mac_type_unknown = 0,
ngbe_mac_type_mdi,
ngbe_mac_type_rgmii
};
struct ngbe_phy_info {
enum ngbe_phy_type type;
enum ngbe_media_type media_type;
u32 addr;
u32 id;
bool reset_if_overtemp;
};
struct ngbe_hw {
struct wx_hw wxhw;
struct ngbe_phy_info phy;
enum ngbe_mac_type mac_type;
bool wol_enabled;
bool ncsi_enabled;
bool gpio_ctrl;
};
#endif /* _NGBE_TYPE_H_ */ #endif /* _NGBE_TYPE_H_ */
drivers/net/ethernet/wangxun/txgbe/txgbe.h deleted 100644 → 0
View file @ 7abd92a5
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */
#ifndef _TXGBE_H_
#define _TXGBE_H_
#define TXGBE_MAX_FDIR_INDICES 63
#define TXGBE_MAX_RX_QUEUES (TXGBE_MAX_FDIR_INDICES + 1)
#define TXGBE_MAX_TX_QUEUES (TXGBE_MAX_FDIR_INDICES + 1)
#define TXGBE_SP_MAX_TX_QUEUES 128
#define TXGBE_SP_MAX_RX_QUEUES 128
#define TXGBE_SP_RAR_ENTRIES 128
#define TXGBE_SP_MC_TBL_SIZE 128
struct txgbe_mac_addr {
u8 addr[ETH_ALEN];
u16 state; /* bitmask */
u64 pools;
};
#define TXGBE_MAC_STATE_DEFAULT 0x1
#define TXGBE_MAC_STATE_MODIFIED 0x2
#define TXGBE_MAC_STATE_IN_USE 0x4
/* board specific private data structure */
struct txgbe_adapter {
u8 __iomem *io_addr; /* Mainly for iounmap use */
/* OS defined structs */
struct net_device *netdev;
struct pci_dev *pdev;
/* structs defined in txgbe_type.h */
struct txgbe_hw hw;
u16 msg_enable;
struct txgbe_mac_addr *mac_table;
char eeprom_id[32];
};
extern char txgbe_driver_name[];
#endif /* _TXGBE_H_ */
drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c
View file @ f23395b4
...@@ -12,70 +12,67 @@ ...@@ -12,70 +12,67 @@
#include "../libwx/wx_hw.h" #include "../libwx/wx_hw.h"
#include "txgbe_type.h" #include "txgbe_type.h"
#include "txgbe_hw.h" #include "txgbe_hw.h"
#include "txgbe.h"
/** /**
* txgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds * txgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
* @hw: pointer to hardware structure * @wx: pointer to hardware structure
* *
* Inits the thermal sensor thresholds according to the NVM map * Inits the thermal sensor thresholds according to the NVM map
* and save off the threshold and location values into mac.thermal_sensor_data * and save off the threshold and location values into mac.thermal_sensor_data
**/ **/
static void txgbe_init_thermal_sensor_thresh(struct txgbe_hw *hw) static void txgbe_init_thermal_sensor_thresh(struct wx *wx)
{ {
struct wx_hw *wxhw = &hw->wxhw; struct wx_thermal_sensor_data *data = &wx->mac.sensor;
struct wx_thermal_sensor_data *data = &wxhw->mac.sensor;
memset(data, 0, sizeof(struct wx_thermal_sensor_data)); memset(data, 0, sizeof(struct wx_thermal_sensor_data));
/* Only support thermal sensors attached to SP physical port 0 */ /* Only support thermal sensors attached to SP physical port 0 */
if (wxhw->bus.func) if (wx->bus.func)
return; return;
wr32(wxhw, TXGBE_TS_CTL, TXGBE_TS_CTL_EVAL_MD); wr32(wx, TXGBE_TS_CTL, TXGBE_TS_CTL_EVAL_MD);
wr32(wxhw, WX_TS_INT_EN, wr32(wx, WX_TS_INT_EN,
WX_TS_INT_EN_ALARM_INT_EN | WX_TS_INT_EN_DALARM_INT_EN); WX_TS_INT_EN_ALARM_INT_EN | WX_TS_INT_EN_DALARM_INT_EN);
wr32(wxhw, WX_TS_EN, WX_TS_EN_ENA); wr32(wx, WX_TS_EN, WX_TS_EN_ENA);
data->alarm_thresh = 100; data->alarm_thresh = 100;
wr32(wxhw, WX_TS_ALARM_THRE, 677); wr32(wx, WX_TS_ALARM_THRE, 677);
data->dalarm_thresh = 90; data->dalarm_thresh = 90;
wr32(wxhw, WX_TS_DALARM_THRE, 614); wr32(wx, WX_TS_DALARM_THRE, 614);
} }
/** /**
* txgbe_read_pba_string - Reads part number string from EEPROM * txgbe_read_pba_string - Reads part number string from EEPROM
* @hw: pointer to hardware structure * @wx: pointer to hardware structure
* @pba_num: stores the part number string from the EEPROM * @pba_num: stores the part number string from the EEPROM
* @pba_num_size: part number string buffer length * @pba_num_size: part number string buffer length
* *
* Reads the part number string from the EEPROM. * Reads the part number string from the EEPROM.
**/ **/
int txgbe_read_pba_string(struct txgbe_hw *hw, u8 *pba_num, u32 pba_num_size) int txgbe_read_pba_string(struct wx *wx, u8 *pba_num, u32 pba_num_size)
{ {
u16 pba_ptr, offset, length, data; u16 pba_ptr, offset, length, data;
struct wx_hw *wxhw = &hw->wxhw;
int ret_val; int ret_val;
if (!pba_num) { if (!pba_num) {
wx_err(wxhw, "PBA string buffer was null\n"); wx_err(wx, "PBA string buffer was null\n");
return -EINVAL; return -EINVAL;
} }
ret_val = wx_read_ee_hostif(wxhw, ret_val = wx_read_ee_hostif(wx,
wxhw->eeprom.sw_region_offset + TXGBE_PBANUM0_PTR, wx->eeprom.sw_region_offset + TXGBE_PBANUM0_PTR,
&data); &data);
if (ret_val != 0) { if (ret_val != 0) {
wx_err(wxhw, "NVM Read Error\n"); wx_err(wx, "NVM Read Error\n");
return ret_val; return ret_val;
} }
ret_val = wx_read_ee_hostif(wxhw, ret_val = wx_read_ee_hostif(wx,
wxhw->eeprom.sw_region_offset + TXGBE_PBANUM1_PTR, wx->eeprom.sw_region_offset + TXGBE_PBANUM1_PTR,
&pba_ptr); &pba_ptr);
if (ret_val != 0) { if (ret_val != 0) {
wx_err(wxhw, "NVM Read Error\n"); wx_err(wx, "NVM Read Error\n");
return ret_val; return ret_val;
} }
...@@ -84,11 +81,11 @@ int txgbe_read_pba_string(struct txgbe_hw *hw, u8 *pba_num, u32 pba_num_size) ...@@ -84,11 +81,11 @@ int txgbe_read_pba_string(struct txgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
* and we can decode it into an ascii string * and we can decode it into an ascii string
*/ */
if (data != TXGBE_PBANUM_PTR_GUARD) { if (data != TXGBE_PBANUM_PTR_GUARD) {
wx_err(wxhw, "NVM PBA number is not stored as string\n"); wx_err(wx, "NVM PBA number is not stored as string\n");
/* we will need 11 characters to store the PBA */ /* we will need 11 characters to store the PBA */
if (pba_num_size < 11) { if (pba_num_size < 11) {
wx_err(wxhw, "PBA string buffer too small\n"); wx_err(wx, "PBA string buffer too small\n");
return -ENOMEM; return -ENOMEM;
} }
...@@ -118,20 +115,20 @@ int txgbe_read_pba_string(struct txgbe_hw *hw, u8 *pba_num, u32 pba_num_size) ...@@ -118,20 +115,20 @@ int txgbe_read_pba_string(struct txgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
return 0; return 0;
} }
ret_val = wx_read_ee_hostif(wxhw, pba_ptr, &length); ret_val = wx_read_ee_hostif(wx, pba_ptr, &length);
if (ret_val != 0) { if (ret_val != 0) {
wx_err(wxhw, "NVM Read Error\n"); wx_err(wx, "NVM Read Error\n");
return ret_val; return ret_val;
} }
if (length == 0xFFFF || length == 0) { if (length == 0xFFFF || length == 0) {
wx_err(wxhw, "NVM PBA number section invalid length\n"); wx_err(wx, "NVM PBA number section invalid length\n");
return -EINVAL; return -EINVAL;
} }
/* check if pba_num buffer is big enough */ /* check if pba_num buffer is big enough */
if (pba_num_size < (((u32)length * 2) - 1)) { if (pba_num_size < (((u32)length * 2) - 1)) {
wx_err(wxhw, "PBA string buffer too small\n"); wx_err(wx, "PBA string buffer too small\n");
return -ENOMEM; return -ENOMEM;
} }
...@@ -140,9 +137,9 @@ int txgbe_read_pba_string(struct txgbe_hw *hw, u8 *pba_num, u32 pba_num_size) ...@@ -140,9 +137,9 @@ int txgbe_read_pba_string(struct txgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
length--; length--;
for (offset = 0; offset < length; offset++) { for (offset = 0; offset < length; offset++) {
ret_val = wx_read_ee_hostif(wxhw, pba_ptr + offset, &data); ret_val = wx_read_ee_hostif(wx, pba_ptr + offset, &data);
if (ret_val != 0) { if (ret_val != 0) {
wx_err(wxhw, "NVM Read Error\n"); wx_err(wx, "NVM Read Error\n");
return ret_val; return ret_val;
} }
pba_num[offset * 2] = (u8)(data >> 8); pba_num[offset * 2] = (u8)(data >> 8);
...@@ -155,14 +152,13 @@ int txgbe_read_pba_string(struct txgbe_hw *hw, u8 *pba_num, u32 pba_num_size) ...@@ -155,14 +152,13 @@ int txgbe_read_pba_string(struct txgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
/** /**
* txgbe_calc_eeprom_checksum - Calculates and returns the checksum * txgbe_calc_eeprom_checksum - Calculates and returns the checksum
* @hw: pointer to hardware structure * @wx: pointer to hardware structure
* @checksum: pointer to cheksum * @checksum: pointer to cheksum
* *
* Returns a negative error code on error * Returns a negative error code on error
**/ **/
static int txgbe_calc_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum) static int txgbe_calc_eeprom_checksum(struct wx *wx, u16 *checksum)
{ {
struct wx_hw *wxhw = &hw->wxhw;
u16 *eeprom_ptrs = NULL; u16 *eeprom_ptrs = NULL;
u32 buffer_size = 0; u32 buffer_size = 0;
u16 *buffer = NULL; u16 *buffer = NULL;
...@@ -170,7 +166,7 @@ static int txgbe_calc_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum) ...@@ -170,7 +166,7 @@ static int txgbe_calc_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum)
int status; int status;
u16 i; u16 i;
wx_init_eeprom_params(wxhw); wx_init_eeprom_params(wx);
if (!buffer) { if (!buffer) {
eeprom_ptrs = kvmalloc_array(TXGBE_EEPROM_LAST_WORD, sizeof(u16), eeprom_ptrs = kvmalloc_array(TXGBE_EEPROM_LAST_WORD, sizeof(u16),
...@@ -178,11 +174,11 @@ static int txgbe_calc_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum) ...@@ -178,11 +174,11 @@ static int txgbe_calc_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum)
if (!eeprom_ptrs) if (!eeprom_ptrs)
return -ENOMEM; return -ENOMEM;
/* Read pointer area */ /* Read pointer area */
status = wx_read_ee_hostif_buffer(wxhw, 0, status = wx_read_ee_hostif_buffer(wx, 0,
TXGBE_EEPROM_LAST_WORD, TXGBE_EEPROM_LAST_WORD,
eeprom_ptrs); eeprom_ptrs);
if (status != 0) { if (status != 0) {
wx_err(wxhw, "Failed to read EEPROM image\n"); wx_err(wx, "Failed to read EEPROM image\n");
kvfree(eeprom_ptrs); kvfree(eeprom_ptrs);
return status; return status;
} }
...@@ -194,7 +190,7 @@ static int txgbe_calc_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum) ...@@ -194,7 +190,7 @@ static int txgbe_calc_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum)
} }
for (i = 0; i < TXGBE_EEPROM_LAST_WORD; i++) for (i = 0; i < TXGBE_EEPROM_LAST_WORD; i++)
if (i != wxhw->eeprom.sw_region_offset + TXGBE_EEPROM_CHECKSUM) if (i != wx->eeprom.sw_region_offset + TXGBE_EEPROM_CHECKSUM)
*checksum += local_buffer[i]; *checksum += local_buffer[i];
if (eeprom_ptrs) if (eeprom_ptrs)
...@@ -210,15 +206,14 @@ static int txgbe_calc_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum) ...@@ -210,15 +206,14 @@ static int txgbe_calc_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum)
/** /**
* txgbe_validate_eeprom_checksum - Validate EEPROM checksum * txgbe_validate_eeprom_checksum - Validate EEPROM checksum
* @hw: pointer to hardware structure * @wx: pointer to hardware structure
* @checksum_val: calculated checksum * @checksum_val: calculated checksum
* *
* Performs checksum calculation and validates the EEPROM checksum. If the * Performs checksum calculation and validates the EEPROM checksum. If the
* caller does not need checksum_val, the value can be NULL. * caller does not need checksum_val, the value can be NULL.
**/ **/
int txgbe_validate_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum_val) int txgbe_validate_eeprom_checksum(struct wx *wx, u16 *checksum_val)
{ {
struct wx_hw *wxhw = &hw->wxhw;
u16 read_checksum = 0; u16 read_checksum = 0;
u16 checksum; u16 checksum;
int status; int status;
...@@ -227,18 +222,18 @@ int txgbe_validate_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum_val) ...@@ -227,18 +222,18 @@ int txgbe_validate_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum_val)
* not continue or we could be in for a very long wait while every * not continue or we could be in for a very long wait while every
* EEPROM read fails * EEPROM read fails
*/ */
status = wx_read_ee_hostif(wxhw, 0, &checksum); status = wx_read_ee_hostif(wx, 0, &checksum);
if (status) { if (status) {
wx_err(wxhw, "EEPROM read failed\n"); wx_err(wx, "EEPROM read failed\n");
return status; return status;
} }
checksum = 0; checksum = 0;
status = txgbe_calc_eeprom_checksum(hw, &checksum); status = txgbe_calc_eeprom_checksum(wx, &checksum);
if (status != 0) if (status != 0)
return status; return status;
status = wx_read_ee_hostif(wxhw, wxhw->eeprom.sw_region_offset + status = wx_read_ee_hostif(wx, wx->eeprom.sw_region_offset +
TXGBE_EEPROM_CHECKSUM, &read_checksum); TXGBE_EEPROM_CHECKSUM, &read_checksum);
if (status != 0) if (status != 0)
return status; return status;
...@@ -248,7 +243,7 @@ int txgbe_validate_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum_val) ...@@ -248,7 +243,7 @@ int txgbe_validate_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum_val)
*/ */
if (read_checksum != checksum) { if (read_checksum != checksum) {
status = -EIO; status = -EIO;
wx_err(wxhw, "Invalid EEPROM checksum\n"); wx_err(wx, "Invalid EEPROM checksum\n");
} }
/* If the user cares, return the calculated checksum */ /* If the user cares, return the calculated checksum */
...@@ -258,55 +253,52 @@ int txgbe_validate_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum_val) ...@@ -258,55 +253,52 @@ int txgbe_validate_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum_val)
return status; return status;
} }
static void txgbe_reset_misc(struct txgbe_hw *hw) static void txgbe_reset_misc(struct wx *wx)
{ {
struct wx_hw *wxhw = &hw->wxhw; wx_reset_misc(wx);
txgbe_init_thermal_sensor_thresh(wx);
wx_reset_misc(wxhw);
txgbe_init_thermal_sensor_thresh(hw);
} }
/** /**
* txgbe_reset_hw - Perform hardware reset * txgbe_reset_hw - Perform hardware reset
* @hw: pointer to hardware structure * @wx: pointer to wx structure
* *
* Resets the hardware by resetting the transmit and receive units, masks * Resets the hardware by resetting the transmit and receive units, masks
* and clears all interrupts, perform a PHY reset, and perform a link (MAC) * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
* reset. * reset.
**/ **/
int txgbe_reset_hw(struct txgbe_hw *hw) int txgbe_reset_hw(struct wx *wx)
{ {
struct wx_hw *wxhw = &hw->wxhw;
int status; int status;
/* Call adapter stop to disable tx/rx and clear interrupts */ /* Call adapter stop to disable tx/rx and clear interrupts */
status = wx_stop_adapter(wxhw); status = wx_stop_adapter(wx);
if (status != 0) if (status != 0)
return status; return status;
if (!(((wxhw->subsystem_device_id & WX_NCSI_MASK) == WX_NCSI_SUP) || if (!(((wx->subsystem_device_id & WX_NCSI_MASK) == WX_NCSI_SUP) ||
((wxhw->subsystem_device_id & WX_WOL_MASK) == WX_WOL_SUP))) ((wx->subsystem_device_id & WX_WOL_MASK) == WX_WOL_SUP)))
wx_reset_hostif(wxhw); wx_reset_hostif(wx);
usleep_range(10, 100); usleep_range(10, 100);
status = wx_check_flash_load(wxhw, TXGBE_SPI_ILDR_STATUS_LAN_SW_RST(wxhw->bus.func)); status = wx_check_flash_load(wx, TXGBE_SPI_ILDR_STATUS_LAN_SW_RST(wx->bus.func));
if (status != 0) if (status != 0)
return status; return status;
txgbe_reset_misc(hw); txgbe_reset_misc(wx);
/* Store the permanent mac address */ /* Store the permanent mac address */
wx_get_mac_addr(wxhw, wxhw->mac.perm_addr); wx_get_mac_addr(wx, wx->mac.perm_addr);
/* Store MAC address from RAR0, clear receive address registers, and /* Store MAC address from RAR0, clear receive address registers, and
* clear the multicast table. Also reset num_rar_entries to 128, * clear the multicast table. Also reset num_rar_entries to 128,
* since we modify this value when programming the SAN MAC address. * since we modify this value when programming the SAN MAC address.
*/ */
wxhw->mac.num_rar_entries = TXGBE_SP_RAR_ENTRIES; wx->mac.num_rar_entries = TXGBE_SP_RAR_ENTRIES;
wx_init_rx_addrs(wxhw); wx_init_rx_addrs(wx);
pci_set_master(wxhw->pdev); pci_set_master(wx->pdev);
return 0; return 0;
} }
drivers/net/ethernet/wangxun/txgbe/txgbe_hw.h
View file @ f23395b4
...@@ -4,8 +4,8 @@ ...@@ -4,8 +4,8 @@
#ifndef _TXGBE_HW_H_ #ifndef _TXGBE_HW_H_
#define _TXGBE_HW_H_ #define _TXGBE_HW_H_
int txgbe_read_pba_string(struct txgbe_hw *hw, u8 *pba_num, u32 pba_num_size); int txgbe_read_pba_string(struct wx *wx, u8 *pba_num, u32 pba_num_size);
int txgbe_validate_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum_val); int txgbe_validate_eeprom_checksum(struct wx *wx, u16 *checksum_val);
int txgbe_reset_hw(struct txgbe_hw *hw); int txgbe_reset_hw(struct wx *wx);
#endif /* _TXGBE_HW_H_ */ #endif /* _TXGBE_HW_H_ */
drivers/net/ethernet/wangxun/txgbe/txgbe_main.c
View file @ f23395b4
...@@ -14,7 +14,6 @@ ...@@ -14,7 +14,6 @@
#include "../libwx/wx_hw.h" #include "../libwx/wx_hw.h"
#include "txgbe_type.h" #include "txgbe_type.h"
#include "txgbe_hw.h" #include "txgbe_hw.h"
#include "txgbe.h"
char txgbe_driver_name[] = "txgbe"; char txgbe_driver_name[] = "txgbe";
...@@ -35,26 +34,26 @@ static const struct pci_device_id txgbe_pci_tbl[] = { ...@@ -35,26 +34,26 @@ static const struct pci_device_id txgbe_pci_tbl[] = {
#define DEFAULT_DEBUG_LEVEL_SHIFT 3 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
static void txgbe_check_minimum_link(struct txgbe_adapter *adapter) static void txgbe_check_minimum_link(struct wx *wx)
{ {
struct pci_dev *pdev; struct pci_dev *pdev;
pdev = adapter->pdev; pdev = wx->pdev;
pcie_print_link_status(pdev); pcie_print_link_status(pdev);
} }
/** /**
* txgbe_enumerate_functions - Get the number of ports this device has * txgbe_enumerate_functions - Get the number of ports this device has
* @adapter: adapter structure * @wx: wx structure
* *
* This function enumerates the phsyical functions co-located on a single slot, * This function enumerates the phsyical functions co-located on a single slot,
* in order to determine how many ports a device has. This is most useful in * in order to determine how many ports a device has. This is most useful in
* determining the required GT/s of PCIe bandwidth necessary for optimal * determining the required GT/s of PCIe bandwidth necessary for optimal
* performance. * performance.
**/ **/
static int txgbe_enumerate_functions(struct txgbe_adapter *adapter) static int txgbe_enumerate_functions(struct wx *wx)
{ {
struct pci_dev *entry, *pdev = adapter->pdev; struct pci_dev *entry, *pdev = wx->pdev;
int physfns = 0; int physfns = 0;
list_for_each_entry(entry, &pdev->bus->devices, bus_list) { list_for_each_entry(entry, &pdev->bus->devices, bus_list) {
...@@ -73,197 +72,90 @@ static int txgbe_enumerate_functions(struct txgbe_adapter *adapter) ...@@ -73,197 +72,90 @@ static int txgbe_enumerate_functions(struct txgbe_adapter *adapter)
return physfns; return physfns;
} }
static void txgbe_sync_mac_table(struct txgbe_adapter *adapter) static void txgbe_up_complete(struct wx *wx)
{ {
struct txgbe_hw *hw = &adapter->hw; wx_control_hw(wx, true);
struct wx_hw *wxhw = &hw->wxhw;
int i;
for (i = 0; i < wxhw->mac.num_rar_entries; i++) {
if (adapter->mac_table[i].state & TXGBE_MAC_STATE_MODIFIED) {
if (adapter->mac_table[i].state & TXGBE_MAC_STATE_IN_USE) {
wx_set_rar(wxhw, i,
adapter->mac_table[i].addr,
adapter->mac_table[i].pools,
WX_PSR_MAC_SWC_AD_H_AV);
} else {
wx_clear_rar(wxhw, i);
}
adapter->mac_table[i].state &= ~(TXGBE_MAC_STATE_MODIFIED);
}
}
}
/* this function destroys the first RAR entry */
static void txgbe_mac_set_default_filter(struct txgbe_adapter *adapter,
u8 *addr)
{
struct wx_hw *wxhw = &adapter->hw.wxhw;
memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
adapter->mac_table[0].pools = 1ULL;
adapter->mac_table[0].state = (TXGBE_MAC_STATE_DEFAULT |
TXGBE_MAC_STATE_IN_USE);
wx_set_rar(wxhw, 0, adapter->mac_table[0].addr,
adapter->mac_table[0].pools,
WX_PSR_MAC_SWC_AD_H_AV);
}
static void txgbe_flush_sw_mac_table(struct txgbe_adapter *adapter)
{
struct wx_hw *wxhw = &adapter->hw.wxhw;
u32 i;
for (i = 0; i < wxhw->mac.num_rar_entries; i++) {
adapter->mac_table[i].state |= TXGBE_MAC_STATE_MODIFIED;
adapter->mac_table[i].state &= ~TXGBE_MAC_STATE_IN_USE;
memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
adapter->mac_table[i].pools = 0;
}
txgbe_sync_mac_table(adapter);
}
static int txgbe_del_mac_filter(struct txgbe_adapter *adapter, u8 *addr, u16 pool)
{
struct wx_hw *wxhw = &adapter->hw.wxhw;
u32 i;
if (is_zero_ether_addr(addr))
return -EINVAL;
/* search table for addr, if found, set to 0 and sync */
for (i = 0; i < wxhw->mac.num_rar_entries; i++) {
if (ether_addr_equal(addr, adapter->mac_table[i].addr)) {
if (adapter->mac_table[i].pools & (1ULL << pool)) {
adapter->mac_table[i].state |= TXGBE_MAC_STATE_MODIFIED;
adapter->mac_table[i].state &= ~TXGBE_MAC_STATE_IN_USE;
adapter->mac_table[i].pools &= ~(1ULL << pool);
txgbe_sync_mac_table(adapter);
}
return 0;
}
if (adapter->mac_table[i].pools != (1 << pool))
continue;
if (!ether_addr_equal(addr, adapter->mac_table[i].addr))
continue;
adapter->mac_table[i].state |= TXGBE_MAC_STATE_MODIFIED;
adapter->mac_table[i].state &= ~TXGBE_MAC_STATE_IN_USE;
memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
adapter->mac_table[i].pools = 0;
txgbe_sync_mac_table(adapter);
return 0;
}
return -ENOMEM;
}
static void txgbe_up_complete(struct txgbe_adapter *adapter)
{
struct txgbe_hw *hw = &adapter->hw;
struct wx_hw *wxhw = &hw->wxhw;
wx_control_hw(wxhw, true);
} }
static void txgbe_reset(struct txgbe_adapter *adapter) static void txgbe_reset(struct wx *wx)
{ {
struct net_device *netdev = adapter->netdev; struct net_device *netdev = wx->netdev;
struct txgbe_hw *hw = &adapter->hw;
u8 old_addr[ETH_ALEN]; u8 old_addr[ETH_ALEN];
int err; int err;
err = txgbe_reset_hw(hw); err = txgbe_reset_hw(wx);
if (err != 0) if (err != 0)
dev_err(&adapter->pdev->dev, "Hardware Error: %d\n", err); wx_err(wx, "Hardware Error: %d\n", err);
/* do not flush user set addresses */ /* do not flush user set addresses */
memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len); memcpy(old_addr, &wx->mac_table[0].addr, netdev->addr_len);
txgbe_flush_sw_mac_table(adapter); wx_flush_sw_mac_table(wx);
txgbe_mac_set_default_filter(adapter, old_addr); wx_mac_set_default_filter(wx, old_addr);
} }
static void txgbe_disable_device(struct txgbe_adapter *adapter) static void txgbe_disable_device(struct wx *wx)
{ {
struct net_device *netdev = adapter->netdev; struct net_device *netdev = wx->netdev;
struct wx_hw *wxhw = &adapter->hw.wxhw;
wx_disable_pcie_master(wxhw); wx_disable_pcie_master(wx);
/* disable receives */ /* disable receives */
wx_disable_rx(wxhw); wx_disable_rx(wx);
netif_carrier_off(netdev); netif_carrier_off(netdev);
netif_tx_disable(netdev); netif_tx_disable(netdev);
if (wxhw->bus.func < 2) if (wx->bus.func < 2)
wr32m(wxhw, TXGBE_MIS_PRB_CTL, TXGBE_MIS_PRB_CTL_LAN_UP(wxhw->bus.func), 0); wr32m(wx, TXGBE_MIS_PRB_CTL, TXGBE_MIS_PRB_CTL_LAN_UP(wx->bus.func), 0);
else else
dev_err(&adapter->pdev->dev, wx_err(wx, "%s: invalid bus lan id %d\n",
"%s: invalid bus lan id %d\n", __func__, wx->bus.func);
__func__, wxhw->bus.func);
if (!(((wxhw->subsystem_device_id & WX_NCSI_MASK) == WX_NCSI_SUP) || if (!(((wx->subsystem_device_id & WX_NCSI_MASK) == WX_NCSI_SUP) ||
((wxhw->subsystem_device_id & WX_WOL_MASK) == WX_WOL_SUP))) { ((wx->subsystem_device_id & WX_WOL_MASK) == WX_WOL_SUP))) {
/* disable mac transmiter */ /* disable mac transmiter */
wr32m(wxhw, WX_MAC_TX_CFG, WX_MAC_TX_CFG_TE, 0); wr32m(wx, WX_MAC_TX_CFG, WX_MAC_TX_CFG_TE, 0);
} }
/* Disable the Tx DMA engine */ /* Disable the Tx DMA engine */
wr32m(wxhw, WX_TDM_CTL, WX_TDM_CTL_TE, 0); wr32m(wx, WX_TDM_CTL, WX_TDM_CTL_TE, 0);
} }
static void txgbe_down(struct txgbe_adapter *adapter) static void txgbe_down(struct wx *wx)
{ {
txgbe_disable_device(adapter); txgbe_disable_device(wx);
txgbe_reset(adapter); txgbe_reset(wx);
} }
/** /**
* txgbe_sw_init - Initialize general software structures (struct txgbe_adapter) * txgbe_sw_init - Initialize general software structures (struct wx)
* @adapter: board private structure to initialize * @wx: board private structure to initialize
**/ **/
static int txgbe_sw_init(struct txgbe_adapter *adapter) static int txgbe_sw_init(struct wx *wx)
{ {
struct pci_dev *pdev = adapter->pdev;
struct txgbe_hw *hw = &adapter->hw;
struct wx_hw *wxhw = &hw->wxhw;
int err; int err;
wxhw->hw_addr = adapter->io_addr; wx->mac.num_rar_entries = TXGBE_SP_RAR_ENTRIES;
wxhw->pdev = pdev; wx->mac.max_tx_queues = TXGBE_SP_MAX_TX_QUEUES;
wx->mac.max_rx_queues = TXGBE_SP_MAX_RX_QUEUES;
wx->mac.mcft_size = TXGBE_SP_MC_TBL_SIZE;
/* PCI config space info */ /* PCI config space info */
err = wx_sw_init(wxhw); err = wx_sw_init(wx);
if (err < 0) { if (err < 0) {
netif_err(adapter, probe, adapter->netdev, wx_err(wx, "read of internal subsystem device id failed\n");
"read of internal subsystem device id failed\n");
return err; return err;
} }
switch (wxhw->device_id) { switch (wx->device_id) {
case TXGBE_DEV_ID_SP1000: case TXGBE_DEV_ID_SP1000:
case TXGBE_DEV_ID_WX1820: case TXGBE_DEV_ID_WX1820:
wxhw->mac.type = wx_mac_sp; wx->mac.type = wx_mac_sp;
break; break;
default: default:
wxhw->mac.type = wx_mac_unknown; wx->mac.type = wx_mac_unknown;
break; break;
} }
wxhw->mac.num_rar_entries = TXGBE_SP_RAR_ENTRIES;
wxhw->mac.max_tx_queues = TXGBE_SP_MAX_TX_QUEUES;
wxhw->mac.max_rx_queues = TXGBE_SP_MAX_RX_QUEUES;
wxhw->mac.mcft_size = TXGBE_SP_MC_TBL_SIZE;
adapter->mac_table = kcalloc(wxhw->mac.num_rar_entries,
sizeof(struct txgbe_mac_addr),
GFP_KERNEL);
if (!adapter->mac_table) {
netif_err(adapter, probe, adapter->netdev,
"mac_table allocation failed\n");
return -ENOMEM;
}
return 0; return 0;
} }
...@@ -278,23 +170,23 @@ static int txgbe_sw_init(struct txgbe_adapter *adapter) ...@@ -278,23 +170,23 @@ static int txgbe_sw_init(struct txgbe_adapter *adapter)
**/ **/
static int txgbe_open(struct net_device *netdev) static int txgbe_open(struct net_device *netdev)
{ {
struct txgbe_adapter *adapter = netdev_priv(netdev); struct wx *wx = netdev_priv(netdev);
txgbe_up_complete(adapter); txgbe_up_complete(wx);
return 0; return 0;
} }
/** /**
* txgbe_close_suspend - actions necessary to both suspend and close flows * txgbe_close_suspend - actions necessary to both suspend and close flows
* @adapter: the private adapter struct * @wx: the private wx struct
* *
* This function should contain the necessary work common to both suspending * This function should contain the necessary work common to both suspending
* and closing of the device. * and closing of the device.
*/ */
static void txgbe_close_suspend(struct txgbe_adapter *adapter) static void txgbe_close_suspend(struct wx *wx)
{ {
txgbe_disable_device(adapter); txgbe_disable_device(wx);
} }
/** /**
...@@ -310,29 +202,28 @@ static void txgbe_close_suspend(struct txgbe_adapter *adapter) ...@@ -310,29 +202,28 @@ static void txgbe_close_suspend(struct txgbe_adapter *adapter)
**/ **/
static int txgbe_close(struct net_device *netdev) static int txgbe_close(struct net_device *netdev)
{ {
struct txgbe_adapter *adapter = netdev_priv(netdev); struct wx *wx = netdev_priv(netdev);
txgbe_down(adapter); txgbe_down(wx);
wx_control_hw(&adapter->hw.wxhw, false); wx_control_hw(wx, false);
return 0; return 0;
} }
static void txgbe_dev_shutdown(struct pci_dev *pdev, bool *enable_wake) static void txgbe_dev_shutdown(struct pci_dev *pdev, bool *enable_wake)
{ {
struct txgbe_adapter *adapter = pci_get_drvdata(pdev); struct wx *wx = pci_get_drvdata(pdev);
struct net_device *netdev = adapter->netdev; struct net_device *netdev;
struct txgbe_hw *hw = &adapter->hw;
struct wx_hw *wxhw = &hw->wxhw;
netdev = wx->netdev;
netif_device_detach(netdev); netif_device_detach(netdev);
rtnl_lock(); rtnl_lock();
if (netif_running(netdev)) if (netif_running(netdev))
txgbe_close_suspend(adapter); txgbe_close_suspend(wx);
rtnl_unlock(); rtnl_unlock();
wx_control_hw(wxhw, false); wx_control_hw(wx, false);
pci_disable_device(pdev); pci_disable_device(pdev);
} }
...@@ -355,39 +246,12 @@ static netdev_tx_t txgbe_xmit_frame(struct sk_buff *skb, ...@@ -355,39 +246,12 @@ static netdev_tx_t txgbe_xmit_frame(struct sk_buff *skb,
return NETDEV_TX_OK; return NETDEV_TX_OK;
} }
/**
* txgbe_set_mac - Change the Ethernet Address of the NIC
* @netdev: network interface device structure
* @p: pointer to an address structure
*
* Returns 0 on success, negative on failure
**/
static int txgbe_set_mac(struct net_device *netdev, void *p)
{
struct txgbe_adapter *adapter = netdev_priv(netdev);
struct wx_hw *wxhw = &adapter->hw.wxhw;
struct sockaddr *addr = p;
int retval;
retval = eth_prepare_mac_addr_change(netdev, addr);
if (retval)
return retval;
txgbe_del_mac_filter(adapter, wxhw->mac.addr, 0);
eth_hw_addr_set(netdev, addr->sa_data);
memcpy(wxhw->mac.addr, addr->sa_data, netdev->addr_len);
txgbe_mac_set_default_filter(adapter, wxhw->mac.addr);
return 0;
}
static const struct net_device_ops txgbe_netdev_ops = { static const struct net_device_ops txgbe_netdev_ops = {
.ndo_open = txgbe_open, .ndo_open = txgbe_open,
.ndo_stop = txgbe_close, .ndo_stop = txgbe_close,
.ndo_start_xmit = txgbe_xmit_frame, .ndo_start_xmit = txgbe_xmit_frame,
.ndo_validate_addr = eth_validate_addr, .ndo_validate_addr = eth_validate_addr,
.ndo_set_mac_address = txgbe_set_mac, .ndo_set_mac_address = wx_set_mac,
}; };
/** /**
...@@ -398,17 +262,15 @@ static const struct net_device_ops txgbe_netdev_ops = { ...@@ -398,17 +262,15 @@ static const struct net_device_ops txgbe_netdev_ops = {
* Returns 0 on success, negative on failure * Returns 0 on success, negative on failure
* *
* txgbe_probe initializes an adapter identified by a pci_dev structure. * txgbe_probe initializes an adapter identified by a pci_dev structure.
* The OS initialization, configuring of the adapter private structure, * The OS initialization, configuring of the wx private structure,
* and a hardware reset occur. * and a hardware reset occur.
**/ **/
static int txgbe_probe(struct pci_dev *pdev, static int txgbe_probe(struct pci_dev *pdev,
const struct pci_device_id __always_unused *ent) const struct pci_device_id __always_unused *ent)
{ {
struct txgbe_adapter *adapter = NULL;
struct txgbe_hw *hw = NULL;
struct wx_hw *wxhw = NULL;
struct net_device *netdev; struct net_device *netdev;
int err, expected_gts; int err, expected_gts;
struct wx *wx = NULL;
u16 eeprom_verh = 0, eeprom_verl = 0, offset = 0; u16 eeprom_verh = 0, eeprom_verl = 0, offset = 0;
u16 eeprom_cfg_blkh = 0, eeprom_cfg_blkl = 0; u16 eeprom_cfg_blkh = 0, eeprom_cfg_blkl = 0;
...@@ -440,7 +302,7 @@ static int txgbe_probe(struct pci_dev *pdev, ...@@ -440,7 +302,7 @@ static int txgbe_probe(struct pci_dev *pdev,
pci_set_master(pdev); pci_set_master(pdev);
netdev = devm_alloc_etherdev_mqs(&pdev->dev, netdev = devm_alloc_etherdev_mqs(&pdev->dev,
sizeof(struct txgbe_adapter), sizeof(struct wx),
TXGBE_MAX_TX_QUEUES, TXGBE_MAX_TX_QUEUES,
TXGBE_MAX_RX_QUEUES); TXGBE_MAX_RX_QUEUES);
if (!netdev) { if (!netdev) {
...@@ -450,17 +312,16 @@ static int txgbe_probe(struct pci_dev *pdev, ...@@ -450,17 +312,16 @@ static int txgbe_probe(struct pci_dev *pdev,
SET_NETDEV_DEV(netdev, &pdev->dev); SET_NETDEV_DEV(netdev, &pdev->dev);
adapter = netdev_priv(netdev); wx = netdev_priv(netdev);
adapter->netdev = netdev; wx->netdev = netdev;
adapter->pdev = pdev; wx->pdev = pdev;
hw = &adapter->hw;
wxhw = &hw->wxhw; wx->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
wx->hw_addr = devm_ioremap(&pdev->dev,
adapter->io_addr = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 0),
pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
pci_resource_len(pdev, 0)); if (!wx->hw_addr) {
if (!adapter->io_addr) {
err = -EIO; err = -EIO;
goto err_pci_release_regions; goto err_pci_release_regions;
} }
...@@ -468,25 +329,25 @@ static int txgbe_probe(struct pci_dev *pdev, ...@@ -468,25 +329,25 @@ static int txgbe_probe(struct pci_dev *pdev,
netdev->netdev_ops = &txgbe_netdev_ops; netdev->netdev_ops = &txgbe_netdev_ops;
/* setup the private structure */ /* setup the private structure */
err = txgbe_sw_init(adapter); err = txgbe_sw_init(wx);
if (err) if (err)
goto err_free_mac_table; goto err_free_mac_table;
/* check if flash load is done after hw power up */ /* check if flash load is done after hw power up */
err = wx_check_flash_load(wxhw, TXGBE_SPI_ILDR_STATUS_PERST); err = wx_check_flash_load(wx, TXGBE_SPI_ILDR_STATUS_PERST);
if (err) if (err)
goto err_free_mac_table; goto err_free_mac_table;
err = wx_check_flash_load(wxhw, TXGBE_SPI_ILDR_STATUS_PWRRST); err = wx_check_flash_load(wx, TXGBE_SPI_ILDR_STATUS_PWRRST);
if (err) if (err)
goto err_free_mac_table; goto err_free_mac_table;
err = wx_mng_present(wxhw); err = wx_mng_present(wx);
if (err) { if (err) {
dev_err(&pdev->dev, "Management capability is not present\n"); dev_err(&pdev->dev, "Management capability is not present\n");
goto err_free_mac_table; goto err_free_mac_table;
} }
err = txgbe_reset_hw(hw); err = txgbe_reset_hw(wx);
if (err) { if (err) {
dev_err(&pdev->dev, "HW Init failed: %d\n", err); dev_err(&pdev->dev, "HW Init failed: %d\n", err);
goto err_free_mac_table; goto err_free_mac_table;
...@@ -495,36 +356,36 @@ static int txgbe_probe(struct pci_dev *pdev, ...@@ -495,36 +356,36 @@ static int txgbe_probe(struct pci_dev *pdev,
netdev->features |= NETIF_F_HIGHDMA; netdev->features |= NETIF_F_HIGHDMA;
/* make sure the EEPROM is good */ /* make sure the EEPROM is good */
err = txgbe_validate_eeprom_checksum(hw, NULL); err = txgbe_validate_eeprom_checksum(wx, NULL);
if (err != 0) { if (err != 0) {
dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n"); dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
wr32(wxhw, WX_MIS_RST, WX_MIS_RST_SW_RST); wr32(wx, WX_MIS_RST, WX_MIS_RST_SW_RST);
err = -EIO; err = -EIO;
goto err_free_mac_table; goto err_free_mac_table;
} }
eth_hw_addr_set(netdev, wxhw->mac.perm_addr); eth_hw_addr_set(netdev, wx->mac.perm_addr);
txgbe_mac_set_default_filter(adapter, wxhw->mac.perm_addr); wx_mac_set_default_filter(wx, wx->mac.perm_addr);
/* Save off EEPROM version number and Option Rom version which /* Save off EEPROM version number and Option Rom version which
* together make a unique identify for the eeprom * together make a unique identify for the eeprom
*/ */
wx_read_ee_hostif(wxhw, wx_read_ee_hostif(wx,
wxhw->eeprom.sw_region_offset + TXGBE_EEPROM_VERSION_H, wx->eeprom.sw_region_offset + TXGBE_EEPROM_VERSION_H,
&eeprom_verh); &eeprom_verh);
wx_read_ee_hostif(wxhw, wx_read_ee_hostif(wx,
wxhw->eeprom.sw_region_offset + TXGBE_EEPROM_VERSION_L, wx->eeprom.sw_region_offset + TXGBE_EEPROM_VERSION_L,
&eeprom_verl); &eeprom_verl);
etrack_id = (eeprom_verh << 16) | eeprom_verl; etrack_id = (eeprom_verh << 16) | eeprom_verl;
wx_read_ee_hostif(wxhw, wx_read_ee_hostif(wx,
wxhw->eeprom.sw_region_offset + TXGBE_ISCSI_BOOT_CONFIG, wx->eeprom.sw_region_offset + TXGBE_ISCSI_BOOT_CONFIG,
&offset); &offset);
/* Make sure offset to SCSI block is valid */ /* Make sure offset to SCSI block is valid */
if (!(offset == 0x0) && !(offset == 0xffff)) { if (!(offset == 0x0) && !(offset == 0xffff)) {
wx_read_ee_hostif(wxhw, offset + 0x84, &eeprom_cfg_blkh); wx_read_ee_hostif(wx, offset + 0x84, &eeprom_cfg_blkh);
wx_read_ee_hostif(wxhw, offset + 0x83, &eeprom_cfg_blkl); wx_read_ee_hostif(wx, offset + 0x83, &eeprom_cfg_blkl);
/* Only display Option Rom if exist */ /* Only display Option Rom if exist */
if (eeprom_cfg_blkl && eeprom_cfg_blkh) { if (eeprom_cfg_blkl && eeprom_cfg_blkh) {
...@@ -532,15 +393,15 @@ static int txgbe_probe(struct pci_dev *pdev, ...@@ -532,15 +393,15 @@ static int txgbe_probe(struct pci_dev *pdev,
build = (eeprom_cfg_blkl << 8) | (eeprom_cfg_blkh >> 8); build = (eeprom_cfg_blkl << 8) | (eeprom_cfg_blkh >> 8);
patch = eeprom_cfg_blkh & 0x00ff; patch = eeprom_cfg_blkh & 0x00ff;
snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
"0x%08x, %d.%d.%d", etrack_id, major, build, "0x%08x, %d.%d.%d", etrack_id, major, build,
patch); patch);
} else { } else {
snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
"0x%08x", etrack_id); "0x%08x", etrack_id);
} }
} else { } else {
snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
"0x%08x", etrack_id); "0x%08x", etrack_id);
} }
...@@ -548,7 +409,7 @@ static int txgbe_probe(struct pci_dev *pdev, ...@@ -548,7 +409,7 @@ static int txgbe_probe(struct pci_dev *pdev,
if (err) if (err)
goto err_release_hw; goto err_release_hw;
pci_set_drvdata(pdev, adapter); pci_set_drvdata(pdev, wx);
/* calculate the expected PCIe bandwidth required for optimal /* calculate the expected PCIe bandwidth required for optimal
* performance. Note that some older parts will never have enough * performance. Note that some older parts will never have enough
...@@ -556,27 +417,27 @@ static int txgbe_probe(struct pci_dev *pdev, ...@@ -556,27 +417,27 @@ static int txgbe_probe(struct pci_dev *pdev,
* parts to ensure that no warning is displayed, as this could confuse * parts to ensure that no warning is displayed, as this could confuse
* users otherwise. * users otherwise.
*/ */
expected_gts = txgbe_enumerate_functions(adapter) * 10; expected_gts = txgbe_enumerate_functions(wx) * 10;
/* don't check link if we failed to enumerate functions */ /* don't check link if we failed to enumerate functions */
if (expected_gts > 0) if (expected_gts > 0)
txgbe_check_minimum_link(adapter); txgbe_check_minimum_link(wx);
else else
dev_warn(&pdev->dev, "Failed to enumerate PF devices.\n"); dev_warn(&pdev->dev, "Failed to enumerate PF devices.\n");
/* First try to read PBA as a string */ /* First try to read PBA as a string */
err = txgbe_read_pba_string(hw, part_str, TXGBE_PBANUM_LENGTH); err = txgbe_read_pba_string(wx, part_str, TXGBE_PBANUM_LENGTH);
if (err) if (err)
strncpy(part_str, "Unknown", TXGBE_PBANUM_LENGTH); strncpy(part_str, "Unknown", TXGBE_PBANUM_LENGTH);
netif_info(adapter, probe, netdev, "%pM\n", netdev->dev_addr); netif_info(wx, probe, netdev, "%pM\n", netdev->dev_addr);
return 0; return 0;
err_release_hw: err_release_hw:
wx_control_hw(wxhw, false); wx_control_hw(wx, false);
err_free_mac_table: err_free_mac_table:
kfree(adapter->mac_table); kfree(wx->mac_table);
err_pci_release_regions: err_pci_release_regions:
pci_disable_pcie_error_reporting(pdev); pci_disable_pcie_error_reporting(pdev);
pci_release_selected_regions(pdev, pci_release_selected_regions(pdev,
...@@ -597,16 +458,16 @@ static int txgbe_probe(struct pci_dev *pdev, ...@@ -597,16 +458,16 @@ static int txgbe_probe(struct pci_dev *pdev,
**/ **/
static void txgbe_remove(struct pci_dev *pdev) static void txgbe_remove(struct pci_dev *pdev)
{ {
struct txgbe_adapter *adapter = pci_get_drvdata(pdev); struct wx *wx = pci_get_drvdata(pdev);
struct net_device *netdev; struct net_device *netdev;
netdev = adapter->netdev; netdev = wx->netdev;
unregister_netdev(netdev); unregister_netdev(netdev);
pci_release_selected_regions(pdev, pci_release_selected_regions(pdev,
pci_select_bars(pdev, IORESOURCE_MEM)); pci_select_bars(pdev, IORESOURCE_MEM));
kfree(adapter->mac_table); kfree(wx->mac_table);
pci_disable_pcie_error_reporting(pdev); pci_disable_pcie_error_reporting(pdev);
......
drivers/net/ethernet/wangxun/txgbe/txgbe_type.h
View file @ f23395b4
...@@ -67,8 +67,16 @@ ...@@ -67,8 +67,16 @@
#define TXGBE_PBANUM1_PTR 0x06 #define TXGBE_PBANUM1_PTR 0x06
#define TXGBE_PBANUM_PTR_GUARD 0xFAFA #define TXGBE_PBANUM_PTR_GUARD 0xFAFA
struct txgbe_hw { #define TXGBE_MAX_FDIR_INDICES 63
struct wx_hw wxhw;
}; #define TXGBE_MAX_RX_QUEUES (TXGBE_MAX_FDIR_INDICES + 1)
#define TXGBE_MAX_TX_QUEUES (TXGBE_MAX_FDIR_INDICES + 1)
#define TXGBE_SP_MAX_TX_QUEUES 128
#define TXGBE_SP_MAX_RX_QUEUES 128
#define TXGBE_SP_RAR_ENTRIES 128
#define TXGBE_SP_MC_TBL_SIZE 128
extern char txgbe_driver_name[];
#endif /* _TXGBE_TYPE_H_ */ #endif /* _TXGBE_TYPE_H_ */
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