Commit f5f58a0b authored by Kalle Valo's avatar Kalle Valo

Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git

ath.git patches for v5.9. Major changes:

ath11k

* add 6G band support

* add spectral scan support
parents b3a9e3b9 01e34233
...@@ -15,11 +15,11 @@ config WLAN_VENDOR_ATH ...@@ -15,11 +15,11 @@ config WLAN_VENDOR_ATH
For more information and documentation on this module you can visit: For more information and documentation on this module you can visit:
http://wireless.kernel.org/en/users/Drivers/ath https://wireless.wiki.kernel.org/en/users/Drivers/ath
For information on all Atheros wireless drivers visit: For information on all Atheros wireless drivers visit:
http://wireless.kernel.org/en/users/Drivers/Atheros https://wireless.wiki.kernel.org/en/users/Drivers/Atheros
if WLAN_VENDOR_ATH if WLAN_VENDOR_ATH
......
...@@ -1591,7 +1591,9 @@ static int ath10k_htt_tx_32(struct ath10k_htt *htt, ...@@ -1591,7 +1591,9 @@ static int ath10k_htt_tx_32(struct ath10k_htt *htt,
err_unmap_msdu: err_unmap_msdu:
dma_unmap_single(dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); dma_unmap_single(dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
err_free_msdu_id: err_free_msdu_id:
spin_lock_bh(&htt->tx_lock);
ath10k_htt_tx_free_msdu_id(htt, msdu_id); ath10k_htt_tx_free_msdu_id(htt, msdu_id);
spin_unlock_bh(&htt->tx_lock);
err: err:
return res; return res;
} }
...@@ -1798,7 +1800,9 @@ static int ath10k_htt_tx_64(struct ath10k_htt *htt, ...@@ -1798,7 +1800,9 @@ static int ath10k_htt_tx_64(struct ath10k_htt *htt,
err_unmap_msdu: err_unmap_msdu:
dma_unmap_single(dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); dma_unmap_single(dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
err_free_msdu_id: err_free_msdu_id:
spin_lock_bh(&htt->tx_lock);
ath10k_htt_tx_free_msdu_id(htt, msdu_id); ath10k_htt_tx_free_msdu_id(htt, msdu_id);
spin_unlock_bh(&htt->tx_lock);
err: err:
return res; return res;
} }
......
...@@ -34,3 +34,12 @@ config ATH11K_TRACING ...@@ -34,3 +34,12 @@ config ATH11K_TRACING
depends on ATH11K && EVENT_TRACING depends on ATH11K && EVENT_TRACING
help help
Select this to use ath11k tracing infrastructure. Select this to use ath11k tracing infrastructure.
config ATH11K_SPECTRAL
bool "QCA ath11k spectral scan support"
depends on ATH11K_DEBUGFS
depends on RELAY
help
Enable ath11k spectral scan support
Say Y to enable access to the FFT/spectral data via debugfs.
...@@ -15,12 +15,14 @@ ath11k-y += core.o \ ...@@ -15,12 +15,14 @@ ath11k-y += core.o \
dp_rx.o \ dp_rx.o \
debug.o \ debug.o \
ce.o \ ce.o \
peer.o peer.o \
dbring.o
ath11k-$(CONFIG_ATH11K_DEBUGFS) += debug_htt_stats.o debugfs_sta.o ath11k-$(CONFIG_ATH11K_DEBUGFS) += debug_htt_stats.o debugfs_sta.o
ath11k-$(CONFIG_NL80211_TESTMODE) += testmode.o ath11k-$(CONFIG_NL80211_TESTMODE) += testmode.o
ath11k-$(CONFIG_ATH11K_TRACING) += trace.o ath11k-$(CONFIG_ATH11K_TRACING) += trace.o
ath11k-$(CONFIG_THERMAL) += thermal.o ath11k-$(CONFIG_THERMAL) += thermal.o
ath11k-$(CONFIG_ATH11K_SPECTRAL) += spectral.o
# for tracing framework to find trace.h # for tracing framework to find trace.h
CFLAGS_trace.o := -I$(src) CFLAGS_trace.o := -I$(src)
...@@ -400,8 +400,16 @@ static int ath11k_core_pdev_create(struct ath11k_base *ab) ...@@ -400,8 +400,16 @@ static int ath11k_core_pdev_create(struct ath11k_base *ab)
goto err_dp_pdev_free; goto err_dp_pdev_free;
} }
ret = ath11k_spectral_init(ab);
if (ret) {
ath11k_err(ab, "failed to init spectral %d\n", ret);
goto err_thermal_unregister;
}
return 0; return 0;
err_thermal_unregister:
ath11k_thermal_unregister(ab);
err_dp_pdev_free: err_dp_pdev_free:
ath11k_dp_pdev_free(ab); ath11k_dp_pdev_free(ab);
err_mac_unregister: err_mac_unregister:
...@@ -414,6 +422,7 @@ static int ath11k_core_pdev_create(struct ath11k_base *ab) ...@@ -414,6 +422,7 @@ static int ath11k_core_pdev_create(struct ath11k_base *ab)
static void ath11k_core_pdev_destroy(struct ath11k_base *ab) static void ath11k_core_pdev_destroy(struct ath11k_base *ab)
{ {
ath11k_spectral_deinit(ab);
ath11k_thermal_unregister(ab); ath11k_thermal_unregister(ab);
ath11k_mac_unregister(ab); ath11k_mac_unregister(ab);
ath11k_hif_irq_disable(ab); ath11k_hif_irq_disable(ab);
...@@ -582,6 +591,7 @@ static int ath11k_core_reconfigure_on_crash(struct ath11k_base *ab) ...@@ -582,6 +591,7 @@ static int ath11k_core_reconfigure_on_crash(struct ath11k_base *ab)
ath11k_thermal_unregister(ab); ath11k_thermal_unregister(ab);
ath11k_hif_irq_disable(ab); ath11k_hif_irq_disable(ab);
ath11k_dp_pdev_free(ab); ath11k_dp_pdev_free(ab);
ath11k_spectral_deinit(ab);
ath11k_hif_stop(ab); ath11k_hif_stop(ab);
ath11k_wmi_detach(ab); ath11k_wmi_detach(ab);
ath11k_dp_pdev_reo_cleanup(ab); ath11k_dp_pdev_reo_cleanup(ab);
......
...@@ -21,6 +21,8 @@ ...@@ -21,6 +21,8 @@
#include "hal_rx.h" #include "hal_rx.h"
#include "reg.h" #include "reg.h"
#include "thermal.h" #include "thermal.h"
#include "dbring.h"
#include "spectral.h"
#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
...@@ -215,12 +217,15 @@ struct ath11k_vif { ...@@ -215,12 +217,15 @@ struct ath11k_vif {
bool is_started; bool is_started;
bool is_up; bool is_up;
bool spectral_enabled;
u32 aid; u32 aid;
u8 bssid[ETH_ALEN]; u8 bssid[ETH_ALEN];
struct cfg80211_bitrate_mask bitrate_mask; struct cfg80211_bitrate_mask bitrate_mask;
int num_legacy_stations; int num_legacy_stations;
int rtscts_prot_mode; int rtscts_prot_mode;
int txpower; int txpower;
bool rsnie_present;
bool wpaie_present;
}; };
struct ath11k_vif_iter { struct ath11k_vif_iter {
...@@ -353,7 +358,10 @@ struct ath11k_sta { ...@@ -353,7 +358,10 @@ struct ath11k_sta {
#endif #endif
}; };
#define ATH11K_NUM_CHANS 41 #define ATH11K_MIN_5G_FREQ 4150
#define ATH11K_MIN_6G_FREQ 5945
#define ATH11K_MAX_6G_FREQ 7115
#define ATH11K_NUM_CHANS 100
#define ATH11K_MAX_5G_CHAN 173 #define ATH11K_MAX_5G_CHAN 173
enum ath11k_state { enum ath11k_state {
...@@ -431,6 +439,7 @@ struct ath11k { ...@@ -431,6 +439,7 @@ struct ath11k {
u32 vht_cap_info; u32 vht_cap_info;
struct ath11k_he ar_he; struct ath11k_he ar_he;
enum ath11k_state state; enum ath11k_state state;
bool supports_6ghz;
struct { struct {
struct completion started; struct completion started;
struct completion completed; struct completion completed;
...@@ -536,6 +545,9 @@ struct ath11k { ...@@ -536,6 +545,9 @@ struct ath11k {
u32 cached_ppdu_id; u32 cached_ppdu_id;
#ifdef CONFIG_ATH11K_DEBUGFS #ifdef CONFIG_ATH11K_DEBUGFS
struct ath11k_debug debug; struct ath11k_debug debug;
#endif
#ifdef CONFIG_ATH11K_SPECTRAL
struct ath11k_spectral spectral;
#endif #endif
bool dfs_block_radar_events; bool dfs_block_radar_events;
struct ath11k_thermal thermal; struct ath11k_thermal thermal;
...@@ -548,6 +560,7 @@ struct ath11k_band_cap { ...@@ -548,6 +560,7 @@ struct ath11k_band_cap {
u32 he_mcs; u32 he_mcs;
u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
struct ath11k_ppe_threshold he_ppet; struct ath11k_ppe_threshold he_ppet;
u16 he_6ghz_capa;
}; };
struct ath11k_pdev_cap { struct ath11k_pdev_cap {
...@@ -579,12 +592,42 @@ struct ath11k_board_data { ...@@ -579,12 +592,42 @@ struct ath11k_board_data {
/* IPQ8074 HW channel counters frequency value in hertz */ /* IPQ8074 HW channel counters frequency value in hertz */
#define IPQ8074_CC_FREQ_HERTZ 320000 #define IPQ8074_CC_FREQ_HERTZ 320000
struct ath11k_soc_dp_rx_stats { struct ath11k_bp_stats {
/* Head Pointer reported by the last HTT Backpressure event for the ring */
u16 hp;
/* Tail Pointer reported by the last HTT Backpressure event for the ring */
u16 tp;
/* Number of Backpressure events received for the ring */
u32 count;
/* Last recorded event timestamp */
unsigned long jiffies;
};
struct ath11k_dp_ring_bp_stats {
struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
};
struct ath11k_soc_dp_tx_err_stats {
/* TCL Ring Descriptor unavailable */
u32 desc_na[DP_TCL_NUM_RING_MAX];
/* Other failures during dp_tx due to mem allocation failure
* idr unavailable etc.
*/
atomic_t misc_fail;
};
struct ath11k_soc_dp_stats {
u32 err_ring_pkts; u32 err_ring_pkts;
u32 invalid_rbm; u32 invalid_rbm;
u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
u32 hal_reo_error[DP_REO_DST_RING_MAX]; u32 hal_reo_error[DP_REO_DST_RING_MAX];
struct ath11k_soc_dp_tx_err_stats tx_err;
struct ath11k_dp_ring_bp_stats bp_stats;
}; };
/* Master structure to hold the hw data which may be used in core module */ /* Master structure to hold the hw data which may be used in core module */
...@@ -653,7 +696,7 @@ struct ath11k_base { ...@@ -653,7 +696,7 @@ struct ath11k_base {
struct dentry *debugfs_soc; struct dentry *debugfs_soc;
struct dentry *debugfs_ath11k; struct dentry *debugfs_ath11k;
#endif #endif
struct ath11k_soc_dp_rx_stats soc_stats; struct ath11k_soc_dp_stats soc_stats;
unsigned long dev_flags; unsigned long dev_flags;
struct completion driver_recovery; struct completion driver_recovery;
...@@ -668,6 +711,9 @@ struct ath11k_base { ...@@ -668,6 +711,9 @@ struct ath11k_base {
/* Round robbin based TCL ring selector */ /* Round robbin based TCL ring selector */
atomic_t tcl_ring_selector; atomic_t tcl_ring_selector;
struct ath11k_dbring_cap *db_caps;
u32 num_db_cap;
/* must be last */ /* must be last */
u8 drv_priv[0] __aligned(sizeof(void *)); u8 drv_priv[0] __aligned(sizeof(void *));
}; };
......
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
*/
#include "core.h"
#include "debug.h"
static int ath11k_dbring_bufs_replenish(struct ath11k *ar,
struct ath11k_dbring *ring,
struct ath11k_dbring_element *buff,
gfp_t gfp)
{
struct ath11k_base *ab = ar->ab;
struct hal_srng *srng;
dma_addr_t paddr;
void *ptr_aligned, *ptr_unaligned, *desc;
int ret;
int buf_id;
u32 cookie;
srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
lockdep_assert_held(&srng->lock);
ath11k_hal_srng_access_begin(ab, srng);
ptr_unaligned = buff->payload;
ptr_aligned = PTR_ALIGN(ptr_unaligned, ring->buf_align);
paddr = dma_map_single(ab->dev, ptr_aligned, ring->buf_sz,
DMA_FROM_DEVICE);
ret = dma_mapping_error(ab->dev, paddr);
if (ret)
goto err;
spin_lock_bh(&ring->idr_lock);
buf_id = idr_alloc(&ring->bufs_idr, buff, 0, ring->bufs_max, gfp);
spin_unlock_bh(&ring->idr_lock);
if (buf_id < 0) {
ret = -ENOBUFS;
goto err_dma_unmap;
}
desc = ath11k_hal_srng_src_get_next_entry(ab, srng);
if (!desc) {
ret = -ENOENT;
goto err_idr_remove;
}
buff->paddr = paddr;
cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, ar->pdev_idx) |
FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);
ath11k_hal_rx_buf_addr_info_set(desc, paddr, cookie, 0);
ath11k_hal_srng_access_end(ab, srng);
return 0;
err_idr_remove:
spin_lock_bh(&ring->idr_lock);
idr_remove(&ring->bufs_idr, buf_id);
spin_unlock_bh(&ring->idr_lock);
err_dma_unmap:
dma_unmap_single(ab->dev, paddr, ring->buf_sz,
DMA_FROM_DEVICE);
err:
ath11k_hal_srng_access_end(ab, srng);
return ret;
}
static int ath11k_dbring_fill_bufs(struct ath11k *ar,
struct ath11k_dbring *ring,
gfp_t gfp)
{
struct ath11k_dbring_element *buff;
struct hal_srng *srng;
int num_remain, req_entries, num_free;
u32 align;
int size, ret;
srng = &ar->ab->hal.srng_list[ring->refill_srng.ring_id];
spin_lock_bh(&srng->lock);
num_free = ath11k_hal_srng_src_num_free(ar->ab, srng, true);
req_entries = min(num_free, ring->bufs_max);
num_remain = req_entries;
align = ring->buf_align;
size = sizeof(*buff) + ring->buf_sz + align - 1;
while (num_remain > 0) {
buff = kzalloc(size, gfp);
if (!buff)
break;
ret = ath11k_dbring_bufs_replenish(ar, ring, buff, gfp);
if (ret) {
ath11k_warn(ar->ab, "failed to replenish db ring num_remain %d req_ent %d\n",
num_remain, req_entries);
kfree(buff);
break;
}
num_remain--;
}
spin_unlock_bh(&srng->lock);
return num_remain;
}
int ath11k_dbring_wmi_cfg_setup(struct ath11k *ar,
struct ath11k_dbring *ring,
enum wmi_direct_buffer_module id)
{
struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd param = {0};
int ret;
if (id >= WMI_DIRECT_BUF_MAX)
return -EINVAL;
param.pdev_id = DP_SW2HW_MACID(ring->pdev_id);
param.module_id = id;
param.base_paddr_lo = lower_32_bits(ring->refill_srng.paddr);
param.base_paddr_hi = upper_32_bits(ring->refill_srng.paddr);
param.head_idx_paddr_lo = lower_32_bits(ring->hp_addr);
param.head_idx_paddr_hi = upper_32_bits(ring->hp_addr);
param.tail_idx_paddr_lo = lower_32_bits(ring->tp_addr);
param.tail_idx_paddr_hi = upper_32_bits(ring->tp_addr);
param.num_elems = ring->bufs_max;
param.buf_size = ring->buf_sz;
param.num_resp_per_event = ring->num_resp_per_event;
param.event_timeout_ms = ring->event_timeout_ms;
ret = ath11k_wmi_pdev_dma_ring_cfg(ar, &param);
if (ret) {
ath11k_warn(ar->ab, "failed to setup db ring cfg\n");
return ret;
}
return 0;
}
int ath11k_dbring_set_cfg(struct ath11k *ar, struct ath11k_dbring *ring,
u32 num_resp_per_event, u32 event_timeout_ms,
int (*handler)(struct ath11k *,
struct ath11k_dbring_data *))
{
if (WARN_ON(!ring))
return -EINVAL;
ring->num_resp_per_event = num_resp_per_event;
ring->event_timeout_ms = event_timeout_ms;
ring->handler = handler;
return 0;
}
int ath11k_dbring_buf_setup(struct ath11k *ar,
struct ath11k_dbring *ring,
struct ath11k_dbring_cap *db_cap)
{
struct ath11k_base *ab = ar->ab;
struct hal_srng *srng;
int ret;
srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
ring->bufs_max = ring->refill_srng.size /
ath11k_hal_srng_get_entrysize(HAL_RXDMA_DIR_BUF);
ring->buf_sz = db_cap->min_buf_sz;
ring->buf_align = db_cap->min_buf_align;
ring->pdev_id = db_cap->pdev_id;
ring->hp_addr = ath11k_hal_srng_get_hp_addr(ar->ab, srng);
ring->tp_addr = ath11k_hal_srng_get_tp_addr(ar->ab, srng);
ret = ath11k_dbring_fill_bufs(ar, ring, GFP_KERNEL);
return ret;
}
int ath11k_dbring_srng_setup(struct ath11k *ar, struct ath11k_dbring *ring,
int ring_num, int num_entries)
{
int ret;
ret = ath11k_dp_srng_setup(ar->ab, &ring->refill_srng, HAL_RXDMA_DIR_BUF,
ring_num, ar->pdev_idx, num_entries);
if (ret < 0) {
ath11k_warn(ar->ab, "failed to setup srng: %d ring_id %d\n",
ret, ring_num);
goto err;
}
return 0;
err:
ath11k_dp_srng_cleanup(ar->ab, &ring->refill_srng);
return ret;
}
int ath11k_dbring_get_cap(struct ath11k_base *ab,
u8 pdev_idx,
enum wmi_direct_buffer_module id,
struct ath11k_dbring_cap *db_cap)
{
int i;
if (!ab->num_db_cap || !ab->db_caps)
return -ENOENT;
if (id >= WMI_DIRECT_BUF_MAX)
return -EINVAL;
for (i = 0; i < ab->num_db_cap; i++) {
if (pdev_idx == ab->db_caps[i].pdev_id &&
id == ab->db_caps[i].id) {
*db_cap = ab->db_caps[i];
return 0;
}
}
return -ENOENT;
}
int ath11k_dbring_buffer_release_event(struct ath11k_base *ab,
struct ath11k_dbring_buf_release_event *ev)
{
struct ath11k_dbring *ring;
struct hal_srng *srng;
struct ath11k *ar;
struct ath11k_dbring_element *buff;
struct ath11k_dbring_data handler_data;
struct ath11k_buffer_addr desc;
u8 *vaddr_unalign;
u32 num_entry, num_buff_reaped;
u8 pdev_idx, rbm;
u32 cookie;
int buf_id;
int size;
dma_addr_t paddr;
int ret = 0;
pdev_idx = ev->fixed.pdev_id;
if (pdev_idx >= ab->num_radios) {
ath11k_warn(ab, "Invalid pdev id %d\n", pdev_idx);
return -EINVAL;
}
if (ev->fixed.num_buf_release_entry !=
ev->fixed.num_meta_data_entry) {
ath11k_warn(ab, "Buffer entry %d mismatch meta entry %d\n",
ev->fixed.num_buf_release_entry,
ev->fixed.num_meta_data_entry);
return -EINVAL;
}
ar = ab->pdevs[pdev_idx].ar;
rcu_read_lock();
if (!rcu_dereference(ab->pdevs_active[pdev_idx])) {
ret = -EINVAL;
goto rcu_unlock;
}
switch (ev->fixed.module_id) {
case WMI_DIRECT_BUF_SPECTRAL:
ring = ath11k_spectral_get_dbring(ar);
break;
default:
ring = NULL;
ath11k_warn(ab, "Recv dma buffer release ev on unsupp module %d\n",
ev->fixed.module_id);
break;
}
if (!ring) {
ret = -EINVAL;
goto rcu_unlock;
}
srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
num_entry = ev->fixed.num_buf_release_entry;
size = sizeof(*buff) + ring->buf_sz + ring->buf_align - 1;
num_buff_reaped = 0;
spin_lock_bh(&srng->lock);
while (num_buff_reaped < num_entry) {
desc.info0 = ev->buf_entry[num_buff_reaped].paddr_lo;
desc.info1 = ev->buf_entry[num_buff_reaped].paddr_hi;
handler_data.meta = ev->meta_data[num_buff_reaped];
num_buff_reaped++;
ath11k_hal_rx_buf_addr_info_get(&desc, &paddr, &cookie, &rbm);
buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID, cookie);
spin_lock_bh(&ring->idr_lock);
buff = idr_find(&ring->bufs_idr, buf_id);
if (!buff) {
spin_unlock_bh(&ring->idr_lock);
continue;
}
idr_remove(&ring->bufs_idr, buf_id);
spin_unlock_bh(&ring->idr_lock);
dma_unmap_single(ab->dev, buff->paddr, ring->buf_sz,
DMA_FROM_DEVICE);
if (ring->handler) {
vaddr_unalign = buff->payload;
handler_data.data = PTR_ALIGN(vaddr_unalign,
ring->buf_align);
handler_data.data_sz = ring->buf_sz;
ring->handler(ar, &handler_data);
}
memset(buff, 0, size);
ath11k_dbring_bufs_replenish(ar, ring, buff, GFP_ATOMIC);
}
spin_unlock_bh(&srng->lock);
rcu_unlock:
rcu_read_unlock();
return ret;
}
void ath11k_dbring_srng_cleanup(struct ath11k *ar, struct ath11k_dbring *ring)
{
ath11k_dp_srng_cleanup(ar->ab, &ring->refill_srng);
}
void ath11k_dbring_buf_cleanup(struct ath11k *ar, struct ath11k_dbring *ring)
{
struct ath11k_dbring_element *buff;
int buf_id;
spin_lock_bh(&ring->idr_lock);
idr_for_each_entry(&ring->bufs_idr, buff, buf_id) {
idr_remove(&ring->bufs_idr, buf_id);
dma_unmap_single(ar->ab->dev, buff->paddr,
ring->buf_sz, DMA_FROM_DEVICE);
kfree(buff);
}
idr_destroy(&ring->bufs_idr);
spin_unlock_bh(&ring->idr_lock);
}
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
*/
#ifndef ATH11K_DBRING_H
#define ATH11K_DBRING_H
#include <linux/types.h>
#include <linux/idr.h>
#include <linux/spinlock.h>
#include "dp.h"
struct ath11k_dbring_element {
dma_addr_t paddr;
u8 payload[0];
};
struct ath11k_dbring_data {
void *data;
u32 data_sz;
struct wmi_dma_buf_release_meta_data meta;
};
struct ath11k_dbring_buf_release_event {
struct ath11k_wmi_dma_buf_release_fixed_param fixed;
struct wmi_dma_buf_release_entry *buf_entry;
struct wmi_dma_buf_release_meta_data *meta_data;
u32 num_buf_entry;
u32 num_meta;
};
struct ath11k_dbring_cap {
u32 pdev_id;
enum wmi_direct_buffer_module id;
u32 min_elem;
u32 min_buf_sz;
u32 min_buf_align;
};
struct ath11k_dbring {
struct dp_srng refill_srng;
struct idr bufs_idr;
/* Protects bufs_idr */
spinlock_t idr_lock;
dma_addr_t tp_addr;
dma_addr_t hp_addr;
int bufs_max;
u32 pdev_id;
u32 buf_sz;
u32 buf_align;
u32 num_resp_per_event;
u32 event_timeout_ms;
int (*handler)(struct ath11k *, struct ath11k_dbring_data *);
};
int ath11k_dbring_set_cfg(struct ath11k *ar,
struct ath11k_dbring *ring,
u32 num_resp_per_event,
u32 event_timeout_ms,
int (*handler)(struct ath11k *,
struct ath11k_dbring_data *));
int ath11k_dbring_wmi_cfg_setup(struct ath11k *ar,
struct ath11k_dbring *ring,
enum wmi_direct_buffer_module id);
int ath11k_dbring_buf_setup(struct ath11k *ar,
struct ath11k_dbring *ring,
struct ath11k_dbring_cap *db_cap);
int ath11k_dbring_srng_setup(struct ath11k *ar, struct ath11k_dbring *ring,
int ring_num, int num_entries);
int ath11k_dbring_buffer_release_event(struct ath11k_base *ab,
struct ath11k_dbring_buf_release_event *ev);
int ath11k_dbring_get_cap(struct ath11k_base *ab,
u8 pdev_idx,
enum wmi_direct_buffer_module id,
struct ath11k_dbring_cap *db_cap);
void ath11k_dbring_srng_cleanup(struct ath11k *ar, struct ath11k_dbring *ring);
void ath11k_dbring_buf_cleanup(struct ath11k *ar, struct ath11k_dbring *ring);
#endif /* ATH11K_DBRING_H */
...@@ -12,6 +12,43 @@ ...@@ -12,6 +12,43 @@
#include "debug_htt_stats.h" #include "debug_htt_stats.h"
#include "peer.h" #include "peer.h"
static const char *htt_bp_umac_ring[HTT_SW_UMAC_RING_IDX_MAX] = {
"REO2SW1_RING",
"REO2SW2_RING",
"REO2SW3_RING",
"REO2SW4_RING",
"WBM2REO_LINK_RING",
"REO2TCL_RING",
"REO2FW_RING",
"RELEASE_RING",
"PPE_RELEASE_RING",
"TCL2TQM_RING",
"TQM_RELEASE_RING",
"REO_RELEASE_RING",
"WBM2SW0_RELEASE_RING",
"WBM2SW1_RELEASE_RING",
"WBM2SW2_RELEASE_RING",
"WBM2SW3_RELEASE_RING",
"REO_CMD_RING",
"REO_STATUS_RING",
};
static const char *htt_bp_lmac_ring[HTT_SW_LMAC_RING_IDX_MAX] = {
"FW2RXDMA_BUF_RING",
"FW2RXDMA_STATUS_RING",
"FW2RXDMA_LINK_RING",
"SW2RXDMA_BUF_RING",
"WBM2RXDMA_LINK_RING",
"RXDMA2FW_RING",
"RXDMA2SW_RING",
"RXDMA2RELEASE_RING",
"RXDMA2REO_RING",
"MONITOR_STATUS_RING",
"MONITOR_BUF_RING",
"MONITOR_DESC_RING",
"MONITOR_DEST_RING",
};
void ath11k_info(struct ath11k_base *ab, const char *fmt, ...) void ath11k_info(struct ath11k_base *ab, const char *fmt, ...)
{ {
struct va_format vaf = { struct va_format vaf = {
...@@ -739,12 +776,78 @@ static const struct file_operations fops_extd_rx_stats = { ...@@ -739,12 +776,78 @@ static const struct file_operations fops_extd_rx_stats = {
.open = simple_open, .open = simple_open,
}; };
static ssize_t ath11k_debug_dump_soc_rx_stats(struct file *file, static int ath11k_fill_bp_stats(struct ath11k_base *ab,
struct ath11k_bp_stats *bp_stats,
char *buf, int len, int size)
{
lockdep_assert_held(&ab->base_lock);
len += scnprintf(buf + len, size - len, "count: %u\n",
bp_stats->count);
len += scnprintf(buf + len, size - len, "hp: %u\n",
bp_stats->hp);
len += scnprintf(buf + len, size - len, "tp: %u\n",
bp_stats->tp);
len += scnprintf(buf + len, size - len, "seen before: %ums\n\n",
jiffies_to_msecs(jiffies - bp_stats->jiffies));
return len;
}
static ssize_t ath11k_debug_dump_soc_ring_bp_stats(struct ath11k_base *ab,
char *buf, int size)
{
struct ath11k_bp_stats *bp_stats;
bool stats_rxd = false;
u8 i, pdev_idx;
int len = 0;
len += scnprintf(buf + len, size - len, "\nBackpressure Stats\n");
len += scnprintf(buf + len, size - len, "==================\n");
spin_lock_bh(&ab->base_lock);
for (i = 0; i < HTT_SW_UMAC_RING_IDX_MAX; i++) {
bp_stats = &ab->soc_stats.bp_stats.umac_ring_bp_stats[i];
if (!bp_stats->count)
continue;
len += scnprintf(buf + len, size - len, "Ring: %s\n",
htt_bp_umac_ring[i]);
len = ath11k_fill_bp_stats(ab, bp_stats, buf, len, size);
stats_rxd = true;
}
for (i = 0; i < HTT_SW_LMAC_RING_IDX_MAX; i++) {
for (pdev_idx = 0; pdev_idx < MAX_RADIOS; pdev_idx++) {
bp_stats =
&ab->soc_stats.bp_stats.lmac_ring_bp_stats[i][pdev_idx];
if (!bp_stats->count)
continue;
len += scnprintf(buf + len, size - len, "Ring: %s\n",
htt_bp_lmac_ring[i]);
len += scnprintf(buf + len, size - len, "pdev: %d\n",
pdev_idx);
len = ath11k_fill_bp_stats(ab, bp_stats, buf, len, size);
stats_rxd = true;
}
}
spin_unlock_bh(&ab->base_lock);
if (!stats_rxd)
len += scnprintf(buf + len, size - len,
"No Ring Backpressure stats received\n\n");
return len;
}
static ssize_t ath11k_debug_dump_soc_dp_stats(struct file *file,
char __user *user_buf, char __user *user_buf,
size_t count, loff_t *ppos) size_t count, loff_t *ppos)
{ {
struct ath11k_base *ab = file->private_data; struct ath11k_base *ab = file->private_data;
struct ath11k_soc_dp_rx_stats *soc_stats = &ab->soc_stats; struct ath11k_soc_dp_stats *soc_stats = &ab->soc_stats;
int len = 0, i, retval; int len = 0, i, retval;
const int size = 4096; const int size = 4096;
static const char *rxdma_err[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX] = { static const char *rxdma_err[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX] = {
...@@ -788,6 +891,19 @@ static ssize_t ath11k_debug_dump_soc_rx_stats(struct file *file, ...@@ -788,6 +891,19 @@ static ssize_t ath11k_debug_dump_soc_rx_stats(struct file *file,
soc_stats->hal_reo_error[2], soc_stats->hal_reo_error[2],
soc_stats->hal_reo_error[3]); soc_stats->hal_reo_error[3]);
len += scnprintf(buf + len, size - len, "\nSOC TX STATS:\n");
len += scnprintf(buf + len, size - len, "\nTCL Ring Full Failures:\n");
for (i = 0; i < DP_TCL_NUM_RING_MAX; i++)
len += scnprintf(buf + len, size - len, "ring%d: %u\n",
i, soc_stats->tx_err.desc_na[i]);
len += scnprintf(buf + len, size - len,
"\nMisc Transmit Failures: %d\n",
atomic_read(&soc_stats->tx_err.misc_fail));
len += ath11k_debug_dump_soc_ring_bp_stats(ab, buf + len, size - len);
if (len > size) if (len > size)
len = size; len = size;
retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
...@@ -796,8 +912,8 @@ static ssize_t ath11k_debug_dump_soc_rx_stats(struct file *file, ...@@ -796,8 +912,8 @@ static ssize_t ath11k_debug_dump_soc_rx_stats(struct file *file,
return retval; return retval;
} }
static const struct file_operations fops_soc_rx_stats = { static const struct file_operations fops_soc_dp_stats = {
.read = ath11k_debug_dump_soc_rx_stats, .read = ath11k_debug_dump_soc_dp_stats,
.open = simple_open, .open = simple_open,
.owner = THIS_MODULE, .owner = THIS_MODULE,
.llseek = default_llseek, .llseek = default_llseek,
...@@ -819,8 +935,8 @@ int ath11k_debug_pdev_create(struct ath11k_base *ab) ...@@ -819,8 +935,8 @@ int ath11k_debug_pdev_create(struct ath11k_base *ab)
debugfs_create_file("simulate_fw_crash", 0600, ab->debugfs_soc, ab, debugfs_create_file("simulate_fw_crash", 0600, ab->debugfs_soc, ab,
&fops_simulate_fw_crash); &fops_simulate_fw_crash);
debugfs_create_file("soc_rx_stats", 0600, ab->debugfs_soc, ab, debugfs_create_file("soc_dp_stats", 0600, ab->debugfs_soc, ab,
&fops_soc_rx_stats); &fops_soc_dp_stats);
return 0; return 0;
} }
......
...@@ -172,11 +172,12 @@ int ath11k_dp_srng_setup(struct ath11k_base *ab, struct dp_srng *ring, ...@@ -172,11 +172,12 @@ int ath11k_dp_srng_setup(struct ath11k_base *ab, struct dp_srng *ring,
case HAL_RXDMA_DST: case HAL_RXDMA_DST:
case HAL_RXDMA_MONITOR_DST: case HAL_RXDMA_MONITOR_DST:
case HAL_RXDMA_MONITOR_DESC: case HAL_RXDMA_MONITOR_DESC:
case HAL_RXDMA_DIR_BUF:
params.intr_batch_cntr_thres_entries = params.intr_batch_cntr_thres_entries =
HAL_SRNG_INT_BATCH_THRESHOLD_OTHER; HAL_SRNG_INT_BATCH_THRESHOLD_OTHER;
params.intr_timer_thres_us = HAL_SRNG_INT_TIMER_THRESHOLD_OTHER; params.intr_timer_thres_us = HAL_SRNG_INT_TIMER_THRESHOLD_OTHER;
break; break;
case HAL_RXDMA_DIR_BUF:
break;
default: default:
ath11k_warn(ab, "Not a valid ring type in dp :%d\n", type); ath11k_warn(ab, "Not a valid ring type in dp :%d\n", type);
return -EINVAL; return -EINVAL;
......
...@@ -999,6 +999,48 @@ struct htt_resp_msg { ...@@ -999,6 +999,48 @@ struct htt_resp_msg {
#define HTT_BACKPRESSURE_EVENT_HP_M GENMASK(15, 0) #define HTT_BACKPRESSURE_EVENT_HP_M GENMASK(15, 0)
#define HTT_BACKPRESSURE_EVENT_TP_M GENMASK(31, 16) #define HTT_BACKPRESSURE_EVENT_TP_M GENMASK(31, 16)
#define HTT_BACKPRESSURE_UMAC_RING_TYPE 0
#define HTT_BACKPRESSURE_LMAC_RING_TYPE 1
enum htt_backpressure_umac_ringid {
HTT_SW_RING_IDX_REO_REO2SW1_RING,
HTT_SW_RING_IDX_REO_REO2SW2_RING,
HTT_SW_RING_IDX_REO_REO2SW3_RING,
HTT_SW_RING_IDX_REO_REO2SW4_RING,
HTT_SW_RING_IDX_REO_WBM2REO_LINK_RING,
HTT_SW_RING_IDX_REO_REO2TCL_RING,
HTT_SW_RING_IDX_REO_REO2FW_RING,
HTT_SW_RING_IDX_REO_REO_RELEASE_RING,
HTT_SW_RING_IDX_WBM_PPE_RELEASE_RING,
HTT_SW_RING_IDX_TCL_TCL2TQM_RING,
HTT_SW_RING_IDX_WBM_TQM_RELEASE_RING,
HTT_SW_RING_IDX_WBM_REO_RELEASE_RING,
HTT_SW_RING_IDX_WBM_WBM2SW0_RELEASE_RING,
HTT_SW_RING_IDX_WBM_WBM2SW1_RELEASE_RING,
HTT_SW_RING_IDX_WBM_WBM2SW2_RELEASE_RING,
HTT_SW_RING_IDX_WBM_WBM2SW3_RELEASE_RING,
HTT_SW_RING_IDX_REO_REO_CMD_RING,
HTT_SW_RING_IDX_REO_REO_STATUS_RING,
HTT_SW_UMAC_RING_IDX_MAX,
};
enum htt_backpressure_lmac_ringid {
HTT_SW_RING_IDX_FW2RXDMA_BUF_RING,
HTT_SW_RING_IDX_FW2RXDMA_STATUS_RING,
HTT_SW_RING_IDX_FW2RXDMA_LINK_RING,
HTT_SW_RING_IDX_SW2RXDMA_BUF_RING,
HTT_SW_RING_IDX_WBM2RXDMA_LINK_RING,
HTT_SW_RING_IDX_RXDMA2FW_RING,
HTT_SW_RING_IDX_RXDMA2SW_RING,
HTT_SW_RING_IDX_RXDMA2RELEASE_RING,
HTT_SW_RING_IDX_RXDMA2REO_RING,
HTT_SW_RING_IDX_MONITOR_STATUS_RING,
HTT_SW_RING_IDX_MONITOR_BUF_RING,
HTT_SW_RING_IDX_MONITOR_DESC_RING,
HTT_SW_RING_IDX_MONITOR_DEST_RING,
HTT_SW_LMAC_RING_IDX_MAX,
};
/* ppdu stats /* ppdu stats
* *
* @details * @details
......
...@@ -653,10 +653,8 @@ static void ath11k_dp_rx_tid_del_func(struct ath11k_dp *dp, void *ctx, ...@@ -653,10 +653,8 @@ static void ath11k_dp_rx_tid_del_func(struct ath11k_dp *dp, void *ctx,
spin_lock_bh(&dp->reo_cmd_lock); spin_lock_bh(&dp->reo_cmd_lock);
list_add_tail(&elem->list, &dp->reo_cmd_cache_flush_list); list_add_tail(&elem->list, &dp->reo_cmd_cache_flush_list);
dp->reo_cmd_cache_flush_count++; dp->reo_cmd_cache_flush_count++;
spin_unlock_bh(&dp->reo_cmd_lock);
/* Flush and invalidate aged REO desc from HW cache */ /* Flush and invalidate aged REO desc from HW cache */
spin_lock_bh(&dp->reo_cmd_lock);
list_for_each_entry_safe(elem, tmp, &dp->reo_cmd_cache_flush_list, list_for_each_entry_safe(elem, tmp, &dp->reo_cmd_cache_flush_list,
list) { list) {
if (dp->reo_cmd_cache_flush_count > DP_REO_DESC_FREE_THRESHOLD || if (dp->reo_cmd_cache_flush_count > DP_REO_DESC_FREE_THRESHOLD ||
...@@ -1503,9 +1501,10 @@ static void ath11k_htt_backpressure_event_handler(struct ath11k_base *ab, ...@@ -1503,9 +1501,10 @@ static void ath11k_htt_backpressure_event_handler(struct ath11k_base *ab,
struct sk_buff *skb) struct sk_buff *skb)
{ {
u32 *data = (u32 *)skb->data; u32 *data = (u32 *)skb->data;
u8 pdev_id, ring_type, ring_id; u8 pdev_id, ring_type, ring_id, pdev_idx;
u16 hp, tp; u16 hp, tp;
u32 backpressure_time; u32 backpressure_time;
struct ath11k_bp_stats *bp_stats;
pdev_id = FIELD_GET(HTT_BACKPRESSURE_EVENT_PDEV_ID_M, *data); pdev_id = FIELD_GET(HTT_BACKPRESSURE_EVENT_PDEV_ID_M, *data);
ring_type = FIELD_GET(HTT_BACKPRESSURE_EVENT_RING_TYPE_M, *data); ring_type = FIELD_GET(HTT_BACKPRESSURE_EVENT_RING_TYPE_M, *data);
...@@ -1520,6 +1519,31 @@ static void ath11k_htt_backpressure_event_handler(struct ath11k_base *ab, ...@@ -1520,6 +1519,31 @@ static void ath11k_htt_backpressure_event_handler(struct ath11k_base *ab,
ath11k_dbg(ab, ATH11K_DBG_DP_HTT, "htt backpressure event, pdev %d, ring type %d,ring id %d, hp %d tp %d, backpressure time %d\n", ath11k_dbg(ab, ATH11K_DBG_DP_HTT, "htt backpressure event, pdev %d, ring type %d,ring id %d, hp %d tp %d, backpressure time %d\n",
pdev_id, ring_type, ring_id, hp, tp, backpressure_time); pdev_id, ring_type, ring_id, hp, tp, backpressure_time);
if (ring_type == HTT_BACKPRESSURE_UMAC_RING_TYPE) {
if (ring_id >= HTT_SW_UMAC_RING_IDX_MAX)
return;
bp_stats = &ab->soc_stats.bp_stats.umac_ring_bp_stats[ring_id];
} else if (ring_type == HTT_BACKPRESSURE_LMAC_RING_TYPE) {
pdev_idx = DP_HW2SW_MACID(pdev_id);
if (ring_id >= HTT_SW_LMAC_RING_IDX_MAX || pdev_idx >= MAX_RADIOS)
return;
bp_stats = &ab->soc_stats.bp_stats.lmac_ring_bp_stats[ring_id][pdev_idx];
} else {
ath11k_warn(ab, "unknown ring type received in htt bp event %d\n",
ring_type);
return;
}
spin_lock_bh(&ab->base_lock);
bp_stats->hp = hp;
bp_stats->tp = tp;
bp_stats->count++;
bp_stats->jiffies = jiffies;
spin_unlock_bh(&ab->base_lock);
} }
void ath11k_dp_htt_htc_t2h_msg_handler(struct ath11k_base *ab, void ath11k_dp_htt_htc_t2h_msg_handler(struct ath11k_base *ab,
...@@ -2162,6 +2186,7 @@ static void ath11k_dp_rx_h_ppdu(struct ath11k *ar, struct hal_rx_desc *rx_desc, ...@@ -2162,6 +2186,7 @@ static void ath11k_dp_rx_h_ppdu(struct ath11k *ar, struct hal_rx_desc *rx_desc,
struct ieee80211_rx_status *rx_status) struct ieee80211_rx_status *rx_status)
{ {
u8 channel_num; u8 channel_num;
u32 center_freq;
rx_status->freq = 0; rx_status->freq = 0;
rx_status->rate_idx = 0; rx_status->rate_idx = 0;
...@@ -2172,8 +2197,11 @@ static void ath11k_dp_rx_h_ppdu(struct ath11k *ar, struct hal_rx_desc *rx_desc, ...@@ -2172,8 +2197,11 @@ static void ath11k_dp_rx_h_ppdu(struct ath11k *ar, struct hal_rx_desc *rx_desc,
rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL; rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
channel_num = ath11k_dp_rx_h_msdu_start_freq(rx_desc); channel_num = ath11k_dp_rx_h_msdu_start_freq(rx_desc);
center_freq = ath11k_dp_rx_h_msdu_start_freq(rx_desc) >> 16;
if (channel_num >= 1 && channel_num <= 14) { if (center_freq >= 5935 && center_freq <= 7105) {
rx_status->band = NL80211_BAND_6GHZ;
} else if (channel_num >= 1 && channel_num <= 14) {
rx_status->band = NL80211_BAND_2GHZ; rx_status->band = NL80211_BAND_2GHZ;
} else if (channel_num >= 36 && channel_num <= 173) { } else if (channel_num >= 36 && channel_num <= 173) {
rx_status->band = NL80211_BAND_5GHZ; rx_status->band = NL80211_BAND_5GHZ;
......
...@@ -121,8 +121,10 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif, ...@@ -121,8 +121,10 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
spin_unlock_bh(&tx_ring->tx_idr_lock); spin_unlock_bh(&tx_ring->tx_idr_lock);
if (ret < 0) { if (ret < 0) {
if (ring_map == (BIT(DP_TCL_NUM_RING_MAX) - 1)) if (ring_map == (BIT(DP_TCL_NUM_RING_MAX) - 1)) {
atomic_inc(&ab->soc_stats.tx_err.misc_fail);
return -ENOSPC; return -ENOSPC;
}
/* Check if the next ring is available */ /* Check if the next ring is available */
ring_selector++; ring_selector++;
...@@ -180,11 +182,13 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif, ...@@ -180,11 +182,13 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
default: default:
/* TODO: Take care of other encap modes as well */ /* TODO: Take care of other encap modes as well */
ret = -EINVAL; ret = -EINVAL;
atomic_inc(&ab->soc_stats.tx_err.misc_fail);
goto fail_remove_idr; goto fail_remove_idr;
} }
ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE); ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE);
if (dma_mapping_error(ab->dev, ti.paddr)) { if (dma_mapping_error(ab->dev, ti.paddr)) {
atomic_inc(&ab->soc_stats.tx_err.misc_fail);
ath11k_warn(ab, "failed to DMA map data Tx buffer\n"); ath11k_warn(ab, "failed to DMA map data Tx buffer\n");
ret = -ENOMEM; ret = -ENOMEM;
goto fail_remove_idr; goto fail_remove_idr;
...@@ -208,6 +212,7 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif, ...@@ -208,6 +212,7 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
* desc because the desc is directly enqueued onto hw queue. * desc because the desc is directly enqueued onto hw queue.
*/ */
ath11k_hal_srng_access_end(ab, tcl_ring); ath11k_hal_srng_access_end(ab, tcl_ring);
ab->soc_stats.tx_err.desc_na[ti.ring_id]++;
spin_unlock_bh(&tcl_ring->lock); spin_unlock_bh(&tcl_ring->lock);
ret = -ENOMEM; ret = -ENOMEM;
......
This diff is collapsed.
...@@ -161,6 +161,10 @@ int ath11k_reg_update_chan_list(struct ath11k *ar) ...@@ -161,6 +161,10 @@ int ath11k_reg_update_chan_list(struct ath11k *ar)
else else
ch->phy_mode = MODE_11A; ch->phy_mode = MODE_11A;
if (channel->band == NL80211_BAND_6GHZ &&
cfg80211_channel_is_psc(channel))
ch->psc_channel = true;
ath11k_dbg(ar->ab, ATH11K_DBG_WMI, ath11k_dbg(ar->ab, ATH11K_DBG_WMI,
"mac channel [%d/%d] freq %d maxpower %d regpower %d antenna %d mode %d\n", "mac channel [%d/%d] freq %d maxpower %d regpower %d antenna %d mode %d\n",
i, params->nallchans, i, params->nallchans,
......
This diff is collapsed.
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
*/
#ifndef ATH11K_SPECTRAL_H
#define ATH11K_SPECTRAL_H
#include "../spectral_common.h"
#include "dbring.h"
/* enum ath11k_spectral_mode:
*
* @SPECTRAL_DISABLED: spectral mode is disabled
* @SPECTRAL_BACKGROUND: hardware sends samples when it is not busy with
* something else.
* @SPECTRAL_MANUAL: spectral scan is enabled, triggering for samples
* is performed manually.
*/
enum ath11k_spectral_mode {
ATH11K_SPECTRAL_DISABLED = 0,
ATH11K_SPECTRAL_BACKGROUND,
ATH11K_SPECTRAL_MANUAL,
};
struct ath11k_spectral {
struct ath11k_dbring rx_ring;
/* Protects enabled */
spinlock_t lock;
struct rchan *rfs_scan; /* relay(fs) channel for spectral scan */
struct dentry *scan_ctl;
struct dentry *scan_count;
struct dentry *scan_bins;
enum ath11k_spectral_mode mode;
u16 count;
u8 fft_size;
bool enabled;
};
#ifdef CONFIG_ATH11K_SPECTRAL
int ath11k_spectral_init(struct ath11k_base *ab);
void ath11k_spectral_deinit(struct ath11k_base *ab);
int ath11k_spectral_vif_stop(struct ath11k_vif *arvif);
void ath11k_spectral_reset_buffer(struct ath11k *ar);
enum ath11k_spectral_mode ath11k_spectral_get_mode(struct ath11k *ar);
struct ath11k_dbring *ath11k_spectral_get_dbring(struct ath11k *ar);
#else
static inline int ath11k_spectral_init(struct ath11k_base *ab)
{
return 0;
}
static inline void ath11k_spectral_deinit(struct ath11k_base *ab)
{
}
static inline int ath11k_spectral_vif_stop(struct ath11k_vif *arvif)
{
return 0;
}
static inline void ath11k_spectral_reset_buffer(struct ath11k *ar)
{
}
static inline
enum ath11k_spectral_mode ath11k_spectral_get_mode(struct ath11k *ar)
{
return ATH11K_SPECTRAL_DISABLED;
}
static inline
struct ath11k_dbring *ath11k_spectral_get_dbring(struct ath11k *ar)
{
return NULL;
}
#endif /* CONFIG_ATH11K_SPECTRAL */
#endif /* ATH11K_SPECTRAL_H */
This diff is collapsed.
...@@ -24,6 +24,8 @@ struct ath11k_fw_stats; ...@@ -24,6 +24,8 @@ struct ath11k_fw_stats;
#define HE_PET_8_USEC 1 #define HE_PET_8_USEC 1
#define HE_PET_16_USEC 2 #define HE_PET_16_USEC 2
#define WMI_MAX_CHAINS 8
#define WMI_MAX_NUM_SS MAX_HE_NSS #define WMI_MAX_NUM_SS MAX_HE_NSS
#define WMI_MAX_NUM_RU MAX_HE_RU #define WMI_MAX_NUM_RU MAX_HE_RU
...@@ -50,10 +52,20 @@ struct wmi_tlv { ...@@ -50,10 +52,20 @@ struct wmi_tlv {
#define WMI_MAX_MEM_REQS 32 #define WMI_MAX_MEM_REQS 32
#define ATH11K_MAX_HW_LISTEN_INTERVAL 5 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5
#define WLAN_SCAN_MAX_HINT_S_SSID 10
#define WLAN_SCAN_MAX_HINT_BSSID 10
#define MAX_RNR_BSS 5
#define WLAN_SCAN_MAX_HINT_S_SSID 10
#define WLAN_SCAN_MAX_HINT_BSSID 10
#define MAX_RNR_BSS 5
#define WLAN_SCAN_PARAMS_MAX_SSID 16 #define WLAN_SCAN_PARAMS_MAX_SSID 16
#define WLAN_SCAN_PARAMS_MAX_BSSID 4 #define WLAN_SCAN_PARAMS_MAX_BSSID 4
#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
#define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
#define WMI_BA_MODE_BUFFER_SIZE_256 3 #define WMI_BA_MODE_BUFFER_SIZE_256 3
/* /*
* HW mode config type replicated from FW header * HW mode config type replicated from FW header
...@@ -586,6 +598,11 @@ enum wmi_tlv_event_id { ...@@ -586,6 +598,11 @@ enum wmi_tlv_event_id {
WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID,
WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID,
WMI_PDEV_RAP_INFO_EVENTID,
WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID,
WMI_SERVICE_READY_EXT2_EVENTID,
WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
WMI_VDEV_STOPPED_EVENTID, WMI_VDEV_STOPPED_EVENTID,
WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
...@@ -1011,6 +1028,7 @@ enum wmi_tlv_vdev_param { ...@@ -1011,6 +1028,7 @@ enum wmi_tlv_vdev_param {
WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
WMI_VDEV_PARAM_BA_MODE = 0x7e, WMI_VDEV_PARAM_BA_MODE = 0x7e,
WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
WMI_VDEV_PARAM_PROTOTYPE = 0x8000, WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
WMI_VDEV_PARAM_BSS_COLOR, WMI_VDEV_PARAM_BSS_COLOR,
WMI_VDEV_PARAM_SET_HEMU_MODE, WMI_VDEV_PARAM_SET_HEMU_MODE,
...@@ -2013,9 +2031,10 @@ enum wmi_tlv_service { ...@@ -2013,9 +2031,10 @@ enum wmi_tlv_service {
WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211,
WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212,
WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213,
WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219,
WMI_TLV_SERVICE_EXT2_MSG = 220,
WMI_MAX_EXT_SERVICE WMI_MAX_EXT_SERVICE
}; };
enum { enum {
...@@ -2076,6 +2095,14 @@ enum wmi_beacon_gen_mode { ...@@ -2076,6 +2095,14 @@ enum wmi_beacon_gen_mode {
WMI_BEACON_BURST_MODE = 1 WMI_BEACON_BURST_MODE = 1
}; };
enum wmi_direct_buffer_module {
WMI_DIRECT_BUF_SPECTRAL = 0,
WMI_DIRECT_BUF_CFR = 1,
/* keep it last */
WMI_DIRECT_BUF_MAX
};
struct wmi_host_pdev_band_to_mac { struct wmi_host_pdev_band_to_mac {
u32 pdev_id; u32 pdev_id;
u32 start_freq; u32 start_freq;
...@@ -2382,6 +2409,15 @@ struct wmi_mac_addr { ...@@ -2382,6 +2409,15 @@ struct wmi_mac_addr {
} __packed; } __packed;
} __packed; } __packed;
struct wmi_dma_ring_capabilities {
u32 tlv_header;
u32 pdev_id;
u32 module_id;
u32 min_elem;
u32 min_buf_sz;
u32 min_buf_align;
} __packed;
struct wmi_ready_event_min { struct wmi_ready_event_min {
struct wmi_abi_version fw_abi_vers; struct wmi_abi_version fw_abi_vers;
struct wmi_mac_addr mac_addr; struct wmi_mac_addr mac_addr;
...@@ -2519,7 +2555,8 @@ struct channel_param { ...@@ -2519,7 +2555,8 @@ struct channel_param {
allow_ht:1, allow_ht:1,
allow_vht:1, allow_vht:1,
allow_he:1, allow_he:1,
set_agile:1; set_agile:1,
psc_channel:1;
u32 phy_mode; u32 phy_mode;
u32 cfreq1; u32 cfreq1;
u32 cfreq2; u32 cfreq2;
...@@ -3059,6 +3096,9 @@ struct wmi_start_scan_cmd { ...@@ -3059,6 +3096,9 @@ struct wmi_start_scan_cmd {
u32 num_vendor_oui; u32 num_vendor_oui;
u32 scan_ctrl_flags_ext; u32 scan_ctrl_flags_ext;
u32 dwell_time_active_2g; u32 dwell_time_active_2g;
u32 dwell_time_active_6g;
u32 dwell_time_passive_6g;
u32 scan_start_offset;
} __packed; } __packed;
#define WMI_SCAN_FLAG_PASSIVE 0x1 #define WMI_SCAN_FLAG_PASSIVE 0x1
...@@ -3098,6 +3138,16 @@ enum { ...@@ -3098,6 +3138,16 @@ enum {
((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \ ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \
WMI_SCAN_DWELL_MODE_MASK)) WMI_SCAN_DWELL_MODE_MASK))
struct hint_short_ssid {
u32 freq_flags;
u32 short_ssid;
};
struct hint_bssid {
u32 freq_flags;
struct wmi_mac_addr bssid;
};
struct scan_req_params { struct scan_req_params {
u32 scan_id; u32 scan_id;
u32 scan_req_id; u32 scan_req_id;
...@@ -3125,6 +3175,8 @@ struct scan_req_params { ...@@ -3125,6 +3175,8 @@ struct scan_req_params {
u32 dwell_time_active; u32 dwell_time_active;
u32 dwell_time_active_2g; u32 dwell_time_active_2g;
u32 dwell_time_passive; u32 dwell_time_passive;
u32 dwell_time_active_6g;
u32 dwell_time_passive_6g;
u32 min_rest_time; u32 min_rest_time;
u32 max_rest_time; u32 max_rest_time;
u32 repeat_probe_time; u32 repeat_probe_time;
...@@ -3175,6 +3227,10 @@ struct scan_req_params { ...@@ -3175,6 +3227,10 @@ struct scan_req_params {
struct element_info extraie; struct element_info extraie;
struct element_info htcap; struct element_info htcap;
struct element_info vhtcap; struct element_info vhtcap;
u32 num_hint_s_ssid;
u32 num_hint_bssid;
struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID];
struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID];
}; };
struct wmi_ssid_arg { struct wmi_ssid_arg {
...@@ -3264,6 +3320,7 @@ struct wmi_bcn_send_from_host_cmd { ...@@ -3264,6 +3320,7 @@ struct wmi_bcn_send_from_host_cmd {
#define WMI_CHAN_INFO_QUARTER_RATE BIT(15) #define WMI_CHAN_INFO_QUARTER_RATE BIT(15)
#define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16)
#define WMI_CHAN_INFO_ALLOW_HE BIT(17) #define WMI_CHAN_INFO_ALLOW_HE BIT(17)
#define WMI_CHAN_INFO_PSC BIT(18)
#define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0)
#define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8)
...@@ -3444,6 +3501,7 @@ struct peer_assoc_params { ...@@ -3444,6 +3501,7 @@ struct peer_assoc_params {
u32 tx_max_rate; u32 tx_max_rate;
u32 tx_mcs_set; u32 tx_mcs_set;
u8 vht_capable; u8 vht_capable;
u8 min_data_rate;
u32 tx_max_mcs_nss; u32 tx_max_mcs_nss;
u32 peer_bw_rxnss_override; u32 peer_bw_rxnss_override;
bool is_pmf_enabled; bool is_pmf_enabled;
...@@ -3472,6 +3530,7 @@ struct peer_assoc_params { ...@@ -3472,6 +3530,7 @@ struct peer_assoc_params {
bool he_flag; bool he_flag;
u32 peer_he_cap_macinfo[2]; u32 peer_he_cap_macinfo[2];
u32 peer_he_cap_macinfo_internal; u32 peer_he_cap_macinfo_internal;
u32 peer_he_caps_6ghz;
u32 peer_he_ops; u32 peer_he_ops;
u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
u32 peer_he_mcs_count; u32 peer_he_mcs_count;
...@@ -3509,6 +3568,8 @@ struct wmi_peer_assoc_complete_cmd { ...@@ -3509,6 +3568,8 @@ struct wmi_peer_assoc_complete_cmd {
u32 peer_he_mcs; u32 peer_he_mcs;
u32 peer_he_cap_info_ext; u32 peer_he_cap_info_ext;
u32 peer_he_cap_info_internal; u32 peer_he_cap_info_internal;
u32 min_data_rate;
u32 peer_he_caps_6ghz;
} __packed; } __packed;
struct wmi_stop_scan_cmd { struct wmi_stop_scan_cmd {
...@@ -4228,6 +4289,7 @@ struct wmi_pdev_temperature_event { ...@@ -4228,6 +4289,7 @@ struct wmi_pdev_temperature_event {
#define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
struct mgmt_rx_event_params { struct mgmt_rx_event_params {
u32 chan_freq;
u32 channel; u32 channel;
u32 snr; u32 snr;
u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
...@@ -4257,6 +4319,7 @@ struct wmi_mgmt_rx_hdr { ...@@ -4257,6 +4319,7 @@ struct wmi_mgmt_rx_hdr {
u32 rx_tsf_l32; u32 rx_tsf_l32;
u32 rx_tsf_u32; u32 rx_tsf_u32;
u32 pdev_id; u32 pdev_id;
u32 chan_freq;
} __packed; } __packed;
#define MAX_ANTENNA_EIGHT 8 #define MAX_ANTENNA_EIGHT 8
...@@ -4734,6 +4797,117 @@ struct ath11k_wmi_pdev_lro_config_cmd { ...@@ -4734,6 +4797,117 @@ struct ath11k_wmi_pdev_lro_config_cmd {
u32 pdev_id; u32 pdev_id;
} __packed; } __packed;
#define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT 0
#define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT 224
#define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT 1
#define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
#define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT 1
#define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
#define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
#define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
#define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
#define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
#define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
#define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
#define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
#define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
#define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2
#define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
#define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
#define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1
struct ath11k_wmi_vdev_spectral_conf_param {
u32 vdev_id;
u32 scan_count;
u32 scan_period;
u32 scan_priority;
u32 scan_fft_size;
u32 scan_gc_ena;
u32 scan_restart_ena;
u32 scan_noise_floor_ref;
u32 scan_init_delay;
u32 scan_nb_tone_thr;
u32 scan_str_bin_thr;
u32 scan_wb_rpt_mode;
u32 scan_rssi_rpt_mode;
u32 scan_rssi_thr;
u32 scan_pwr_format;
u32 scan_rpt_mode;
u32 scan_bin_scale;
u32 scan_dbm_adj;
u32 scan_chn_mask;
} __packed;
struct ath11k_wmi_vdev_spectral_conf_cmd {
u32 tlv_header;
struct ath11k_wmi_vdev_spectral_conf_param param;
} __packed;
#define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
#define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
#define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
#define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
struct ath11k_wmi_vdev_spectral_enable_cmd {
u32 tlv_header;
u32 vdev_id;
u32 trigger_cmd;
u32 enable_cmd;
} __packed;
struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd {
u32 tlv_header;
u32 pdev_id;
u32 module_id; /* see enum wmi_direct_buffer_module */
u32 base_paddr_lo;
u32 base_paddr_hi;
u32 head_idx_paddr_lo;
u32 head_idx_paddr_hi;
u32 tail_idx_paddr_lo;
u32 tail_idx_paddr_hi;
u32 num_elems; /* Number of elems in the ring */
u32 buf_size; /* size of allocated buffer in bytes */
/* Number of wmi_dma_buf_release_entry packed together */
u32 num_resp_per_event;
/* Target should timeout and send whatever resp
* it has if this time expires, units in milliseconds
*/
u32 event_timeout_ms;
} __packed;
struct ath11k_wmi_dma_buf_release_fixed_param {
u32 pdev_id;
u32 module_id;
u32 num_buf_release_entry;
u32 num_meta_data_entry;
} __packed;
struct wmi_dma_buf_release_entry {
u32 tlv_header;
u32 paddr_lo;
/* Bits 11:0: address of data
* Bits 31:12: host context data
*/
u32 paddr_hi;
} __packed;
#define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0)
#define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16)
#define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0)
struct wmi_dma_buf_release_meta_data {
u32 tlv_header;
s32 noise_floor[WMI_MAX_CHAINS];
u32 reset_delay;
u32 freq1;
u32 freq2;
u32 ch_width;
} __packed;
struct target_resource_config { struct target_resource_config {
u32 num_vdevs; u32 num_vdevs;
u32 num_peers; u32 num_peers;
...@@ -4941,4 +5115,10 @@ int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id, ...@@ -4941,4 +5115,10 @@ int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id,
int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id, int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id,
bool enable); bool enable);
int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id); int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id);
int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar,
struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param);
int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id,
u32 trigger, u32 enable);
int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar,
struct ath11k_wmi_vdev_spectral_conf_param *param);
#endif #endif
...@@ -34,7 +34,7 @@ config ATH9K ...@@ -34,7 +34,7 @@ config ATH9K
APs that come with these cards refer to ath9k wiki APs that come with these cards refer to ath9k wiki
products page: products page:
http://wireless.kernel.org/en/users/Drivers/ath9k/products https://wireless.wiki.kernel.org/en/users/Drivers/ath9k/products
If you choose to build a module, it'll be called ath9k. If you choose to build a module, it'll be called ath9k.
...@@ -185,7 +185,8 @@ config ATH9K_HTC ...@@ -185,7 +185,8 @@ config ATH9K_HTC
Support for Atheros HTC based cards. Support for Atheros HTC based cards.
Chipsets supported: AR9271 Chipsets supported: AR9271
For more information: http://wireless.kernel.org/en/users/Drivers/ath9k_htc For more information:
https://wireless.wiki.kernel.org/en/users/Drivers/ath9k_htc
The built module will be ath9k_htc. The built module will be ath9k_htc.
......
...@@ -2410,7 +2410,7 @@ static u8 fixup_chainmask(u8 chip_chainmask, u8 eeprom_chainmask) ...@@ -2410,7 +2410,7 @@ static u8 fixup_chainmask(u8 chip_chainmask, u8 eeprom_chainmask)
* of tests. The testing requirements are going to be documented. Desired * of tests. The testing requirements are going to be documented. Desired
* test requirements are documented at: * test requirements are documented at:
* *
* http://wireless.kernel.org/en/users/Drivers/ath9k/dfs * https://wireless.wiki.kernel.org/en/users/Drivers/ath9k/dfs
* *
* Once a new chipset gets properly tested an individual commit can be used * Once a new chipset gets properly tested an individual commit can be used
* to document the testing for DFS for that chipset. * to document the testing for DFS for that chipset.
......
...@@ -10,7 +10,7 @@ config CARL9170 ...@@ -10,7 +10,7 @@ config CARL9170
It needs a special firmware (carl9170-1.fw), which can be downloaded It needs a special firmware (carl9170-1.fw), which can be downloaded
from our wiki here: from our wiki here:
<http://wireless.kernel.org/en/users/Drivers/carl9170> <https://wireless.wiki.kernel.org/en/users/Drivers/carl9170>
If you choose to build a module, it'll be called carl9170. If you choose to build a module, it'll be called carl9170.
......
...@@ -61,7 +61,7 @@ MODULE_ALIAS("arusb_lnx"); ...@@ -61,7 +61,7 @@ MODULE_ALIAS("arusb_lnx");
* Note: * Note:
* *
* Always update our wiki's device list (located at: * Always update our wiki's device list (located at:
* http://wireless.kernel.org/en/users/Drivers/ar9170/devices ), * https://wireless.wiki.kernel.org/en/users/Drivers/ar9170/devices ),
* whenever you add a new device. * whenever you add a new device.
*/ */
static const struct usb_device_id carl9170_usb_ids[] = { static const struct usb_device_id carl9170_usb_ids[] = {
......
...@@ -24,6 +24,7 @@ ...@@ -24,6 +24,7 @@
* could be acquired so far. * could be acquired so far.
*/ */
#define SPECTRAL_ATH10K_MAX_NUM_BINS 256 #define SPECTRAL_ATH10K_MAX_NUM_BINS 256
#define SPECTRAL_ATH11K_MAX_NUM_BINS 512
/* FFT sample format given to userspace via debugfs. /* FFT sample format given to userspace via debugfs.
* *
...@@ -37,6 +38,7 @@ enum ath_fft_sample_type { ...@@ -37,6 +38,7 @@ enum ath_fft_sample_type {
ATH_FFT_SAMPLE_HT20 = 1, ATH_FFT_SAMPLE_HT20 = 1,
ATH_FFT_SAMPLE_HT20_40, ATH_FFT_SAMPLE_HT20_40,
ATH_FFT_SAMPLE_ATH10K, ATH_FFT_SAMPLE_ATH10K,
ATH_FFT_SAMPLE_ATH11K
}; };
struct fft_sample_tlv { struct fft_sample_tlv {
...@@ -110,4 +112,19 @@ struct fft_sample_ath10k { ...@@ -110,4 +112,19 @@ struct fft_sample_ath10k {
u8 data[0]; u8 data[0];
} __packed; } __packed;
struct fft_sample_ath11k {
struct fft_sample_tlv tlv;
u8 chan_width_mhz;
s8 max_index;
u8 max_exp;
__be16 freq1;
__be16 freq2;
__be16 max_magnitude;
__be16 rssi;
__be32 tsf;
__be32 noise;
u8 data[0];
} __packed;
#endif /* SPECTRAL_COMMON_H */ #endif /* SPECTRAL_COMMON_H */
...@@ -10,7 +10,7 @@ config WIL6210 ...@@ -10,7 +10,7 @@ config WIL6210
wil6210 chip by Wilocity. It supports operation on the wil6210 chip by Wilocity. It supports operation on the
60 GHz band, covered by the IEEE802.11ad standard. 60 GHz band, covered by the IEEE802.11ad standard.
http://wireless.kernel.org/en/users/Drivers/wil6210 https://wireless.wiki.kernel.org/en/users/Drivers/wil6210
If you choose to build it as a module, it will be called If you choose to build it as a module, it will be called
wil6210 wil6210
......
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