Commit f6baff4d authored by Harry Wentland's avatar Harry Wentland Committed by Alex Deucher

drm/amd/display: Change comments to bring in line with internal tree

Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1ecfc3da
......@@ -1439,13 +1439,11 @@ static uint32_t get_max_pixel_clock_for_all_paths(
return max_pix_clk;
}
/* Find clock state based on clock requested. if clock value is 0, simply
/*
* Find clock state based on clock requested. if clock value is 0, simply
* set clock state as requested without finding clock state by clock value
*TODO: when dce120_hw_sequencer.c is created, override apply_min_clock.
*
* TODOFPGA remove TODO after implement dal_display_clock_get_cur_clocks_value
* etc support for dcn1.0
*/
static void apply_min_clocks(
struct dc *dc,
struct dc_state *context,
......
......@@ -372,7 +372,7 @@ static enum aux_channel_operation_result get_channel_status(
10, aux110->timeout_period/10);
/* Note that the following bits are set in 'status.bits'
* during CTS 4.2.1.2:
* during CTS 4.2.1.2 (FW 3.3.1):
* AUX_SW_RX_MIN_COUNT_VIOL, AUX_SW_RX_INVALID_STOP,
* AUX_SW_RX_RECV_NO_DET, AUX_SW_RX_RECV_INVALID_H.
*
......
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