Commit f7542d81 authored by Lucas Stach's avatar Lucas Stach Committed by Stephen Boyd

clk: imx6q: reset exclusive gates on init

The exclusive gates may be set up in the wrong way by software running
before the clock driver comes up. In that case the exclusive setup is
locked in its initial state, as the complementary function can't be
activated without disabling the initial setup first.

To avoid this lock situation, reset the exclusive gates to the off
state and allow the kernel to provide the proper setup.
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Reviewed-by: default avatarDong Aisheng <Aisheng.dong@nxp.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 65102238
...@@ -508,8 +508,12 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) ...@@ -508,8 +508,12 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
* lvds1_gate and lvds2_gate are pseudo-gates. Both can be * lvds1_gate and lvds2_gate are pseudo-gates. Both can be
* independently configured as clock inputs or outputs. We treat * independently configured as clock inputs or outputs. We treat
* the "output_enable" bit as a gate, even though it's really just * the "output_enable" bit as a gate, even though it's really just
* enabling clock output. * enabling clock output. Initially the gate bits are cleared, as
* otherwise the exclusive configuration gets locked in the setup done
* by software running before the clock driver, with no way to change
* it.
*/ */
writel(readl(base + 0x160) & ~0x3c00, base + 0x160);
clk[IMX6QDL_CLK_LVDS1_GATE] = imx_clk_gate_exclusive("lvds1_gate", "lvds1_sel", base + 0x160, 10, BIT(12)); clk[IMX6QDL_CLK_LVDS1_GATE] = imx_clk_gate_exclusive("lvds1_gate", "lvds1_sel", base + 0x160, 10, BIT(12));
clk[IMX6QDL_CLK_LVDS2_GATE] = imx_clk_gate_exclusive("lvds2_gate", "lvds2_sel", base + 0x160, 11, BIT(13)); clk[IMX6QDL_CLK_LVDS2_GATE] = imx_clk_gate_exclusive("lvds2_gate", "lvds2_sel", base + 0x160, 11, BIT(13));
......
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