Commit f761fae1 authored by Brice Goglin's avatar Brice Goglin Committed by Jeff Garzik

myri10ge: update wcfifo and intr_coal_delay default values

Update the default value of 2 module parameters:
* wcfifo disabled
* intr_coal_delay 75us
Signed-off-by: default avatarBrice Goglin <brice@myri.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent aafa70eb
...@@ -234,7 +234,7 @@ static int myri10ge_msi = 1; /* enable msi by default */ ...@@ -234,7 +234,7 @@ static int myri10ge_msi = 1; /* enable msi by default */
module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR); module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts\n"); MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts\n");
static int myri10ge_intr_coal_delay = 25; static int myri10ge_intr_coal_delay = 75;
module_param(myri10ge_intr_coal_delay, int, S_IRUGO); module_param(myri10ge_intr_coal_delay, int, S_IRUGO);
MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay\n"); MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay\n");
...@@ -279,7 +279,7 @@ static int myri10ge_fill_thresh = 256; ...@@ -279,7 +279,7 @@ static int myri10ge_fill_thresh = 256;
module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR); module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n"); MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n");
static int myri10ge_wcfifo = 1; static int myri10ge_wcfifo = 0;
module_param(myri10ge_wcfifo, int, S_IRUGO); module_param(myri10ge_wcfifo, int, S_IRUGO);
MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled\n"); MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled\n");
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment