Commit f76e9019 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Felix Fietkau

mt76: mt7921: fix stats register definitions

Fix register definitions for mac80211 stats reporting.
Move mib counter reset to mt7921_get_stats routine.

Fixes: 163f4d22 ("mt76: mt7921: add MAC support")
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent 8e848362
...@@ -1318,31 +1318,20 @@ mt7921_mac_update_mib_stats(struct mt7921_phy *phy) ...@@ -1318,31 +1318,20 @@ mt7921_mac_update_mib_stats(struct mt7921_phy *phy)
struct mib_stats *mib = &phy->mib; struct mib_stats *mib = &phy->mib;
int i, aggr0 = 0, aggr1; int i, aggr0 = 0, aggr1;
memset(mib, 0, sizeof(*mib)); mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(0),
mib->fcs_err_cnt = mt76_get_field(dev, MT_MIB_SDR3(0),
MT_MIB_SDR3_FCS_ERR_MASK); MT_MIB_SDR3_FCS_ERR_MASK);
mib->ack_fail_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR3(0),
MT_MIB_ACK_FAIL_COUNT_MASK);
mib->ba_miss_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR2(0),
MT_MIB_BA_FAIL_COUNT_MASK);
mib->rts_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR0(0),
MT_MIB_RTS_COUNT_MASK);
mib->rts_retries_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR1(0),
MT_MIB_RTS_FAIL_COUNT_MASK);
for (i = 0, aggr1 = aggr0 + 4; i < 4; i++) { for (i = 0, aggr1 = aggr0 + 4; i < 4; i++) {
u32 val, val2; u32 val, val2;
val = mt76_rr(dev, MT_MIB_MB_SDR1(0, i));
val2 = FIELD_GET(MT_MIB_ACK_FAIL_COUNT_MASK, val);
if (val2 > mib->ack_fail_cnt)
mib->ack_fail_cnt = val2;
val2 = FIELD_GET(MT_MIB_BA_MISS_COUNT_MASK, val);
if (val2 > mib->ba_miss_cnt)
mib->ba_miss_cnt = val2;
val = mt76_rr(dev, MT_MIB_MB_SDR0(0, i));
val2 = FIELD_GET(MT_MIB_RTS_RETRIES_COUNT_MASK, val);
if (val2 > mib->rts_retries_cnt) {
mib->rts_cnt = FIELD_GET(MT_MIB_RTS_COUNT_MASK, val);
mib->rts_retries_cnt = val2;
}
val = mt76_rr(dev, MT_TX_AGG_CNT(0, i)); val = mt76_rr(dev, MT_TX_AGG_CNT(0, i));
val2 = mt76_rr(dev, MT_TX_AGG_CNT2(0, i)); val2 = mt76_rr(dev, MT_TX_AGG_CNT2(0, i));
......
...@@ -831,11 +831,17 @@ mt7921_get_stats(struct ieee80211_hw *hw, ...@@ -831,11 +831,17 @@ mt7921_get_stats(struct ieee80211_hw *hw,
struct mt7921_phy *phy = mt7921_hw_phy(hw); struct mt7921_phy *phy = mt7921_hw_phy(hw);
struct mib_stats *mib = &phy->mib; struct mib_stats *mib = &phy->mib;
mt7921_mutex_acquire(phy->dev);
stats->dot11RTSSuccessCount = mib->rts_cnt; stats->dot11RTSSuccessCount = mib->rts_cnt;
stats->dot11RTSFailureCount = mib->rts_retries_cnt; stats->dot11RTSFailureCount = mib->rts_retries_cnt;
stats->dot11FCSErrorCount = mib->fcs_err_cnt; stats->dot11FCSErrorCount = mib->fcs_err_cnt;
stats->dot11ACKFailureCount = mib->ack_fail_cnt; stats->dot11ACKFailureCount = mib->ack_fail_cnt;
memset(mib, 0, sizeof(*mib));
mt7921_mutex_release(phy->dev);
return 0; return 0;
} }
......
...@@ -102,11 +102,11 @@ struct mt7921_vif { ...@@ -102,11 +102,11 @@ struct mt7921_vif {
}; };
struct mib_stats { struct mib_stats {
u16 ack_fail_cnt; u32 ack_fail_cnt;
u16 fcs_err_cnt; u32 fcs_err_cnt;
u16 rts_cnt; u32 rts_cnt;
u16 rts_retries_cnt; u32 rts_retries_cnt;
u16 ba_miss_cnt; u32 ba_miss_cnt;
}; };
struct mt7921_phy { struct mt7921_phy {
......
...@@ -96,8 +96,8 @@ ...@@ -96,8 +96,8 @@
#define MT_WF_MIB_BASE(_band) ((_band) ? 0xa4800 : 0x24800) #define MT_WF_MIB_BASE(_band) ((_band) ? 0xa4800 : 0x24800)
#define MT_WF_MIB(_band, ofs) (MT_WF_MIB_BASE(_band) + (ofs)) #define MT_WF_MIB(_band, ofs) (MT_WF_MIB_BASE(_band) + (ofs))
#define MT_MIB_SDR3(_band) MT_WF_MIB(_band, 0x014) #define MT_MIB_SDR3(_band) MT_WF_MIB(_band, 0x698)
#define MT_MIB_SDR3_FCS_ERR_MASK GENMASK(15, 0) #define MT_MIB_SDR3_FCS_ERR_MASK GENMASK(31, 16)
#define MT_MIB_SDR9(_band) MT_WF_MIB(_band, 0x02c) #define MT_MIB_SDR9(_band) MT_WF_MIB(_band, 0x02c)
#define MT_MIB_SDR9_BUSY_MASK GENMASK(23, 0) #define MT_MIB_SDR9_BUSY_MASK GENMASK(23, 0)
...@@ -121,9 +121,14 @@ ...@@ -121,9 +121,14 @@
#define MT_MIB_RTS_RETRIES_COUNT_MASK GENMASK(31, 16) #define MT_MIB_RTS_RETRIES_COUNT_MASK GENMASK(31, 16)
#define MT_MIB_RTS_COUNT_MASK GENMASK(15, 0) #define MT_MIB_RTS_COUNT_MASK GENMASK(15, 0)
#define MT_MIB_MB_SDR1(_band, n) MT_WF_MIB(_band, 0x104 + ((n) << 4)) #define MT_MIB_MB_BSDR0(_band) MT_WF_MIB(_band, 0x688)
#define MT_MIB_BA_MISS_COUNT_MASK GENMASK(15, 0) #define MT_MIB_RTS_COUNT_MASK GENMASK(15, 0)
#define MT_MIB_ACK_FAIL_COUNT_MASK GENMASK(31, 16) #define MT_MIB_MB_BSDR1(_band) MT_WF_MIB(_band, 0x690)
#define MT_MIB_RTS_FAIL_COUNT_MASK GENMASK(15, 0)
#define MT_MIB_MB_BSDR2(_band) MT_WF_MIB(_band, 0x518)
#define MT_MIB_BA_FAIL_COUNT_MASK GENMASK(15, 0)
#define MT_MIB_MB_BSDR3(_band) MT_WF_MIB(_band, 0x520)
#define MT_MIB_ACK_FAIL_COUNT_MASK GENMASK(15, 0)
#define MT_MIB_MB_SDR2(_band, n) MT_WF_MIB(_band, 0x108 + ((n) << 4)) #define MT_MIB_MB_SDR2(_band, n) MT_WF_MIB(_band, 0x108 + ((n) << 4))
#define MT_MIB_FRAME_RETRIES_COUNT_MASK GENMASK(15, 0) #define MT_MIB_FRAME_RETRIES_COUNT_MASK GENMASK(15, 0)
......
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