Commit f81d7af7 authored by Shawn Guo's avatar Shawn Guo

arm64: dts: fsl: fix ifc simple-bus unit address format warnings

It fixes LS family SoCs device tree dtc warning in IFC child nodes.

Warning (simple_bus_reg): Node /soc/ifc@1530000/nor@0,0 simple-bus unit address format error, expected "0"
Warning (simple_bus_reg): Node /soc/ifc@1530000/nand@1,0 simple-bus unit address format error, expected "100000000"
Warning (simple_bus_reg): Node /soc/ifc@1530000/board-control@2,0 simple-bus unit address format error, expected "200000000"
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 69ea29b0
...@@ -84,19 +84,19 @@ &ifc { ...@@ -84,19 +84,19 @@ &ifc {
0x2 0x0 0x0 0x7fb00000 0x00000100>; 0x2 0x0 0x0 0x7fb00000 0x00000100>;
status = "okay"; status = "okay";
nor@0,0 { nor@0 {
compatible = "cfi-flash"; compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>; reg = <0x0 0x0 0x8000000>;
bank-width = <2>; bank-width = <2>;
device-width = <1>; device-width = <1>;
}; };
nand@1,0 { nand@100000000 {
compatible = "fsl,ifc-nand"; compatible = "fsl,ifc-nand";
reg = <0x1 0x0 0x10000>; reg = <0x1 0x0 0x10000>;
}; };
fpga: board-control@2,0 { fpga: board-control@200000000 {
compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis"; compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
reg = <0x2 0x0 0x0000100>; reg = <0x2 0x0 0x0000100>;
}; };
......
...@@ -97,7 +97,7 @@ &ifc { ...@@ -97,7 +97,7 @@ &ifc {
0x1 0x0 0x0 0x7e800000 0x00010000 0x1 0x0 0x0 0x7e800000 0x00010000
0x2 0x0 0x0 0x7fb00000 0x00000100>; 0x2 0x0 0x0 0x7fb00000 0x00000100>;
nor@0,0 { nor@0 {
compatible = "cfi-flash"; compatible = "cfi-flash";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -106,14 +106,14 @@ nor@0,0 { ...@@ -106,14 +106,14 @@ nor@0,0 {
device-width = <1>; device-width = <1>;
}; };
nand@1,0 { nand@100000000 {
compatible = "fsl,ifc-nand"; compatible = "fsl,ifc-nand";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0x1 0x0 0x10000>; reg = <0x1 0x0 0x10000>;
}; };
cpld: board-control@2,0 { cpld: board-control@200000000 {
compatible = "fsl,ls1043ardb-cpld"; compatible = "fsl,ls1043ardb-cpld";
reg = <0x2 0x0 0x0000100>; reg = <0x2 0x0 0x0000100>;
}; };
......
...@@ -175,19 +175,19 @@ &ifc { ...@@ -175,19 +175,19 @@ &ifc {
0x2 0x0 0x0 0x7fb00000 0x00000100>; 0x2 0x0 0x0 0x7fb00000 0x00000100>;
status = "okay"; status = "okay";
nor@0,0 { nor@0 {
compatible = "cfi-flash"; compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>; reg = <0x0 0x0 0x8000000>;
bank-width = <2>; bank-width = <2>;
device-width = <1>; device-width = <1>;
}; };
nand@1,0 { nand@100000000 {
compatible = "fsl,ifc-nand"; compatible = "fsl,ifc-nand";
reg = <0x1 0x0 0x10000>; reg = <0x1 0x0 0x10000>;
}; };
fpga: board-control@2,0 { fpga: board-control@200000000 {
compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis"; compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis";
reg = <0x2 0x0 0x0000100>; reg = <0x2 0x0 0x0000100>;
}; };
......
...@@ -122,14 +122,14 @@ &ifc { ...@@ -122,14 +122,14 @@ &ifc {
0x2 0x0 0x0 0x7fb00000 0x00000100>; 0x2 0x0 0x0 0x7fb00000 0x00000100>;
status = "okay"; status = "okay";
nand@0,0 { nand@0 {
compatible = "fsl,ifc-nand"; compatible = "fsl,ifc-nand";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0x0 0x0 0x10000>; reg = <0x0 0x0 0x10000>;
}; };
cpld: board-control@2,0 { cpld: board-control@200000000 {
compatible = "fsl,ls1046ardb-cpld"; compatible = "fsl,ls1046ardb-cpld";
reg = <0x2 0x0 0x0000100>; reg = <0x2 0x0 0x0000100>;
}; };
......
...@@ -116,19 +116,19 @@ &ifc { ...@@ -116,19 +116,19 @@ &ifc {
3 0 0x5 0x20000000 0x00010000>; 3 0 0x5 0x20000000 0x00010000>;
status = "okay"; status = "okay";
nor@0,0 { nor@0 {
compatible = "cfi-flash"; compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>; reg = <0x0 0x0 0x8000000>;
bank-width = <2>; bank-width = <2>;
device-width = <1>; device-width = <1>;
}; };
nand@2,0 { nand@200000000 {
compatible = "fsl,ifc-nand"; compatible = "fsl,ifc-nand";
reg = <0x2 0x0 0x10000>; reg = <0x2 0x0 0x10000>;
}; };
fpga: board-control@3,0 { fpga: board-control@300000000 {
compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis"; compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
reg = <0x3 0x0 0x0000100>; reg = <0x3 0x0 0x0000100>;
}; };
......
...@@ -99,12 +99,12 @@ &ifc { ...@@ -99,12 +99,12 @@ &ifc {
2 0 0x5 0x20000000 0x00010000>; 2 0 0x5 0x20000000 0x00010000>;
status = "okay"; status = "okay";
nand@0,0 { nand@0 {
compatible = "fsl,ifc-nand"; compatible = "fsl,ifc-nand";
reg = <0x0 0x0 0x10000>; reg = <0x0 0x0 0x10000>;
}; };
fpga: board-control@2,0 { fpga: board-control@200000000 {
compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis"; compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
reg = <0x2 0x0 0x0000100>; reg = <0x2 0x0 0x0000100>;
}; };
......
...@@ -58,7 +58,7 @@ &ifc { ...@@ -58,7 +58,7 @@ &ifc {
0x2 0x0 0x5 0x30000000 0x00010000 0x2 0x0 0x5 0x30000000 0x00010000
0x3 0x0 0x5 0x20000000 0x00010000>; 0x3 0x0 0x5 0x20000000 0x00010000>;
nor@0,0 { nor@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "cfi-flash"; compatible = "cfi-flash";
...@@ -67,12 +67,12 @@ nor@0,0 { ...@@ -67,12 +67,12 @@ nor@0,0 {
device-width = <1>; device-width = <1>;
}; };
nand@2,0 { nand@200000000 {
compatible = "fsl,ifc-nand"; compatible = "fsl,ifc-nand";
reg = <0x2 0x0 0x10000>; reg = <0x2 0x0 0x10000>;
}; };
cpld@3,0 { cpld@300000000 {
reg = <0x3 0x0 0x10000>; reg = <0x3 0x0 0x10000>;
compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis"; compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
}; };
......
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