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Commit f92363d1 authored by Sreekanth Reddy's avatar Sreekanth Reddy Committed by James Bottomley
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[SCSI] mpt3sas: add new driver supporting 12GB SAS 

These driver files are initially, substantially similar to mpt2sas but,
because mpt2sas is going into maintenance mode and mp3sas will become heavily
developed, we elected to keep the code bases separate.
Signed-off-by: default avatarSreekanth Reddy <Sreekanth.Reddy@lsi.com>
Reviewed-by: default avatarNagalakshmi Nandigama <Nagalakshmi.Nandigama@lsi.com>
Signed-off-by: default avatarJames Bottomley <JBottomley@Parallels.com>
parent d84fd392
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drivers/scsi/Kconfig
View file @ f92363d1
......@@ -603,6 +603,7 @@ config SCSI_ARCMSR
source "drivers/scsi/megaraid/Kconfig.megaraid"
source "drivers/scsi/mpt2sas/Kconfig"
source "drivers/scsi/mpt3sas/Kconfig"
source "drivers/scsi/ufs/Kconfig"
config SCSI_HPTIOP
......
drivers/scsi/Makefile
View file @ f92363d1
......@@ -107,6 +107,7 @@ obj-$(CONFIG_MEGARAID_LEGACY) += megaraid.o
obj-$(CONFIG_MEGARAID_NEWGEN) += megaraid/
obj-$(CONFIG_MEGARAID_SAS) += megaraid/
obj-$(CONFIG_SCSI_MPT2SAS) += mpt2sas/
obj-$(CONFIG_SCSI_MPT3SAS) += mpt3sas/
obj-$(CONFIG_SCSI_UFSHCD) += ufs/
obj-$(CONFIG_SCSI_ACARD) += atp870u.o
obj-$(CONFIG_SCSI_SUNESP) += esp_scsi.o sun_esp.o
......
drivers/scsi/mpt3sas/Kconfig 0 → 100644
View file @ f92363d1
#
# Kernel configuration file for the MPT3SAS
#
# This code is based on drivers/scsi/mpt3sas/Kconfig
# Copyright (C) 2012 LSI Corporation
# (mailto:DL-MPTFusionLinux@lsi.com)
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
# NO WARRANTY
# THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
# LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
# MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
# solely responsible for determining the appropriateness of using and
# distributing the Program and assumes all risks associated with its
# exercise of rights under this Agreement, including but not limited to
# the risks and costs of program errors, damage to or loss of data,
# programs or equipment, and unavailability or interruption of operations.
# DISCLAIMER OF LIABILITY
# NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
# USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
# HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
# USA.
config SCSI_MPT3SAS
tristate "LSI MPT Fusion SAS 3.0 Device Driver"
depends on PCI && SCSI
select SCSI_SAS_ATTRS
select RAID_ATTRS
---help---
This driver supports PCI-Express SAS 12Gb/s Host Adapters.
config SCSI_MPT3SAS_MAX_SGE
int "LSI MPT Fusion Max number of SG Entries (16 - 256)"
depends on PCI && SCSI && SCSI_MPT3SAS
default "128"
range 16 256
---help---
This option allows you to specify the maximum number of scatter-
gather entries per I/O. The driver default is 128, which matches
MAX_PHYS_SEGMENTS in most kernels. However in SuSE kernels this
can be 256. However, it may decreased down to 16. Decreasing this
parameter will reduce memory requirements on a per controller instance.
config SCSI_MPT3SAS_LOGGING
bool "LSI MPT Fusion logging facility"
depends on PCI && SCSI && SCSI_MPT3SAS
---help---
This turns on a logging facility.
drivers/scsi/mpt3sas/Makefile 0 → 100644
View file @ f92363d1
# mpt3sas makefile
obj-m += mpt3sas.o
mpt3sas-y += mpt3sas_base.o \
mpt3sas_config.o \
mpt3sas_scsih.o \
mpt3sas_transport.o \
mpt3sas_ctl.o \
mpt3sas_trigger_diag.o
drivers/scsi/mpt3sas/mpi/mpi2.h 0 → 100644
View file @ f92363d1
/*
* Copyright (c) 2000-2012 LSI Corporation.
*
*
* Name: mpi2.h
* Title: MPI Message independent structures and definitions
* including System Interface Register Set and
* scatter/gather formats.
* Creation Date: June 21, 2006
*
* mpi2.h Version: 02.00.26
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
* 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
* Moved ReplyPostHostIndex register to offset 0x6C of the
* MPI2_SYSTEM_INTERFACE_REGS and modified the define for
* MPI2_REPLY_POST_HOST_INDEX_OFFSET.
* Added union of request descriptors.
* Added union of reply descriptors.
* 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
* Added define for MPI2_VERSION_02_00.
* Fixed the size of the FunctionDependent5 field in the
* MPI2_DEFAULT_REPLY structure.
* 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
* Removed the MPI-defined Fault Codes and extended the
* product specific codes up to 0xEFFF.
* Added a sixth key value for the WriteSequence register
* and changed the flush value to 0x0.
* Added message function codes for Diagnostic Buffer Post
* and Diagnsotic Release.
* New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
* Moved MPI2_VERSION_UNION from mpi2_ioc.h.
* 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
* 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
* Added #defines for marking a reply descriptor as unused.
* 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
* 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
* Moved LUN field defines from mpi2_init.h.
* 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT.
* In all request and reply descriptors, replaced VF_ID
* field with MSIxIndex field.
* Removed DevHandle field from
* MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
* bytes reserved.
* Added RAID Accelerator functionality.
* 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
* 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MSI-x index mask and shift for Reply Post Host
* Index register.
* Added function code for Host Based Discovery Action.
* 02-10-10 02.00.15 Bumped MPI2_HEADER_VERSION_UNIT.
* Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL.
* Added defines for product-specific range of message
* function codes, 0xF0 to 0xFF.
* 05-12-10 02.00.16 Bumped MPI2_HEADER_VERSION_UNIT.
* Added alternative defines for the SGE Direction bit.
* 08-11-10 02.00.17 Bumped MPI2_HEADER_VERSION_UNIT.
* 11-10-10 02.00.18 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR define.
* 02-23-11 02.00.19 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MPI2_FUNCTION_SEND_HOST_MESSAGE.
* 03-09-11 02.00.20 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-25-11 02.00.21 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-24-11 02.00.22 Bumped MPI2_HEADER_VERSION_UNIT.
* 11-18-11 02.00.23 Bumped MPI2_HEADER_VERSION_UNIT.
* Incorporating additions for MPI v2.5.
* 02-06-12 02.00.24 Bumped MPI2_HEADER_VERSION_UNIT.
* 03-29-12 02.00.25 Bumped MPI2_HEADER_VERSION_UNIT.
* Added Hard Reset delay timings.
* 07-10-12 02.00.26 Bumped MPI2_HEADER_VERSION_UNIT.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_H
#define MPI2_H
/*****************************************************************************
*
* MPI Version Definitions
*
*****************************************************************************/
#define MPI2_VERSION_MAJOR_MASK (0xFF00)
#define MPI2_VERSION_MAJOR_SHIFT (8)
#define MPI2_VERSION_MINOR_MASK (0x00FF)
#define MPI2_VERSION_MINOR_SHIFT (0)
/*major version for all MPI v2.x */
#define MPI2_VERSION_MAJOR (0x02)
/*minor version for MPI v2.0 compatible products */
#define MPI2_VERSION_MINOR (0x00)
#define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
MPI2_VERSION_MINOR)
#define MPI2_VERSION_02_00 (0x0200)
/*minor version for MPI v2.5 compatible products */
#define MPI25_VERSION_MINOR (0x05)
#define MPI25_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
MPI25_VERSION_MINOR)
#define MPI2_VERSION_02_05 (0x0205)
/*Unit and Dev versioning for this MPI header set */
#define MPI2_HEADER_VERSION_UNIT (0x1A)
#define MPI2_HEADER_VERSION_DEV (0x00)
#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
#define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
#define MPI2_HEADER_VERSION_DEV_MASK (0x00FF)
#define MPI2_HEADER_VERSION_DEV_SHIFT (0)
#define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | \
MPI2_HEADER_VERSION_DEV)
/*****************************************************************************
*
* IOC State Definitions
*
*****************************************************************************/
#define MPI2_IOC_STATE_RESET (0x00000000)
#define MPI2_IOC_STATE_READY (0x10000000)
#define MPI2_IOC_STATE_OPERATIONAL (0x20000000)
#define MPI2_IOC_STATE_FAULT (0x40000000)
#define MPI2_IOC_STATE_MASK (0xF0000000)
#define MPI2_IOC_STATE_SHIFT (28)
/*Fault state range for prodcut specific codes */
#define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000)
#define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF)
/*****************************************************************************
*
* System Interface Register Definitions
*
*****************************************************************************/
typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS {
U32 Doorbell; /*0x00 */
U32 WriteSequence; /*0x04 */
U32 HostDiagnostic; /*0x08 */
U32 Reserved1; /*0x0C */
U32 DiagRWData; /*0x10 */
U32 DiagRWAddressLow; /*0x14 */
U32 DiagRWAddressHigh; /*0x18 */
U32 Reserved2[5]; /*0x1C */
U32 HostInterruptStatus; /*0x30 */
U32 HostInterruptMask; /*0x34 */
U32 DCRData; /*0x38 */
U32 DCRAddress; /*0x3C */
U32 Reserved3[2]; /*0x40 */
U32 ReplyFreeHostIndex; /*0x48 */
U32 Reserved4[8]; /*0x4C */
U32 ReplyPostHostIndex; /*0x6C */
U32 Reserved5; /*0x70 */
U32 HCBSize; /*0x74 */
U32 HCBAddressLow; /*0x78 */
U32 HCBAddressHigh; /*0x7C */
U32 Reserved6[16]; /*0x80 */
U32 RequestDescriptorPostLow; /*0xC0 */
U32 RequestDescriptorPostHigh; /*0xC4 */
U32 Reserved7[14]; /*0xC8 */
} MPI2_SYSTEM_INTERFACE_REGS,
*PTR_MPI2_SYSTEM_INTERFACE_REGS,
Mpi2SystemInterfaceRegs_t,
*pMpi2SystemInterfaceRegs_t;
/*
*Defines for working with the Doorbell register.
*/
#define MPI2_DOORBELL_OFFSET (0x00000000)
/*IOC --> System values */
#define MPI2_DOORBELL_USED (0x08000000)
#define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000)
#define MPI2_DOORBELL_WHO_INIT_SHIFT (24)
#define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF)
#define MPI2_DOORBELL_DATA_MASK (0x0000FFFF)
/*System --> IOC values */
#define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000)
#define MPI2_DOORBELL_FUNCTION_SHIFT (24)
#define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
#define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16)
/*
*Defines for the WriteSequence register
*/
#define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004)
#define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F)
#define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0)
#define MPI2_WRSEQ_1ST_KEY_VALUE (0xF)
#define MPI2_WRSEQ_2ND_KEY_VALUE (0x4)
#define MPI2_WRSEQ_3RD_KEY_VALUE (0xB)
#define MPI2_WRSEQ_4TH_KEY_VALUE (0x2)
#define MPI2_WRSEQ_5TH_KEY_VALUE (0x7)
#define MPI2_WRSEQ_6TH_KEY_VALUE (0xD)
/*
*Defines for the HostDiagnostic register
*/
#define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800)
#define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
#define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200)
#define MPI2_DIAG_HCB_MODE (0x00000100)
#define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080)
#define MPI2_DIAG_FLASH_BAD_SIG (0x00000040)
#define MPI2_DIAG_RESET_HISTORY (0x00000020)
#define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010)
#define MPI2_DIAG_RESET_ADAPTER (0x00000004)
#define MPI2_DIAG_HOLD_IOC_RESET (0x00000002)
/*
*Offsets for DiagRWData and address
*/
#define MPI2_DIAG_RW_DATA_OFFSET (0x00000010)
#define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014)
#define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018)
/*
*Defines for the HostInterruptStatus register
*/
#define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
#define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000)
#define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS
#define MPI2_HIS_RESET_IRQ_STATUS (0x40000000)
#define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008)
#define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001)
#define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS
/*
*Defines for the HostInterruptMask register
*/
#define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
#define MPI2_HIM_RESET_IRQ_MASK (0x40000000)
#define MPI2_HIM_REPLY_INT_MASK (0x00000008)
#define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK
#define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001)
#define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK
/*
*Offsets for DCRData and address
*/
#define MPI2_DCR_DATA_OFFSET (0x00000038)
#define MPI2_DCR_ADDRESS_OFFSET (0x0000003C)
/*
*Offset for the Reply Free Queue
*/
#define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048)
/*
*Defines for the Reply Descriptor Post Queue
*/
#define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C)
#define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF)
#define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000)
#define MPI2_RPHI_MSIX_INDEX_SHIFT (24)
/*
*Defines for the HCBSize and address
*/
#define MPI2_HCB_SIZE_OFFSET (0x00000074)
#define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000)
#define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001)
#define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078)
#define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C)
/*
*Offsets for the Request Queue
*/
#define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0)
#define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4)
/*Hard Reset delay timings */
#define MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC (50000)
#define MPI2_HARD_RESET_PCIE_RESET_READ_WINDOW_MICRO_SEC (255000)
#define MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC (256000)
/*****************************************************************************
*
* Message Descriptors
*
*****************************************************************************/
/*Request Descriptors */
/*Default Request Descriptor */
typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR {
U8 RequestFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U16 SMID; /*0x02 */
U16 LMID; /*0x04 */
U16 DescriptorTypeDependent; /*0x06 */
} MPI2_DEFAULT_REQUEST_DESCRIPTOR,
*PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR,
Mpi2DefaultRequestDescriptor_t,
*pMpi2DefaultRequestDescriptor_t;
/*defines for the RequestFlags field */
#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02)
#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
#define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08)
#define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A)
#define MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO (0x0C)
#define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
/*High Priority Request Descriptor */
typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR {
U8 RequestFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U16 SMID; /*0x02 */
U16 LMID; /*0x04 */
U16 Reserved1; /*0x06 */
} MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
*PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
Mpi2HighPriorityRequestDescriptor_t,
*pMpi2HighPriorityRequestDescriptor_t;
/*SCSI IO Request Descriptor */
typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR {
U8 RequestFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U16 SMID; /*0x02 */
U16 LMID; /*0x04 */
U16 DevHandle; /*0x06 */
} MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
*PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
Mpi2SCSIIORequestDescriptor_t,
*pMpi2SCSIIORequestDescriptor_t;
/*SCSI Target Request Descriptor */
typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR {
U8 RequestFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U16 SMID; /*0x02 */
U16 LMID; /*0x04 */
U16 IoIndex; /*0x06 */
} MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
*PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
Mpi2SCSITargetRequestDescriptor_t,
*pMpi2SCSITargetRequestDescriptor_t;
/*RAID Accelerator Request Descriptor */
typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR {
U8 RequestFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U16 SMID; /*0x02 */
U16 LMID; /*0x04 */
U16 Reserved; /*0x06 */
} MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
*PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
Mpi2RAIDAcceleratorRequestDescriptor_t,
*pMpi2RAIDAcceleratorRequestDescriptor_t;
/*Fast Path SCSI IO Request Descriptor */
typedef MPI2_SCSI_IO_REQUEST_DESCRIPTOR
MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR,
*PTR_MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR,
Mpi25FastPathSCSIIORequestDescriptor_t,
*pMpi25FastPathSCSIIORequestDescriptor_t;
/*union of Request Descriptors */
typedef union _MPI2_REQUEST_DESCRIPTOR_UNION {
MPI2_DEFAULT_REQUEST_DESCRIPTOR Default;
MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority;
MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO;
MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget;
MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator;
MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR FastPathSCSIIO;
U64 Words;
} MPI2_REQUEST_DESCRIPTOR_UNION,
*PTR_MPI2_REQUEST_DESCRIPTOR_UNION,
Mpi2RequestDescriptorUnion_t,
*pMpi2RequestDescriptorUnion_t;
/*Reply Descriptors */
/*Default Reply Descriptor */
typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR {
U8 ReplyFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U16 DescriptorTypeDependent1; /*0x02 */
U32 DescriptorTypeDependent2; /*0x04 */
} MPI2_DEFAULT_REPLY_DESCRIPTOR,
*PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR,
Mpi2DefaultReplyDescriptor_t,
*pMpi2DefaultReplyDescriptor_t;
/*defines for the ReplyFlags field */
#define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F)
#define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00)
#define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01)
#define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02)
#define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03)
#define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS (0x05)
#define MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS (0x06)
#define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F)
/*values for marking a reply descriptor as unused */
#define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF)
#define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF)
/*Address Reply Descriptor */
typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR {
U8 ReplyFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U16 SMID; /*0x02 */
U32 ReplyFrameAddress; /*0x04 */
} MPI2_ADDRESS_REPLY_DESCRIPTOR,
*PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR,
Mpi2AddressReplyDescriptor_t,
*pMpi2AddressReplyDescriptor_t;
#define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00)
/*SCSI IO Success Reply Descriptor */
typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR {
U8 ReplyFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U16 SMID; /*0x02 */
U16 TaskTag; /*0x04 */
U16 Reserved1; /*0x06 */
} MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
*PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
Mpi2SCSIIOSuccessReplyDescriptor_t,
*pMpi2SCSIIOSuccessReplyDescriptor_t;
/*TargetAssist Success Reply Descriptor */
typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR {
U8 ReplyFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U16 SMID; /*0x02 */
U8 SequenceNumber; /*0x04 */
U8 Reserved1; /*0x05 */
U16 IoIndex; /*0x06 */
} MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
*PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
Mpi2TargetAssistSuccessReplyDescriptor_t,
*pMpi2TargetAssistSuccessReplyDescriptor_t;
/*Target Command Buffer Reply Descriptor */
typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR {
U8 ReplyFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U8 VP_ID; /*0x02 */
U8 Flags; /*0x03 */
U16 InitiatorDevHandle; /*0x04 */
U16 IoIndex; /*0x06 */
} MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
*PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
Mpi2TargetCommandBufferReplyDescriptor_t,
*pMpi2TargetCommandBufferReplyDescriptor_t;
/*defines for Flags field */
#define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F)
/*RAID Accelerator Success Reply Descriptor */
typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR {
U8 ReplyFlags; /*0x00 */
U8 MSIxIndex; /*0x01 */
U16 SMID; /*0x02 */
U32 Reserved; /*0x04 */
} MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
*PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
Mpi2RAIDAcceleratorSuccessReplyDescriptor_t,
*pMpi2RAIDAcceleratorSuccessReplyDescriptor_t;
/*Fast Path SCSI IO Success Reply Descriptor */
typedef MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
*PTR_MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
Mpi25FastPathSCSIIOSuccessReplyDescriptor_t,
*pMpi25FastPathSCSIIOSuccessReplyDescriptor_t;
/*union of Reply Descriptors */
typedef union _MPI2_REPLY_DESCRIPTORS_UNION {
MPI2_DEFAULT_REPLY_DESCRIPTOR Default;
MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply;
MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess;
MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess;
MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer;
MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR RAIDAcceleratorSuccess;
MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR FastPathSCSIIOSuccess;
U64 Words;
} MPI2_REPLY_DESCRIPTORS_UNION,
*PTR_MPI2_REPLY_DESCRIPTORS_UNION,
Mpi2ReplyDescriptorsUnion_t,
*pMpi2ReplyDescriptorsUnion_t;
/*****************************************************************************
*
* Message Functions
*
*****************************************************************************/
#define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00)
#define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01)
#define MPI2_FUNCTION_IOC_INIT (0x02)
#define MPI2_FUNCTION_IOC_FACTS (0x03)
#define MPI2_FUNCTION_CONFIG (0x04)
#define MPI2_FUNCTION_PORT_FACTS (0x05)
#define MPI2_FUNCTION_PORT_ENABLE (0x06)
#define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07)
#define MPI2_FUNCTION_EVENT_ACK (0x08)
#define MPI2_FUNCTION_FW_DOWNLOAD (0x09)
#define MPI2_FUNCTION_TARGET_ASSIST (0x0B)
#define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C)
#define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D)
#define MPI2_FUNCTION_FW_UPLOAD (0x12)
#define MPI2_FUNCTION_RAID_ACTION (0x15)
#define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16)
#define MPI2_FUNCTION_TOOLBOX (0x17)
#define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18)
#define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A)
#define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B)
#define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C)
#define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D)
#define MPI2_FUNCTION_DIAG_RELEASE (0x1E)
#define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24)
#define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25)
#define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C)
#define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F)
#define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30)
#define MPI2_FUNCTION_SEND_HOST_MESSAGE (0x31)
#define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC (0xF0)
#define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC (0xFF)
/*Doorbell functions */
#define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
#define MPI2_FUNCTION_HANDSHAKE (0x42)
/*****************************************************************************
*
* IOC Status Values
*
*****************************************************************************/
/*mask for IOCStatus status value */
#define MPI2_IOCSTATUS_MASK (0x7FFF)
/****************************************************************************
* Common IOCStatus values for all replies
****************************************************************************/
#define MPI2_IOCSTATUS_SUCCESS (0x0000)
#define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001)
#define MPI2_IOCSTATUS_BUSY (0x0002)
#define MPI2_IOCSTATUS_INVALID_SGL (0x0003)
#define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004)
#define MPI2_IOCSTATUS_INVALID_VPID (0x0005)
#define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
#define MPI2_IOCSTATUS_INVALID_FIELD (0x0007)
#define MPI2_IOCSTATUS_INVALID_STATE (0x0008)
#define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
/****************************************************************************
* Config IOCStatus values
****************************************************************************/
#define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
#define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
#define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
#define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
#define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
#define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
/****************************************************************************
* SCSI IO Reply
****************************************************************************/
#define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
#define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042)
#define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
#define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
#define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
#define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
#define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
#define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
#define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
#define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
#define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
#define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
/****************************************************************************
* For use by SCSI Initiator and SCSI Target end-to-end data protection
****************************************************************************/
#define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
#define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
#define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
/****************************************************************************
* SCSI Target values
****************************************************************************/
#define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
#define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063)
#define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
#define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
#define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
#define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
#define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
#define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
#define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070)
#define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071)
/****************************************************************************
* Serial Attached SCSI values
****************************************************************************/
#define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
#define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
/****************************************************************************
* Diagnostic Buffer Post / Diagnostic Release values
****************************************************************************/
#define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
/****************************************************************************
* RAID Accelerator values
****************************************************************************/
#define MPI2_IOCSTATUS_RAID_ACCEL_ERROR (0x00B0)
/****************************************************************************
* IOCStatus flag to indicate that log info is available
****************************************************************************/
#define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
/****************************************************************************
* IOCLogInfo Types
****************************************************************************/
#define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000)
#define MPI2_IOCLOGINFO_TYPE_SHIFT (28)
#define MPI2_IOCLOGINFO_TYPE_NONE (0x0)
#define MPI2_IOCLOGINFO_TYPE_SCSI (0x1)
#define MPI2_IOCLOGINFO_TYPE_FC (0x2)
#define MPI2_IOCLOGINFO_TYPE_SAS (0x3)
#define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4)
#define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
/*****************************************************************************
*
* Standard Message Structures
*
*****************************************************************************/
/****************************************************************************
*Request Message Header for all request messages
****************************************************************************/
typedef struct _MPI2_REQUEST_HEADER {
U16 FunctionDependent1; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 FunctionDependent2; /*0x04 */
U8 FunctionDependent3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved1; /*0x0A */
} MPI2_REQUEST_HEADER, *PTR_MPI2_REQUEST_HEADER,
MPI2RequestHeader_t, *pMPI2RequestHeader_t;
/****************************************************************************
* Default Reply
****************************************************************************/
typedef struct _MPI2_DEFAULT_REPLY {
U16 FunctionDependent1; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 FunctionDependent2; /*0x04 */
U8 FunctionDependent3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved1; /*0x0A */
U16 FunctionDependent5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
} MPI2_DEFAULT_REPLY, *PTR_MPI2_DEFAULT_REPLY,
MPI2DefaultReply_t, *pMPI2DefaultReply_t;
/*common version structure/union used in messages and configuration pages */
typedef struct _MPI2_VERSION_STRUCT {
U8 Dev; /*0x00 */
U8 Unit; /*0x01 */
U8 Minor; /*0x02 */
U8 Major; /*0x03 */
} MPI2_VERSION_STRUCT;
typedef union _MPI2_VERSION_UNION {
MPI2_VERSION_STRUCT Struct;
U32 Word;
} MPI2_VERSION_UNION;
/*LUN field defines, common to many structures */
#define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI2_LUN_LEVEL_1_WORD (0xFF00)
#define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00)
/*****************************************************************************
*
* Fusion-MPT MPI Scatter Gather Elements
*
*****************************************************************************/
/****************************************************************************
* MPI Simple Element structures
****************************************************************************/
typedef struct _MPI2_SGE_SIMPLE32 {
U32 FlagsLength;
U32 Address;
} MPI2_SGE_SIMPLE32, *PTR_MPI2_SGE_SIMPLE32,
Mpi2SGESimple32_t, *pMpi2SGESimple32_t;
typedef struct _MPI2_SGE_SIMPLE64 {
U32 FlagsLength;
U64 Address;
} MPI2_SGE_SIMPLE64, *PTR_MPI2_SGE_SIMPLE64,
Mpi2SGESimple64_t, *pMpi2SGESimple64_t;
typedef struct _MPI2_SGE_SIMPLE_UNION {
U32 FlagsLength;
union {
U32 Address32;
U64 Address64;
} u;
} MPI2_SGE_SIMPLE_UNION,
*PTR_MPI2_SGE_SIMPLE_UNION,
Mpi2SGESimpleUnion_t,
*pMpi2SGESimpleUnion_t;
/****************************************************************************
* MPI Chain Element structures - for MPI v2.0 products only
****************************************************************************/
typedef struct _MPI2_SGE_CHAIN32 {
U16 Length;
U8 NextChainOffset;
U8 Flags;
U32 Address;
} MPI2_SGE_CHAIN32, *PTR_MPI2_SGE_CHAIN32,
Mpi2SGEChain32_t, *pMpi2SGEChain32_t;
typedef struct _MPI2_SGE_CHAIN64 {
U16 Length;
U8 NextChainOffset;
U8 Flags;
U64 Address;
} MPI2_SGE_CHAIN64, *PTR_MPI2_SGE_CHAIN64,
Mpi2SGEChain64_t, *pMpi2SGEChain64_t;
typedef struct _MPI2_SGE_CHAIN_UNION {
U16 Length;
U8 NextChainOffset;
U8 Flags;
union {
U32 Address32;
U64 Address64;
} u;
} MPI2_SGE_CHAIN_UNION,
*PTR_MPI2_SGE_CHAIN_UNION,
Mpi2SGEChainUnion_t,
*pMpi2SGEChainUnion_t;
/****************************************************************************
* MPI Transaction Context Element structures - for MPI v2.0 products only
****************************************************************************/
typedef struct _MPI2_SGE_TRANSACTION32 {
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[1];
U32 TransactionDetails[1];
} MPI2_SGE_TRANSACTION32,
*PTR_MPI2_SGE_TRANSACTION32,
Mpi2SGETransaction32_t,
*pMpi2SGETransaction32_t;
typedef struct _MPI2_SGE_TRANSACTION64 {
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[2];
U32 TransactionDetails[1];
} MPI2_SGE_TRANSACTION64,
*PTR_MPI2_SGE_TRANSACTION64,
Mpi2SGETransaction64_t,
*pMpi2SGETransaction64_t;
typedef struct _MPI2_SGE_TRANSACTION96 {
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[3];
U32 TransactionDetails[1];
} MPI2_SGE_TRANSACTION96, *PTR_MPI2_SGE_TRANSACTION96,
Mpi2SGETransaction96_t, *pMpi2SGETransaction96_t;
typedef struct _MPI2_SGE_TRANSACTION128 {
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[4];
U32 TransactionDetails[1];
} MPI2_SGE_TRANSACTION128, *PTR_MPI2_SGE_TRANSACTION128,
Mpi2SGETransaction_t128, *pMpi2SGETransaction_t128;
typedef struct _MPI2_SGE_TRANSACTION_UNION {
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
union {
U32 TransactionContext32[1];
U32 TransactionContext64[2];
U32 TransactionContext96[3];
U32 TransactionContext128[4];
} u;
U32 TransactionDetails[1];
} MPI2_SGE_TRANSACTION_UNION,
*PTR_MPI2_SGE_TRANSACTION_UNION,
Mpi2SGETransactionUnion_t,
*pMpi2SGETransactionUnion_t;
/****************************************************************************
* MPI SGE union for IO SGL's - for MPI v2.0 products only
****************************************************************************/
typedef struct _MPI2_MPI_SGE_IO_UNION {
union {
MPI2_SGE_SIMPLE_UNION Simple;
MPI2_SGE_CHAIN_UNION Chain;
} u;
} MPI2_MPI_SGE_IO_UNION, *PTR_MPI2_MPI_SGE_IO_UNION,
Mpi2MpiSGEIOUnion_t, *pMpi2MpiSGEIOUnion_t;
/****************************************************************************
* MPI SGE union for SGL's with Simple and Transaction elements - for MPI v2.0 products only
****************************************************************************/
typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION {
union {
MPI2_SGE_SIMPLE_UNION Simple;
MPI2_SGE_TRANSACTION_UNION Transaction;
} u;
} MPI2_SGE_TRANS_SIMPLE_UNION,
*PTR_MPI2_SGE_TRANS_SIMPLE_UNION,
Mpi2SGETransSimpleUnion_t,
*pMpi2SGETransSimpleUnion_t;
/****************************************************************************
* All MPI SGE types union
****************************************************************************/
typedef struct _MPI2_MPI_SGE_UNION {
union {
MPI2_SGE_SIMPLE_UNION Simple;
MPI2_SGE_CHAIN_UNION Chain;
MPI2_SGE_TRANSACTION_UNION Transaction;
} u;
} MPI2_MPI_SGE_UNION, *PTR_MPI2_MPI_SGE_UNION,
Mpi2MpiSgeUnion_t, *pMpi2MpiSgeUnion_t;
/****************************************************************************
* MPI SGE field definition and masks
****************************************************************************/
/*Flags field bit definitions */
#define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80)
#define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40)
#define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
#define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08)
#define MPI2_SGE_FLAGS_DIRECTION (0x04)
#define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02)
#define MPI2_SGE_FLAGS_END_OF_LIST (0x01)
#define MPI2_SGE_FLAGS_SHIFT (24)
#define MPI2_SGE_LENGTH_MASK (0x00FFFFFF)
#define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
/*Element Type */
#define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
#define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
#define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30)
#define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30)
/*Address location */
#define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
/*Direction */
#define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00)
#define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04)
#define MPI2_SGE_FLAGS_DEST (MPI2_SGE_FLAGS_IOC_TO_HOST)
#define MPI2_SGE_FLAGS_SOURCE (MPI2_SGE_FLAGS_HOST_TO_IOC)
/*Address Size */
#define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
#define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
/*Context Size */
#define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00)
#define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02)
#define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04)
#define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06)
#define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
#define MPI2_SGE_CHAIN_OFFSET_SHIFT (16)
/****************************************************************************
* MPI SGE operation Macros
****************************************************************************/
/*SIMPLE FlagsLength manipulations... */
#define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
#define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> \
MPI2_SGE_FLAGS_SHIFT)
#define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK)
#define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK)
#define MPI2_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_SGE_SET_FLAGS(f) | \
MPI2_SGE_LENGTH(l))
#define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength)
#define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength)
#define MPI2_pSGE_SET_FLAGS_LENGTH(psg, f, l) ((psg)->FlagsLength = \
MPI2_SGE_SET_FLAGS_LENGTH(f, l))
/*CAUTION - The following are READ-MODIFY-WRITE! */
#define MPI2_pSGE_SET_FLAGS(psg, f) ((psg)->FlagsLength |= \
MPI2_SGE_SET_FLAGS(f))
#define MPI2_pSGE_SET_LENGTH(psg, l) ((psg)->FlagsLength |= \
MPI2_SGE_LENGTH(l))
#define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> \
MPI2_SGE_CHAIN_OFFSET_SHIFT)
/*****************************************************************************
*
* Fusion-MPT IEEE Scatter Gather Elements
*
*****************************************************************************/
/****************************************************************************
* IEEE Simple Element structures
****************************************************************************/
/*MPI2_IEEE_SGE_SIMPLE32 is for MPI v2.0 products only */
typedef struct _MPI2_IEEE_SGE_SIMPLE32 {
U32 Address;
U32 FlagsLength;
} MPI2_IEEE_SGE_SIMPLE32, *PTR_MPI2_IEEE_SGE_SIMPLE32,
Mpi2IeeeSgeSimple32_t, *pMpi2IeeeSgeSimple32_t;
typedef struct _MPI2_IEEE_SGE_SIMPLE64 {
U64 Address;
U32 Length;
U16 Reserved1;
U8 Reserved2;
U8 Flags;
} MPI2_IEEE_SGE_SIMPLE64, *PTR_MPI2_IEEE_SGE_SIMPLE64,
Mpi2IeeeSgeSimple64_t, *pMpi2IeeeSgeSimple64_t;
typedef union _MPI2_IEEE_SGE_SIMPLE_UNION {
MPI2_IEEE_SGE_SIMPLE32 Simple32;
MPI2_IEEE_SGE_SIMPLE64 Simple64;
} MPI2_IEEE_SGE_SIMPLE_UNION,
*PTR_MPI2_IEEE_SGE_SIMPLE_UNION,
Mpi2IeeeSgeSimpleUnion_t,
*pMpi2IeeeSgeSimpleUnion_t;
/****************************************************************************
* IEEE Chain Element structures
****************************************************************************/
/*MPI2_IEEE_SGE_CHAIN32 is for MPI v2.0 products only */
typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32;
/*MPI2_IEEE_SGE_CHAIN64 is for MPI v2.0 products only */
typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64;
typedef union _MPI2_IEEE_SGE_CHAIN_UNION {
MPI2_IEEE_SGE_CHAIN32 Chain32;
MPI2_IEEE_SGE_CHAIN64 Chain64;
} MPI2_IEEE_SGE_CHAIN_UNION,
*PTR_MPI2_IEEE_SGE_CHAIN_UNION,
Mpi2IeeeSgeChainUnion_t,
*pMpi2IeeeSgeChainUnion_t;
/*MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 products only */
typedef struct _MPI25_IEEE_SGE_CHAIN64 {
U64 Address;
U32 Length;
U16 Reserved1;
U8 NextChainOffset;
U8 Flags;
} MPI25_IEEE_SGE_CHAIN64,
*PTR_MPI25_IEEE_SGE_CHAIN64,
Mpi25IeeeSgeChain64_t,
*pMpi25IeeeSgeChain64_t;
/****************************************************************************
* All IEEE SGE types union
****************************************************************************/
/*MPI2_IEEE_SGE_UNION is for MPI v2.0 products only */
typedef struct _MPI2_IEEE_SGE_UNION {
union {
MPI2_IEEE_SGE_SIMPLE_UNION Simple;
MPI2_IEEE_SGE_CHAIN_UNION Chain;
} u;
} MPI2_IEEE_SGE_UNION, *PTR_MPI2_IEEE_SGE_UNION,
Mpi2IeeeSgeUnion_t, *pMpi2IeeeSgeUnion_t;
/****************************************************************************
* IEEE SGE union for IO SGL's
****************************************************************************/
typedef union _MPI25_SGE_IO_UNION {
MPI2_IEEE_SGE_SIMPLE64 IeeeSimple;
MPI25_IEEE_SGE_CHAIN64 IeeeChain;
} MPI25_SGE_IO_UNION, *PTR_MPI25_SGE_IO_UNION,
Mpi25SGEIOUnion_t, *pMpi25SGEIOUnion_t;
/****************************************************************************
* IEEE SGE field definitions and masks
****************************************************************************/
/*Flags field bit definitions */
#define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80)
#define MPI25_IEEE_SGE_FLAGS_END_OF_LIST (0x40)
#define MPI2_IEEE32_SGE_FLAGS_SHIFT (24)
#define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF)
/*Element Type */
#define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00)
#define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
/*Data Location Address Space */
#define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03)
#define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
#define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
#define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
#define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR (0x03)
#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR \
(MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR)
/****************************************************************************
* IEEE SGE operation Macros
****************************************************************************/
/*SIMPLE FlagsLength manipulations... */
#define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
#define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) \
>> MPI2_IEEE32_SGE_FLAGS_SHIFT)
#define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
#define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) |\
MPI2_IEEE32_SGE_LENGTH(l))
#define MPI2_IEEE32_pSGE_GET_FLAGS(psg) \
MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
#define MPI2_IEEE32_pSGE_GET_LENGTH(psg) \
MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
#define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg, f, l) ((psg)->FlagsLength = \
MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l))
/*CAUTION - The following are READ-MODIFY-WRITE! */
#define MPI2_IEEE32_pSGE_SET_FLAGS(psg, f) ((psg)->FlagsLength |= \
MPI2_IEEE32_SGE_SET_FLAGS(f))
#define MPI2_IEEE32_pSGE_SET_LENGTH(psg, l) ((psg)->FlagsLength |= \
MPI2_IEEE32_SGE_LENGTH(l))
/*****************************************************************************
*
* Fusion-MPT MPI/IEEE Scatter Gather Unions
*
*****************************************************************************/
typedef union _MPI2_SIMPLE_SGE_UNION {
MPI2_SGE_SIMPLE_UNION MpiSimple;
MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
} MPI2_SIMPLE_SGE_UNION, *PTR_MPI2_SIMPLE_SGE_UNION,
Mpi2SimpleSgeUntion_t, *pMpi2SimpleSgeUntion_t;
typedef union _MPI2_SGE_IO_UNION {
MPI2_SGE_SIMPLE_UNION MpiSimple;
MPI2_SGE_CHAIN_UNION MpiChain;
MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
MPI2_IEEE_SGE_CHAIN_UNION IeeeChain;
} MPI2_SGE_IO_UNION, *PTR_MPI2_SGE_IO_UNION,
Mpi2SGEIOUnion_t, *pMpi2SGEIOUnion_t;
/****************************************************************************
*
* Values for SGLFlags field, used in many request messages with an SGL
*
****************************************************************************/
/*values for MPI SGL Data Location Address Space subfield */
#define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C)
#define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00)
#define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04)
#define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
#define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C)
/*values for SGL Type subfield */
#define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03)
#define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00)
#define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01)
#define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02)
#endif
drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h 0 → 100644
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drivers/scsi/mpt3sas/mpi/mpi2_init.h 0 → 100644
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/*
* Copyright (c) 2000-2012 LSI Corporation.
*
*
* Name: mpi2_init.h
* Title: MPI SCSI initiator mode messages and structures
* Creation Date: June 23, 2006
*
* mpi2_init.h Version: 02.00.14
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
* 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
* 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
* 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
* 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
* 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
* Control field Task Attribute flags.
* Moved LUN field defines to mpi2.h becasue they are
* common to many structures.
* 05-06-09 02.00.07 Changed task management type of Query Unit Attention to
* Query Asynchronous Event.
* Defined two new bits in the SlotStatus field of the SCSI
* Enclosure Processor Request and Reply.
* 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
* both SCSI IO Error Reply and SCSI Task Management Reply.
* Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
* Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
* 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it.
* 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request.
* 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define.
* 11-18-11 02.00.12 Incorporating additions for MPI v2.5.
* 02-06-12 02.00.13 Added alternate defines for Task Priority / Command
* Priority to match SAM-4.
* Added EEDPErrorOffset to MPI2_SCSI_IO_REPLY.
* 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_INIT_H
#define MPI2_INIT_H
/*****************************************************************************
*
* SCSI Initiator Messages
*
*****************************************************************************/
/****************************************************************************
* SCSI IO messages and associated structures
****************************************************************************/
typedef struct _MPI2_SCSI_IO_CDB_EEDP32 {
U8 CDB[20]; /*0x00 */
U32 PrimaryReferenceTag; /*0x14 */
U16 PrimaryApplicationTag; /*0x18 */
U16 PrimaryApplicationTagMask; /*0x1A */
U32 TransferLength; /*0x1C */
} MPI2_SCSI_IO_CDB_EEDP32, *PTR_MPI2_SCSI_IO_CDB_EEDP32,
Mpi2ScsiIoCdbEedp32_t, *pMpi2ScsiIoCdbEedp32_t;
/*MPI v2.0 CDB field */
typedef union _MPI2_SCSI_IO_CDB_UNION {
U8 CDB32[32];
MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
MPI2_SGE_SIMPLE_UNION SGE;
} MPI2_SCSI_IO_CDB_UNION, *PTR_MPI2_SCSI_IO_CDB_UNION,
Mpi2ScsiIoCdb_t, *pMpi2ScsiIoCdb_t;
/*MPI v2.0 SCSI IO Request Message */
typedef struct _MPI2_SCSI_IO_REQUEST {
U16 DevHandle; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved1; /*0x04 */
U8 Reserved2; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved3; /*0x0A */
U32 SenseBufferLowAddress; /*0x0C */
U16 SGLFlags; /*0x10 */
U8 SenseBufferLength; /*0x12 */
U8 Reserved4; /*0x13 */
U8 SGLOffset0; /*0x14 */
U8 SGLOffset1; /*0x15 */
U8 SGLOffset2; /*0x16 */
U8 SGLOffset3; /*0x17 */
U32 SkipCount; /*0x18 */
U32 DataLength; /*0x1C */
U32 BidirectionalDataLength; /*0x20 */
U16 IoFlags; /*0x24 */
U16 EEDPFlags; /*0x26 */
U32 EEDPBlockSize; /*0x28 */
U32 SecondaryReferenceTag; /*0x2C */
U16 SecondaryApplicationTag; /*0x30 */
U16 ApplicationTagTranslationMask; /*0x32 */
U8 LUN[8]; /*0x34 */
U32 Control; /*0x3C */
MPI2_SCSI_IO_CDB_UNION CDB; /*0x40 */
#ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /*typically this is left undefined */
MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion;
#endif
MPI2_SGE_IO_UNION SGL; /*0x60 */
} MPI2_SCSI_IO_REQUEST, *PTR_MPI2_SCSI_IO_REQUEST,
Mpi2SCSIIORequest_t, *pMpi2SCSIIORequest_t;
/*SCSI IO MsgFlags bits */
/*MsgFlags for SenseBufferAddressSpace */
#define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
#define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
/*SCSI IO SGLFlags bits */
/*base values for Data Location Address Space */
#define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
/*base values for Type */
#define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02)
/*shift values for each sub-field */
#define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12)
#define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8)
#define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4)
#define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0)
/*number of SGLOffset fields */
#define MPI2_SCSIIO_NUM_SGLOFFSETS (4)
/*SCSI IO IoFlags bits */
/*Large CDB Address Space */
#define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000)
#define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000)
#define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000)
#define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000)
#define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000)
#define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
#define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400)
#define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
#define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
/*SCSI IO EEDPFlags bits */
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
#define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007)
#define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001)
#define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
/*SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */
/*SCSI IO Control bits */
#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000)
#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
#define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
#define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24)
#define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
#define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
#define MPI2_SCSIIO_CONTROL_READ (0x02000000)
#define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000)
#define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800)
#define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11)
/*alternate name for the previous field; called Command Priority in SAM-4 */
#define MPI2_SCSIIO_CONTROL_CMDPRI_MASK (0x00007800)
#define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT (11)
#define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
#define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
#define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100)
#define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
#define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400)
#define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0)
#define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000)
#define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040)
#define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080)
/*MPI v2.5 CDB field */
typedef union _MPI25_SCSI_IO_CDB_UNION {
U8 CDB32[32];
MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
MPI2_IEEE_SGE_SIMPLE64 SGE;
} MPI25_SCSI_IO_CDB_UNION, *PTR_MPI25_SCSI_IO_CDB_UNION,
Mpi25ScsiIoCdb_t, *pMpi25ScsiIoCdb_t;
/*MPI v2.5 SCSI IO Request Message */
typedef struct _MPI25_SCSI_IO_REQUEST {
U16 DevHandle; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved1; /*0x04 */
U8 Reserved2; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved3; /*0x0A */
U32 SenseBufferLowAddress; /*0x0C */
U8 DMAFlags; /*0x10 */
U8 Reserved5; /*0x11 */
U8 SenseBufferLength; /*0x12 */
U8 Reserved4; /*0x13 */
U8 SGLOffset0; /*0x14 */
U8 SGLOffset1; /*0x15 */
U8 SGLOffset2; /*0x16 */
U8 SGLOffset3; /*0x17 */
U32 SkipCount; /*0x18 */
U32 DataLength; /*0x1C */
U32 BidirectionalDataLength; /*0x20 */
U16 IoFlags; /*0x24 */
U16 EEDPFlags; /*0x26 */
U16 EEDPBlockSize; /*0x28 */
U16 Reserved6; /*0x2A */
U32 SecondaryReferenceTag; /*0x2C */
U16 SecondaryApplicationTag; /*0x30 */
U16 ApplicationTagTranslationMask; /*0x32 */
U8 LUN[8]; /*0x34 */
U32 Control; /*0x3C */
MPI25_SCSI_IO_CDB_UNION CDB; /*0x40 */
#ifdef MPI25_SCSI_IO_VENDOR_UNIQUE_REGION /*typically this is left undefined */
MPI25_SCSI_IO_VENDOR_UNIQUE VendorRegion;
#endif
MPI25_SGE_IO_UNION SGL; /*0x60 */
} MPI25_SCSI_IO_REQUEST, *PTR_MPI25_SCSI_IO_REQUEST,
Mpi25SCSIIORequest_t, *pMpi25SCSIIORequest_t;
/*use MPI2_SCSIIO_MSGFLAGS_ defines for the MsgFlags field */
/*Defines for the DMAFlags field
* Each setting affects 4 SGLS, from SGL0 to SGL3.
* D = Data
* C = Cache DIF
* I = Interleaved
* H = Host DIF
*/
#define MPI25_SCSIIO_DMAFLAGS_OP_MASK (0x0F)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_D (0x00)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_C (0x01)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_I (0x02)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_C (0x03)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_I (0x04)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_I_I (0x05)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_C (0x06)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_I (0x07)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_I_I (0x08)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_I_I_I (0x09)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_D (0x0A)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_C (0x0B)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_I (0x0C)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_C (0x0D)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_I (0x0E)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_I_I (0x0F)
/*number of SGLOffset fields */
#define MPI25_SCSIIO_NUM_SGLOFFSETS (4)
/*defines for the IoFlags field */
#define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000)
#define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000)
#define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000)
#define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
#define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
/*MPI v2.5 defines for the EEDPFlags bits */
/*use MPI2_SCSIIO_EEDPFLAGS_ defines for the other EEDPFlags bits */
#define MPI25_SCSIIO_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0)
#define MPI25_SCSIIO_EEDPFLAGS_COMPATIBLE_MODE (0x0000)
#define MPI25_SCSIIO_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040)
#define MPI25_SCSIIO_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080)
#define MPI25_SCSIIO_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0)
#define MPI25_SCSIIO_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030)
#define MPI25_SCSIIO_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000)
#define MPI25_SCSIIO_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010)
/*use MPI2_LUN_ defines from mpi2.h for the LUN field */
/*use MPI2_SCSIIO_CONTROL_ defines for the Control field */
/*NOTE: The SCSI IO Reply is nearly the same for MPI 2.0 and MPI 2.5, so
* MPI2_SCSI_IO_REPLY is used for both.
*/
/*SCSI IO Error Reply Message */
typedef struct _MPI2_SCSI_IO_REPLY {
U16 DevHandle; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved1; /*0x04 */
U8 Reserved2; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved3; /*0x0A */
U8 SCSIStatus; /*0x0C */
U8 SCSIState; /*0x0D */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U32 TransferCount; /*0x14 */
U32 SenseCount; /*0x18 */
U32 ResponseInfo; /*0x1C */
U16 TaskTag; /*0x20 */
U16 Reserved4; /*0x22 */
U32 BidirectionalTransferCount; /*0x24 */
U32 EEDPErrorOffset; /*0x28 *//*MPI 2.5 only; Reserved in MPI 2.0*/
U32 Reserved6; /*0x2C */
} MPI2_SCSI_IO_REPLY, *PTR_MPI2_SCSI_IO_REPLY,
Mpi2SCSIIOReply_t, *pMpi2SCSIIOReply_t;
/*SCSI IO Reply SCSIStatus values (SAM-4 status codes) */
#define MPI2_SCSI_STATUS_GOOD (0x00)
#define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02)
#define MPI2_SCSI_STATUS_CONDITION_MET (0x04)
#define MPI2_SCSI_STATUS_BUSY (0x08)
#define MPI2_SCSI_STATUS_INTERMEDIATE (0x10)
#define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
#define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
#define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /*obsolete */
#define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28)
#define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30)
#define MPI2_SCSI_STATUS_TASK_ABORTED (0x40)
/*SCSI IO Reply SCSIState flags */
#define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
#define MPI2_SCSI_STATE_TERMINATED (0x08)
#define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04)
#define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
#define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
/*masks and shifts for the ResponseInfo field */
#define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF)
#define MPI2_SCSI_RI_SHIFT_REASONCODE (0)
#define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
/****************************************************************************
* SCSI Task Management messages
****************************************************************************/
/*SCSI Task Management Request Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST {
U16 DevHandle; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U8 Reserved1; /*0x04 */
U8 TaskType; /*0x05 */
U8 Reserved2; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved3; /*0x0A */
U8 LUN[8]; /*0x0C */
U32 Reserved4[7]; /*0x14 */
U16 TaskMID; /*0x30 */
U16 Reserved5; /*0x32 */
} MPI2_SCSI_TASK_MANAGE_REQUEST,
*PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
Mpi2SCSITaskManagementRequest_t,
*pMpi2SCSITaskManagementRequest_t;
/*TaskType values */
#define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
#define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
#define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
#define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
#define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
#define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
#define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09)
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A)
/*obsolete TaskType name */
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION \
(MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT)
/*MsgFlags bits */
#define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
#define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
#define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
#define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
#define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
/*SCSI Task Management Reply Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY {
U16 DevHandle; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U8 ResponseCode; /*0x04 */
U8 TaskType; /*0x05 */
U8 Reserved1; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved2; /*0x0A */
U16 Reserved3; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U32 TerminationCount; /*0x14 */
U32 ResponseInfo; /*0x18 */
} MPI2_SCSI_TASK_MANAGE_REPLY,
*PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
Mpi2SCSITaskManagementReply_t, *pMpi2SCSIManagementReply_t;
/*ResponseCode values */
#define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
#define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
#define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
#define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
#define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
#define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
#define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A)
#define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
/*masks and shifts for the ResponseInfo field */
#define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF)
#define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24)
/****************************************************************************
* SCSI Enclosure Processor messages
****************************************************************************/
/*SCSI Enclosure Processor Request Message */
typedef struct _MPI2_SEP_REQUEST {
U16 DevHandle; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U8 Action; /*0x04 */
U8 Flags; /*0x05 */
U8 Reserved1; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved2; /*0x0A */
U32 SlotStatus; /*0x0C */
U32 Reserved3; /*0x10 */
U32 Reserved4; /*0x14 */
U32 Reserved5; /*0x18 */
U16 Slot; /*0x1C */
U16 EnclosureHandle; /*0x1E */
} MPI2_SEP_REQUEST, *PTR_MPI2_SEP_REQUEST,
Mpi2SepRequest_t, *pMpi2SepRequest_t;
/*Action defines */
#define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00)
#define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01)
/*Flags defines */
#define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00)
#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
/*SlotStatus defines */
#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
/*SCSI Enclosure Processor Reply Message */
typedef struct _MPI2_SEP_REPLY {
U16 DevHandle; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U8 Action; /*0x04 */
U8 Flags; /*0x05 */
U8 Reserved1; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved2; /*0x0A */
U16 Reserved3; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U32 SlotStatus; /*0x14 */
U32 Reserved4; /*0x18 */
U16 Slot; /*0x1C */
U16 EnclosureHandle; /*0x1E */
} MPI2_SEP_REPLY, *PTR_MPI2_SEP_REPLY,
Mpi2SepReply_t, *pMpi2SepReply_t;
/*SlotStatus defines */
#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
#endif
drivers/scsi/mpt3sas/mpi/mpi2_ioc.h 0 → 100644
View file @ f92363d1
/*
* Copyright (c) 2000-2012 LSI Corporation.
*
*
* Name: mpi2_ioc.h
* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
* Creation Date: October 11, 2006
*
* mpi2_ioc.h Version: 02.00.21
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 In IOCFacts Reply structure, renamed MaxDevices to
* MaxTargets.
* Added TotalImageSize field to FWDownload Request.
* Added reserved words to FWUpload Request.
* 06-26-07 02.00.02 Added IR Configuration Change List Event.
* 08-31-07 02.00.03 Removed SystemReplyQueueDepth field from the IOCInit
* request and replaced it with
* ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
* Replaced the MinReplyQueueDepth field of the IOCFacts
* reply with MaxReplyDescriptorPostQueueDepth.
* Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
* depth for the Reply Descriptor Post Queue.
* Added SASAddress field to Initiator Device Table
* Overflow Event data.
* 10-31-07 02.00.04 Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
* for SAS Initiator Device Status Change Event data.
* Modified Reason Code defines for SAS Topology Change
* List Event data, including adding a bit for PHY Vacant
* status, and adding a mask for the Reason Code.
* Added define for
* MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
* Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
* 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of
* the IOCFacts Reply.
* Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Moved MPI2_VERSION_UNION to mpi2.h.
* Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
* instead of enables, and added SASBroadcastPrimitiveMasks
* field.
* Added Log Entry Added Event and related structure.
* 02-29-08 02.00.06 Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
* Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
* Added MaxVolumes and MaxPersistentEntries fields to
* IOCFacts reply.
* Added ProtocalFlags and IOCCapabilities fields to
* MPI2_FW_IMAGE_HEADER.
* Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
* 03-03-08 02.00.07 Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
* a U16 (from a U32).
* Removed extra 's' from EventMasks name.
* 06-27-08 02.00.08 Fixed an offset in a comment.
* 10-02-08 02.00.09 Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
* Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
* renamed MinReplyFrameSize to ReplyFrameSize.
* Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
* Added two new RAIDOperation values for Integrated RAID
* Operations Status Event data.
* Added four new IR Configuration Change List Event data
* ReasonCode values.
* Added two new ReasonCode defines for SAS Device Status
* Change Event data.
* Added three new DiscoveryStatus bits for the SAS
* Discovery event data.
* Added Multiplexing Status Change bit to the PhyStatus
* field of the SAS Topology Change List event data.
* Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
* BootFlags are now product-specific.
* Added defines for the indivdual signature bytes
* for MPI2_INIT_IMAGE_FOOTER.
* 01-19-09 02.00.10 Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
* Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
* define.
* Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
* define.
* Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
* 05-06-09 02.00.11 Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define.
* Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define.
* Added two new reason codes for SAS Device Status Change
* Event.
* Added new event: SAS PHY Counter.
* 07-30-09 02.00.12 Added GPIO Interrupt event define and structure.
* Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Added new product id family for 2208.
* 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
* Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
* Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
* Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
* Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
* Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
* Added Host Based Discovery Phy Event data.
* Added defines for ProductID Product field
* (MPI2_FW_HEADER_PID_).
* Modified values for SAS ProductID Family
* (MPI2_FW_HEADER_PID_FAMILY_).
* 02-10-10 02.00.14 Added SAS Quiesce Event structure and defines.
* Added PowerManagementControl Request structures and
* defines.
* 05-12-10 02.00.15 Marked Task Set Full Event as obsolete.
* Added MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY define.
* 11-10-10 02.00.16 Added MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC.
* 02-23-11 02.00.17 Added SAS NOTIFY Primitive event, and added
* SASNotifyPrimitiveMasks field to
* MPI2_EVENT_NOTIFICATION_REQUEST.
* Added Temperature Threshold Event.
* Added Host Message Event.
* Added Send Host Message request and reply.
* 05-25-11 02.00.18 For Extended Image Header, added
* MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC and
* MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines.
* Deprecated MPI2_EXT_IMAGE_TYPE_MAX define.
* 08-24-11 02.00.19 Added PhysicalPort field to
* MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE structure.
* Marked MPI2_PM_CONTROL_FEATURE_PCIE_LINK as obsolete.
* 11-18-11 02.00.20 Incorporating additions for MPI v2.5.
* 03-29-12 02.00.21 Added a product specific range to event values.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_IOC_H
#define MPI2_IOC_H
/*****************************************************************************
*
* IOC Messages
*
*****************************************************************************/
/****************************************************************************
* IOCInit message
****************************************************************************/
/*IOCInit Request message */
typedef struct _MPI2_IOC_INIT_REQUEST {
U8 WhoInit; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 MsgVersion; /*0x0C */
U16 HeaderVersion; /*0x0E */
U32 Reserved5; /*0x10 */
U16 Reserved6; /*0x14 */
U8 Reserved7; /*0x16 */
U8 HostMSIxVectors; /*0x17 */
U16 Reserved8; /*0x18 */
U16 SystemRequestFrameSize; /*0x1A */
U16 ReplyDescriptorPostQueueDepth; /*0x1C */
U16 ReplyFreeQueueDepth; /*0x1E */
U32 SenseBufferAddressHigh; /*0x20 */
U32 SystemReplyAddressHigh; /*0x24 */
U64 SystemRequestFrameBaseAddress; /*0x28 */
U64 ReplyDescriptorPostQueueAddress; /*0x30 */
U64 ReplyFreeQueueAddress; /*0x38 */
U64 TimeStamp; /*0x40 */
} MPI2_IOC_INIT_REQUEST, *PTR_MPI2_IOC_INIT_REQUEST,
Mpi2IOCInitRequest_t, *pMpi2IOCInitRequest_t;
/*WhoInit values */
#define MPI2_WHOINIT_NOT_INITIALIZED (0x00)
#define MPI2_WHOINIT_SYSTEM_BIOS (0x01)
#define MPI2_WHOINIT_ROM_BIOS (0x02)
#define MPI2_WHOINIT_PCI_PEER (0x03)
#define MPI2_WHOINIT_HOST_DRIVER (0x04)
#define MPI2_WHOINIT_MANUFACTURER (0x05)
/*MsgVersion */
#define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
#define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
#define MPI2_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
#define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
/*HeaderVersion */
#define MPI2_IOCINIT_HDRVERSION_UNIT_MASK (0xFF00)
#define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT (8)
#define MPI2_IOCINIT_HDRVERSION_DEV_MASK (0x00FF)
#define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT (0)
/*minimum depth for the Reply Descriptor Post Queue */
#define MPI2_RDPQ_DEPTH_MIN (16)
/*IOCInit Reply message */
typedef struct _MPI2_IOC_INIT_REPLY {
U8 WhoInit; /*0x00 */
U8 Reserved1; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
} MPI2_IOC_INIT_REPLY, *PTR_MPI2_IOC_INIT_REPLY,
Mpi2IOCInitReply_t, *pMpi2IOCInitReply_t;
/****************************************************************************
* IOCFacts message
****************************************************************************/
/*IOCFacts Request message */
typedef struct _MPI2_IOC_FACTS_REQUEST {
U16 Reserved1; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
} MPI2_IOC_FACTS_REQUEST, *PTR_MPI2_IOC_FACTS_REQUEST,
Mpi2IOCFactsRequest_t, *pMpi2IOCFactsRequest_t;
/*IOCFacts Reply message */
typedef struct _MPI2_IOC_FACTS_REPLY {
U16 MsgVersion; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 HeaderVersion; /*0x04 */
U8 IOCNumber; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved1; /*0x0A */
U16 IOCExceptions; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U8 MaxChainDepth; /*0x14 */
U8 WhoInit; /*0x15 */
U8 NumberOfPorts; /*0x16 */
U8 MaxMSIxVectors; /*0x17 */
U16 RequestCredit; /*0x18 */
U16 ProductID; /*0x1A */
U32 IOCCapabilities; /*0x1C */
MPI2_VERSION_UNION FWVersion; /*0x20 */
U16 IOCRequestFrameSize; /*0x24 */
U16 IOCMaxChainSegmentSize; /*0x26 */
U16 MaxInitiators; /*0x28 */
U16 MaxTargets; /*0x2A */
U16 MaxSasExpanders; /*0x2C */
U16 MaxEnclosures; /*0x2E */
U16 ProtocolFlags; /*0x30 */
U16 HighPriorityCredit; /*0x32 */
U16 MaxReplyDescriptorPostQueueDepth; /*0x34 */
U8 ReplyFrameSize; /*0x36 */
U8 MaxVolumes; /*0x37 */
U16 MaxDevHandle; /*0x38 */
U16 MaxPersistentEntries; /*0x3A */
U16 MinDevHandle; /*0x3C */
U16 Reserved4; /*0x3E */
} MPI2_IOC_FACTS_REPLY, *PTR_MPI2_IOC_FACTS_REPLY,
Mpi2IOCFactsReply_t, *pMpi2IOCFactsReply_t;
/*MsgVersion */
#define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
#define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
#define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
#define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
/*HeaderVersion */
#define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
#define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
#define MPI2_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
#define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
/*IOCExceptions */
#define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX (0x0100)
#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK (0x00E0)
#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD (0x0000)
#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP (0x0020)
#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED (0x0040)
#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP (0x0060)
#define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010)
#define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL (0x0008)
#define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
#define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
#define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
/*defines for WhoInit field are after the IOCInit Request */
/*ProductID field uses MPI2_FW_HEADER_PID_ */
/*IOCCapabilities */
#define MPI25_IOCFACTS_CAPABILITY_FAST_PATH_CAPABLE (0x00020000)
#define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY (0x00010000)
#define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX (0x00008000)
#define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR (0x00004000)
#define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY (0x00002000)
#define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID (0x00001000)
#define MPI2_IOCFACTS_CAPABILITY_TLR (0x00000800)
#define MPI2_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
#define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET (0x00000080)
#define MPI2_IOCFACTS_CAPABILITY_EEDP (0x00000040)
#define MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
#define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
#define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
#define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004)
/*ProtocolFlags */
#define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001)
#define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002)
/****************************************************************************
* PortFacts message
****************************************************************************/
/*PortFacts Request message */
typedef struct _MPI2_PORT_FACTS_REQUEST {
U16 Reserved1; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 PortNumber; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved3; /*0x0A */
} MPI2_PORT_FACTS_REQUEST, *PTR_MPI2_PORT_FACTS_REQUEST,
Mpi2PortFactsRequest_t, *pMpi2PortFactsRequest_t;
/*PortFacts Reply message */
typedef struct _MPI2_PORT_FACTS_REPLY {
U16 Reserved1; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 PortNumber; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved3; /*0x0A */
U16 Reserved4; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U8 Reserved5; /*0x14 */
U8 PortType; /*0x15 */
U16 Reserved6; /*0x16 */
U16 MaxPostedCmdBuffers; /*0x18 */
U16 Reserved7; /*0x1A */
} MPI2_PORT_FACTS_REPLY, *PTR_MPI2_PORT_FACTS_REPLY,
Mpi2PortFactsReply_t, *pMpi2PortFactsReply_t;
/*PortType values */
#define MPI2_PORTFACTS_PORTTYPE_INACTIVE (0x00)
#define MPI2_PORTFACTS_PORTTYPE_FC (0x10)
#define MPI2_PORTFACTS_PORTTYPE_ISCSI (0x20)
#define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL (0x30)
#define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL (0x31)
/****************************************************************************
* PortEnable message
****************************************************************************/
/*PortEnable Request message */
typedef struct _MPI2_PORT_ENABLE_REQUEST {
U16 Reserved1; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U8 Reserved2; /*0x04 */
U8 PortFlags; /*0x05 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
} MPI2_PORT_ENABLE_REQUEST, *PTR_MPI2_PORT_ENABLE_REQUEST,
Mpi2PortEnableRequest_t, *pMpi2PortEnableRequest_t;
/*PortEnable Reply message */
typedef struct _MPI2_PORT_ENABLE_REPLY {
U16 Reserved1; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U8 Reserved2; /*0x04 */
U8 PortFlags; /*0x05 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
} MPI2_PORT_ENABLE_REPLY, *PTR_MPI2_PORT_ENABLE_REPLY,
Mpi2PortEnableReply_t, *pMpi2PortEnableReply_t;
/****************************************************************************
* EventNotification message
****************************************************************************/
/*EventNotification Request message */
#define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS (4)
typedef struct _MPI2_EVENT_NOTIFICATION_REQUEST {
U16 Reserved1; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U32 Reserved5; /*0x0C */
U32 Reserved6; /*0x10 */
U32 EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; /*0x14 */
U16 SASBroadcastPrimitiveMasks; /*0x24 */
U16 SASNotifyPrimitiveMasks; /*0x26 */
U32 Reserved8; /*0x28 */
} MPI2_EVENT_NOTIFICATION_REQUEST,
*PTR_MPI2_EVENT_NOTIFICATION_REQUEST,
Mpi2EventNotificationRequest_t,
*pMpi2EventNotificationRequest_t;
/*EventNotification Reply message */
typedef struct _MPI2_EVENT_NOTIFICATION_REPLY {
U16 EventDataLength; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved1; /*0x04 */
U8 AckRequired; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved2; /*0x0A */
U16 Reserved3; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U16 Event; /*0x14 */
U16 Reserved4; /*0x16 */
U32 EventContext; /*0x18 */
U32 EventData[1]; /*0x1C */
} MPI2_EVENT_NOTIFICATION_REPLY, *PTR_MPI2_EVENT_NOTIFICATION_REPLY,
Mpi2EventNotificationReply_t,
*pMpi2EventNotificationReply_t;
/*AckRequired */
#define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
#define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
/*Event */
#define MPI2_EVENT_LOG_DATA (0x0001)
#define MPI2_EVENT_STATE_CHANGE (0x0002)
#define MPI2_EVENT_HARD_RESET_RECEIVED (0x0005)
#define MPI2_EVENT_EVENT_CHANGE (0x000A)
#define MPI2_EVENT_TASK_SET_FULL (0x000E) /*obsolete */
#define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE (0x000F)
#define MPI2_EVENT_IR_OPERATION_STATUS (0x0014)
#define MPI2_EVENT_SAS_DISCOVERY (0x0016)
#define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE (0x0017)
#define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x0018)
#define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW (0x0019)
#define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST (0x001C)
#define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE (0x001D)
#define MPI2_EVENT_IR_VOLUME (0x001E)
#define MPI2_EVENT_IR_PHYSICAL_DISK (0x001F)
#define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST (0x0020)
#define MPI2_EVENT_LOG_ENTRY_ADDED (0x0021)
#define MPI2_EVENT_SAS_PHY_COUNTER (0x0022)
#define MPI2_EVENT_GPIO_INTERRUPT (0x0023)
#define MPI2_EVENT_HOST_BASED_DISCOVERY_PHY (0x0024)
#define MPI2_EVENT_SAS_QUIESCE (0x0025)
#define MPI2_EVENT_SAS_NOTIFY_PRIMITIVE (0x0026)
#define MPI2_EVENT_TEMP_THRESHOLD (0x0027)
#define MPI2_EVENT_HOST_MESSAGE (0x0028)
#define MPI2_EVENT_POWER_PERFORMANCE_CHANGE (0x0029)
#define MPI2_EVENT_MIN_PRODUCT_SPECIFIC (0x006E)
#define MPI2_EVENT_MAX_PRODUCT_SPECIFIC (0x007F)
/*Log Entry Added Event data */
/*the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */
#define MPI2_EVENT_DATA_LOG_DATA_LENGTH (0x1C)
typedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED {
U64 TimeStamp; /*0x00 */
U32 Reserved1; /*0x08 */
U16 LogSequence; /*0x0C */
U16 LogEntryQualifier; /*0x0E */
U8 VP_ID; /*0x10 */
U8 VF_ID; /*0x11 */
U16 Reserved2; /*0x12 */
U8 LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH]; /*0x14 */
} MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
*PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
Mpi2EventDataLogEntryAdded_t,
*pMpi2EventDataLogEntryAdded_t;
/*GPIO Interrupt Event data */
typedef struct _MPI2_EVENT_DATA_GPIO_INTERRUPT {
U8 GPIONum; /*0x00 */
U8 Reserved1; /*0x01 */
U16 Reserved2; /*0x02 */
} MPI2_EVENT_DATA_GPIO_INTERRUPT,
*PTR_MPI2_EVENT_DATA_GPIO_INTERRUPT,
Mpi2EventDataGpioInterrupt_t,
*pMpi2EventDataGpioInterrupt_t;
/*Temperature Threshold Event data */
typedef struct _MPI2_EVENT_DATA_TEMPERATURE {
U16 Status; /*0x00 */
U8 SensorNum; /*0x02 */
U8 Reserved1; /*0x03 */
U16 CurrentTemperature; /*0x04 */
U16 Reserved2; /*0x06 */
U32 Reserved3; /*0x08 */
U32 Reserved4; /*0x0C */
} MPI2_EVENT_DATA_TEMPERATURE,
*PTR_MPI2_EVENT_DATA_TEMPERATURE,
Mpi2EventDataTemperature_t, *pMpi2EventDataTemperature_t;
/*Temperature Threshold Event data Status bits */
#define MPI2_EVENT_TEMPERATURE3_EXCEEDED (0x0008)
#define MPI2_EVENT_TEMPERATURE2_EXCEEDED (0x0004)
#define MPI2_EVENT_TEMPERATURE1_EXCEEDED (0x0002)
#define MPI2_EVENT_TEMPERATURE0_EXCEEDED (0x0001)
/*Host Message Event data */
typedef struct _MPI2_EVENT_DATA_HOST_MESSAGE {
U8 SourceVF_ID; /*0x00 */
U8 Reserved1; /*0x01 */
U16 Reserved2; /*0x02 */
U32 Reserved3; /*0x04 */
U32 HostData[1]; /*0x08 */
} MPI2_EVENT_DATA_HOST_MESSAGE, *PTR_MPI2_EVENT_DATA_HOST_MESSAGE,
Mpi2EventDataHostMessage_t, *pMpi2EventDataHostMessage_t;
/*Power Performance Change Event */
typedef struct _MPI2_EVENT_DATA_POWER_PERF_CHANGE {
U8 CurrentPowerMode; /*0x00 */
U8 PreviousPowerMode; /*0x01 */
U16 Reserved1; /*0x02 */
} MPI2_EVENT_DATA_POWER_PERF_CHANGE,
*PTR_MPI2_EVENT_DATA_POWER_PERF_CHANGE,
Mpi2EventDataPowerPerfChange_t,
*pMpi2EventDataPowerPerfChange_t;
/*defines for CurrentPowerMode and PreviousPowerMode fields */
#define MPI2_EVENT_PM_INIT_MASK (0xC0)
#define MPI2_EVENT_PM_INIT_UNAVAILABLE (0x00)
#define MPI2_EVENT_PM_INIT_HOST (0x40)
#define MPI2_EVENT_PM_INIT_IO_UNIT (0x80)
#define MPI2_EVENT_PM_INIT_PCIE_DPA (0xC0)
#define MPI2_EVENT_PM_MODE_MASK (0x07)
#define MPI2_EVENT_PM_MODE_UNAVAILABLE (0x00)
#define MPI2_EVENT_PM_MODE_UNKNOWN (0x01)
#define MPI2_EVENT_PM_MODE_FULL_POWER (0x04)
#define MPI2_EVENT_PM_MODE_REDUCED_POWER (0x05)
#define MPI2_EVENT_PM_MODE_STANDBY (0x06)
/*Hard Reset Received Event data */
typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED {
U8 Reserved1; /*0x00 */
U8 Port; /*0x01 */
U16 Reserved2; /*0x02 */
} MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
*PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
Mpi2EventDataHardResetReceived_t,
*pMpi2EventDataHardResetReceived_t;
/*Task Set Full Event data */
/* this event is obsolete */
typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL {
U16 DevHandle; /*0x00 */
U16 CurrentDepth; /*0x02 */
} MPI2_EVENT_DATA_TASK_SET_FULL, *PTR_MPI2_EVENT_DATA_TASK_SET_FULL,
Mpi2EventDataTaskSetFull_t, *pMpi2EventDataTaskSetFull_t;
/*SAS Device Status Change Event data */
typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE {
U16 TaskTag; /*0x00 */
U8 ReasonCode; /*0x02 */
U8 PhysicalPort; /*0x03 */
U8 ASC; /*0x04 */
U8 ASCQ; /*0x05 */
U16 DevHandle; /*0x06 */
U32 Reserved2; /*0x08 */
U64 SASAddress; /*0x0C */
U8 LUN[8]; /*0x14 */
} MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
*PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
Mpi2EventDataSasDeviceStatusChange_t,
*pMpi2EventDataSasDeviceStatusChange_t;
/*SAS Device Status Change Event data ReasonCode values */
#define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
#define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
#define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
#define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
#define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
#define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
#define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
#define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D)
#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET (0x0E)
#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL (0x0F)
#define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE (0x10)
#define MPI2_EVENT_SAS_DEV_STAT_RC_EXPANDER_REDUCED_FUNCTIONALITY (0x11)
#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_EXPANDER_REDUCED_FUNCTIONALITY (0x12)
/*Integrated RAID Operation Status Event data */
typedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS {
U16 VolDevHandle; /*0x00 */
U16 Reserved1; /*0x02 */
U8 RAIDOperation; /*0x04 */
U8 PercentComplete; /*0x05 */
U16 Reserved2; /*0x06 */
U32 Resereved3; /*0x08 */
} MPI2_EVENT_DATA_IR_OPERATION_STATUS,
*PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS,
Mpi2EventDataIrOperationStatus_t,
*pMpi2EventDataIrOperationStatus_t;
/*Integrated RAID Operation Status Event data RAIDOperation values */
#define MPI2_EVENT_IR_RAIDOP_RESYNC (0x00)
#define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK (0x02)
#define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT (0x03)
#define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT (0x04)
/*Integrated RAID Volume Event data */
typedef struct _MPI2_EVENT_DATA_IR_VOLUME {
U16 VolDevHandle; /*0x00 */
U8 ReasonCode; /*0x02 */
U8 Reserved1; /*0x03 */
U32 NewValue; /*0x04 */
U32 PreviousValue; /*0x08 */
} MPI2_EVENT_DATA_IR_VOLUME, *PTR_MPI2_EVENT_DATA_IR_VOLUME,
Mpi2EventDataIrVolume_t, *pMpi2EventDataIrVolume_t;
/*Integrated RAID Volume Event data ReasonCode values */
#define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED (0x01)
#define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED (0x02)
#define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED (0x03)
/*Integrated RAID Physical Disk Event data */
typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK {
U16 Reserved1; /*0x00 */
U8 ReasonCode; /*0x02 */
U8 PhysDiskNum; /*0x03 */
U16 PhysDiskDevHandle; /*0x04 */
U16 Reserved2; /*0x06 */
U16 Slot; /*0x08 */
U16 EnclosureHandle; /*0x0A */
U32 NewValue; /*0x0C */
U32 PreviousValue; /*0x10 */
} MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
*PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
Mpi2EventDataIrPhysicalDisk_t,
*pMpi2EventDataIrPhysicalDisk_t;
/*Integrated RAID Physical Disk Event data ReasonCode values */
#define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED (0x01)
#define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED (0x02)
#define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED (0x03)
/*Integrated RAID Configuration Change List Event data */
/*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to
*one and check NumElements at runtime.
*/
#ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT
#define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT (1)
#endif
typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT {
U16 ElementFlags; /*0x00 */
U16 VolDevHandle; /*0x02 */
U8 ReasonCode; /*0x04 */
U8 PhysDiskNum; /*0x05 */
U16 PhysDiskDevHandle; /*0x06 */
} MPI2_EVENT_IR_CONFIG_ELEMENT, *PTR_MPI2_EVENT_IR_CONFIG_ELEMENT,
Mpi2EventIrConfigElement_t, *pMpi2EventIrConfigElement_t;
/*IR Configuration Change List Event data ElementFlags values */
#define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK (0x000F)
#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT (0x0000)
#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001)
#define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT (0x0002)
/*IR Configuration Change List Event data ReasonCode values */
#define MPI2_EVENT_IR_CHANGE_RC_ADDED (0x01)
#define MPI2_EVENT_IR_CHANGE_RC_REMOVED (0x02)
#define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE (0x03)
#define MPI2_EVENT_IR_CHANGE_RC_HIDE (0x04)
#define MPI2_EVENT_IR_CHANGE_RC_UNHIDE (0x05)
#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED (0x06)
#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED (0x07)
#define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED (0x08)
#define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED (0x09)
typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST {
U8 NumElements; /*0x00 */
U8 Reserved1; /*0x01 */
U8 Reserved2; /*0x02 */
U8 ConfigNum; /*0x03 */
U32 Flags; /*0x04 */
MPI2_EVENT_IR_CONFIG_ELEMENT
ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT];/*0x08 */
} MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
*PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
Mpi2EventDataIrConfigChangeList_t,
*pMpi2EventDataIrConfigChangeList_t;
/*IR Configuration Change List Event data Flags values */
#define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG (0x00000001)
/*SAS Discovery Event data */
typedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY {
U8 Flags; /*0x00 */
U8 ReasonCode; /*0x01 */
U8 PhysicalPort; /*0x02 */
U8 Reserved1; /*0x03 */
U32 DiscoveryStatus; /*0x04 */
} MPI2_EVENT_DATA_SAS_DISCOVERY,
*PTR_MPI2_EVENT_DATA_SAS_DISCOVERY,
Mpi2EventDataSasDiscovery_t, *pMpi2EventDataSasDiscovery_t;
/*SAS Discovery Event data Flags values */
#define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE (0x02)
#define MPI2_EVENT_SAS_DISC_IN_PROGRESS (0x01)
/*SAS Discovery Event data ReasonCode values */
#define MPI2_EVENT_SAS_DISC_RC_STARTED (0x01)
#define MPI2_EVENT_SAS_DISC_RC_COMPLETED (0x02)
/*SAS Discovery Event data DiscoveryStatus values */
#define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED (0x80000000)
#define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED (0x40000000)
#define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED (0x20000000)
#define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED (0x10000000)
#define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR (0x08000000)
#define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000)
#define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE (0x00004000)
#define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN (0x00002000)
#define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000)
#define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE (0x00000800)
#define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK (0x00000400)
#define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK (0x00000200)
#define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR (0x00000100)
#define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED (0x00000080)
#define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST (0x00000040)
#define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES (0x00000020)
#define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT (0x00000010)
#define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS (0x00000004)
#define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE (0x00000002)
#define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED (0x00000001)
/*SAS Broadcast Primitive Event data */
typedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE {
U8 PhyNum; /*0x00 */
U8 Port; /*0x01 */
U8 PortWidth; /*0x02 */
U8 Primitive; /*0x03 */
} MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
*PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
Mpi2EventDataSasBroadcastPrimitive_t,
*pMpi2EventDataSasBroadcastPrimitive_t;
/*defines for the Primitive field */
#define MPI2_EVENT_PRIMITIVE_CHANGE (0x01)
#define MPI2_EVENT_PRIMITIVE_SES (0x02)
#define MPI2_EVENT_PRIMITIVE_EXPANDER (0x03)
#define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04)
#define MPI2_EVENT_PRIMITIVE_RESERVED3 (0x05)
#define MPI2_EVENT_PRIMITIVE_RESERVED4 (0x06)
#define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
#define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
/*SAS Notify Primitive Event data */
typedef struct _MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE {
U8 PhyNum; /*0x00 */
U8 Port; /*0x01 */
U8 Reserved1; /*0x02 */
U8 Primitive; /*0x03 */
} MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
*PTR_MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
Mpi2EventDataSasNotifyPrimitive_t,
*pMpi2EventDataSasNotifyPrimitive_t;
/*defines for the Primitive field */
#define MPI2_EVENT_NOTIFY_ENABLE_SPINUP (0x01)
#define MPI2_EVENT_NOTIFY_POWER_LOSS_EXPECTED (0x02)
#define MPI2_EVENT_NOTIFY_RESERVED1 (0x03)
#define MPI2_EVENT_NOTIFY_RESERVED2 (0x04)
/*SAS Initiator Device Status Change Event data */
typedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE {
U8 ReasonCode; /*0x00 */
U8 PhysicalPort; /*0x01 */
U16 DevHandle; /*0x02 */
U64 SASAddress; /*0x04 */
} MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
*PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
Mpi2EventDataSasInitDevStatusChange_t,
*pMpi2EventDataSasInitDevStatusChange_t;
/*SAS Initiator Device Status Change event ReasonCode values */
#define MPI2_EVENT_SAS_INIT_RC_ADDED (0x01)
#define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING (0x02)
/*SAS Initiator Device Table Overflow Event data */
typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW {
U16 MaxInit; /*0x00 */
U16 CurrentInit; /*0x02 */
U64 SASAddress; /*0x04 */
} MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
*PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
Mpi2EventDataSasInitTableOverflow_t,
*pMpi2EventDataSasInitTableOverflow_t;
/*SAS Topology Change List Event data */
/*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to
*one and check NumEntries at runtime.
*/
#ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT
#define MPI2_EVENT_SAS_TOPO_PHY_COUNT (1)
#endif
typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY {
U16 AttachedDevHandle; /*0x00 */
U8 LinkRate; /*0x02 */
U8 PhyStatus; /*0x03 */
} MPI2_EVENT_SAS_TOPO_PHY_ENTRY, *PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY,
Mpi2EventSasTopoPhyEntry_t, *pMpi2EventSasTopoPhyEntry_t;
typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST {
U16 EnclosureHandle; /*0x00 */
U16 ExpanderDevHandle; /*0x02 */
U8 NumPhys; /*0x04 */
U8 Reserved1; /*0x05 */
U16 Reserved2; /*0x06 */
U8 NumEntries; /*0x08 */
U8 StartPhyNum; /*0x09 */
U8 ExpStatus; /*0x0A */
U8 PhysicalPort; /*0x0B */
MPI2_EVENT_SAS_TOPO_PHY_ENTRY
PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /*0x0C */
} MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
*PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
Mpi2EventDataSasTopologyChangeList_t,
*pMpi2EventDataSasTopologyChangeList_t;
/*values for the ExpStatus field */
#define MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER (0x00)
#define MPI2_EVENT_SAS_TOPO_ES_ADDED (0x01)
#define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02)
#define MPI2_EVENT_SAS_TOPO_ES_RESPONDING (0x03)
#define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04)
/*defines for the LinkRate field */
#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK (0xF0)
#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT (4)
#define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK (0x0F)
#define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT (0)
#define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE (0x00)
#define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01)
#define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02)
#define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03)
#define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04)
#define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05)
#define MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY (0x06)
#define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5 (0x08)
#define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0 (0x09)
#define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A)
#define MPI25_EVENT_SAS_TOPO_LR_RATE_12_0 (0x0B)
/*values for the PhyStatus field */
#define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT (0x80)
#define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE (0x10)
/*values for the PhyStatus ReasonCode sub-field */
#define MPI2_EVENT_SAS_TOPO_RC_MASK (0x0F)
#define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED (0x01)
#define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING (0x02)
#define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED (0x03)
#define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE (0x04)
#define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING (0x05)
/*SAS Enclosure Device Status Change Event data */
typedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE {
U16 EnclosureHandle; /*0x00 */
U8 ReasonCode; /*0x02 */
U8 PhysicalPort; /*0x03 */
U64 EnclosureLogicalID; /*0x04 */
U16 NumSlots; /*0x0C */
U16 StartSlot; /*0x0E */
U32 PhyBits; /*0x10 */
} MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
*PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
Mpi2EventDataSasEnclDevStatusChange_t,
*pMpi2EventDataSasEnclDevStatusChange_t;
/*SAS Enclosure Device Status Change event ReasonCode values */
#define MPI2_EVENT_SAS_ENCL_RC_ADDED (0x01)
#define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING (0x02)
/*SAS PHY Counter Event data */
typedef struct _MPI2_EVENT_DATA_SAS_PHY_COUNTER {
U64 TimeStamp; /*0x00 */
U32 Reserved1; /*0x08 */
U8 PhyEventCode; /*0x0C */
U8 PhyNum; /*0x0D */
U16 Reserved2; /*0x0E */
U32 PhyEventInfo; /*0x10 */
U8 CounterType; /*0x14 */
U8 ThresholdWindow; /*0x15 */
U8 TimeUnits; /*0x16 */
U8 Reserved3; /*0x17 */
U32 EventThreshold; /*0x18 */
U16 ThresholdFlags; /*0x1C */
U16 Reserved4; /*0x1E */
} MPI2_EVENT_DATA_SAS_PHY_COUNTER,
*PTR_MPI2_EVENT_DATA_SAS_PHY_COUNTER,
Mpi2EventDataSasPhyCounter_t,
*pMpi2EventDataSasPhyCounter_t;
/*use MPI2_SASPHY3_EVENT_CODE_ values from mpi2_cnfg.h
*for the PhyEventCode field */
/*use MPI2_SASPHY3_COUNTER_TYPE_ values from mpi2_cnfg.h
*for the CounterType field */
/*use MPI2_SASPHY3_TIME_UNITS_ values from mpi2_cnfg.h
*for the TimeUnits field */
/*use MPI2_SASPHY3_TFLAGS_ values from mpi2_cnfg.h
*for the ThresholdFlags field */
/*SAS Quiesce Event data */
typedef struct _MPI2_EVENT_DATA_SAS_QUIESCE {
U8 ReasonCode; /*0x00 */
U8 Reserved1; /*0x01 */
U16 Reserved2; /*0x02 */
U32 Reserved3; /*0x04 */
} MPI2_EVENT_DATA_SAS_QUIESCE,
*PTR_MPI2_EVENT_DATA_SAS_QUIESCE,
Mpi2EventDataSasQuiesce_t, *pMpi2EventDataSasQuiesce_t;
/*SAS Quiesce Event data ReasonCode values */
#define MPI2_EVENT_SAS_QUIESCE_RC_STARTED (0x01)
#define MPI2_EVENT_SAS_QUIESCE_RC_COMPLETED (0x02)
/*Host Based Discovery Phy Event data */
typedef struct _MPI2_EVENT_HBD_PHY_SAS {
U8 Flags; /*0x00 */
U8 NegotiatedLinkRate; /*0x01 */
U8 PhyNum; /*0x02 */
U8 PhysicalPort; /*0x03 */
U32 Reserved1; /*0x04 */
U8 InitialFrame[28]; /*0x08 */
} MPI2_EVENT_HBD_PHY_SAS, *PTR_MPI2_EVENT_HBD_PHY_SAS,
Mpi2EventHbdPhySas_t, *pMpi2EventHbdPhySas_t;
/*values for the Flags field */
#define MPI2_EVENT_HBD_SAS_FLAGS_FRAME_VALID (0x02)
#define MPI2_EVENT_HBD_SAS_FLAGS_SATA_FRAME (0x01)
/*use MPI2_SAS_NEG_LINK_RATE_ defines from mpi2_cnfg.h
*for the NegotiatedLinkRate field */
typedef union _MPI2_EVENT_HBD_DESCRIPTOR {
MPI2_EVENT_HBD_PHY_SAS Sas;
} MPI2_EVENT_HBD_DESCRIPTOR, *PTR_MPI2_EVENT_HBD_DESCRIPTOR,
Mpi2EventHbdDescriptor_t, *pMpi2EventHbdDescriptor_t;
typedef struct _MPI2_EVENT_DATA_HBD_PHY {
U8 DescriptorType; /*0x00 */
U8 Reserved1; /*0x01 */
U16 Reserved2; /*0x02 */
U32 Reserved3; /*0x04 */
MPI2_EVENT_HBD_DESCRIPTOR Descriptor; /*0x08 */
} MPI2_EVENT_DATA_HBD_PHY, *PTR_MPI2_EVENT_DATA_HBD_PHY,
Mpi2EventDataHbdPhy_t,
*pMpi2EventDataMpi2EventDataHbdPhy_t;
/*values for the DescriptorType field */
#define MPI2_EVENT_HBD_DT_SAS (0x01)
/****************************************************************************
* EventAck message
****************************************************************************/
/*EventAck Request message */
typedef struct _MPI2_EVENT_ACK_REQUEST {
U16 Reserved1; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Event; /*0x0C */
U16 Reserved5; /*0x0E */
U32 EventContext; /*0x10 */
} MPI2_EVENT_ACK_REQUEST, *PTR_MPI2_EVENT_ACK_REQUEST,
Mpi2EventAckRequest_t, *pMpi2EventAckRequest_t;
/*EventAck Reply message */
typedef struct _MPI2_EVENT_ACK_REPLY {
U16 Reserved1; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
} MPI2_EVENT_ACK_REPLY, *PTR_MPI2_EVENT_ACK_REPLY,
Mpi2EventAckReply_t, *pMpi2EventAckReply_t;
/****************************************************************************
* SendHostMessage message
****************************************************************************/
/*SendHostMessage Request message */
typedef struct _MPI2_SEND_HOST_MESSAGE_REQUEST {
U16 HostDataLength; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved1; /*0x04 */
U8 Reserved2; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved3; /*0x0A */
U8 Reserved4; /*0x0C */
U8 DestVF_ID; /*0x0D */
U16 Reserved5; /*0x0E */
U32 Reserved6; /*0x10 */
U32 Reserved7; /*0x14 */
U32 Reserved8; /*0x18 */
U32 Reserved9; /*0x1C */
U32 Reserved10; /*0x20 */
U32 HostData[1]; /*0x24 */
} MPI2_SEND_HOST_MESSAGE_REQUEST,
*PTR_MPI2_SEND_HOST_MESSAGE_REQUEST,
Mpi2SendHostMessageRequest_t,
*pMpi2SendHostMessageRequest_t;
/*SendHostMessage Reply message */
typedef struct _MPI2_SEND_HOST_MESSAGE_REPLY {
U16 HostDataLength; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved1; /*0x04 */
U8 Reserved2; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved3; /*0x0A */
U16 Reserved4; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
} MPI2_SEND_HOST_MESSAGE_REPLY, *PTR_MPI2_SEND_HOST_MESSAGE_REPLY,
Mpi2SendHostMessageReply_t, *pMpi2SendHostMessageReply_t;
/****************************************************************************
* FWDownload message
****************************************************************************/
/*MPI v2.0 FWDownload Request message */
typedef struct _MPI2_FW_DOWNLOAD_REQUEST {
U8 ImageType; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U32 TotalImageSize; /*0x0C */
U32 Reserved5; /*0x10 */
MPI2_MPI_SGE_UNION SGL; /*0x14 */
} MPI2_FW_DOWNLOAD_REQUEST, *PTR_MPI2_FW_DOWNLOAD_REQUEST,
Mpi2FWDownloadRequest, *pMpi2FWDownloadRequest;
#define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
#define MPI2_FW_DOWNLOAD_ITYPE_FW (0x01)
#define MPI2_FW_DOWNLOAD_ITYPE_BIOS (0x02)
#define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
#define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
#define MPI2_FW_DOWNLOAD_ITYPE_COMPLETE (0x0A)
#define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
#define MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC (0xF0)
/*MPI v2.0 FWDownload TransactionContext Element */
typedef struct _MPI2_FW_DOWNLOAD_TCSGE {
U8 Reserved1; /*0x00 */
U8 ContextSize; /*0x01 */
U8 DetailsLength; /*0x02 */
U8 Flags; /*0x03 */
U32 Reserved2; /*0x04 */
U32 ImageOffset; /*0x08 */
U32 ImageSize; /*0x0C */
} MPI2_FW_DOWNLOAD_TCSGE, *PTR_MPI2_FW_DOWNLOAD_TCSGE,
Mpi2FWDownloadTCSGE_t, *pMpi2FWDownloadTCSGE_t;
/*MPI v2.5 FWDownload Request message */
typedef struct _MPI25_FW_DOWNLOAD_REQUEST {
U8 ImageType; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U32 TotalImageSize; /*0x0C */
U32 Reserved5; /*0x10 */
U32 Reserved6; /*0x14 */
U32 ImageOffset; /*0x18 */
U32 ImageSize; /*0x1C */
MPI25_SGE_IO_UNION SGL; /*0x20 */
} MPI25_FW_DOWNLOAD_REQUEST, *PTR_MPI25_FW_DOWNLOAD_REQUEST,
Mpi25FWDownloadRequest, *pMpi25FWDownloadRequest;
/*FWDownload Reply message */
typedef struct _MPI2_FW_DOWNLOAD_REPLY {
U8 ImageType; /*0x00 */
U8 Reserved1; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
} MPI2_FW_DOWNLOAD_REPLY, *PTR_MPI2_FW_DOWNLOAD_REPLY,
Mpi2FWDownloadReply_t, *pMpi2FWDownloadReply_t;
/****************************************************************************
* FWUpload message
****************************************************************************/
/*MPI v2.0 FWUpload Request message */
typedef struct _MPI2_FW_UPLOAD_REQUEST {
U8 ImageType; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U32 Reserved5; /*0x0C */
U32 Reserved6; /*0x10 */
MPI2_MPI_SGE_UNION SGL; /*0x14 */
} MPI2_FW_UPLOAD_REQUEST, *PTR_MPI2_FW_UPLOAD_REQUEST,
Mpi2FWUploadRequest_t, *pMpi2FWUploadRequest_t;
#define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT (0x00)
#define MPI2_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
#define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
#define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
#define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING (0x06)
#define MPI2_FW_UPLOAD_ITYPE_CONFIG_1 (0x07)
#define MPI2_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
#define MPI2_FW_UPLOAD_ITYPE_MEGARAID (0x09)
#define MPI2_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
#define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
/*MPI v2.0 FWUpload TransactionContext Element */
typedef struct _MPI2_FW_UPLOAD_TCSGE {
U8 Reserved1; /*0x00 */
U8 ContextSize; /*0x01 */
U8 DetailsLength; /*0x02 */
U8 Flags; /*0x03 */
U32 Reserved2; /*0x04 */
U32 ImageOffset; /*0x08 */
U32 ImageSize; /*0x0C */
} MPI2_FW_UPLOAD_TCSGE, *PTR_MPI2_FW_UPLOAD_TCSGE,
Mpi2FWUploadTCSGE_t, *pMpi2FWUploadTCSGE_t;
/*MPI v2.5 FWUpload Request message */
typedef struct _MPI25_FW_UPLOAD_REQUEST {
U8 ImageType; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U32 Reserved5; /*0x0C */
U32 Reserved6; /*0x10 */
U32 Reserved7; /*0x14 */
U32 ImageOffset; /*0x18 */
U32 ImageSize; /*0x1C */
MPI25_SGE_IO_UNION SGL; /*0x20 */
} MPI25_FW_UPLOAD_REQUEST, *PTR_MPI25_FW_UPLOAD_REQUEST,
Mpi25FWUploadRequest_t, *pMpi25FWUploadRequest_t;
/*FWUpload Reply message */
typedef struct _MPI2_FW_UPLOAD_REPLY {
U8 ImageType; /*0x00 */
U8 Reserved1; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U32 ActualImageSize; /*0x14 */
} MPI2_FW_UPLOAD_REPLY, *PTR_MPI2_FW_UPLOAD_REPLY,
Mpi2FWUploadReply_t, *pMPi2FWUploadReply_t;
/*FW Image Header */
typedef struct _MPI2_FW_IMAGE_HEADER {
U32 Signature; /*0x00 */
U32 Signature0; /*0x04 */
U32 Signature1; /*0x08 */
U32 Signature2; /*0x0C */
MPI2_VERSION_UNION MPIVersion; /*0x10 */
MPI2_VERSION_UNION FWVersion; /*0x14 */
MPI2_VERSION_UNION NVDATAVersion; /*0x18 */
MPI2_VERSION_UNION PackageVersion; /*0x1C */
U16 VendorID; /*0x20 */
U16 ProductID; /*0x22 */
U16 ProtocolFlags; /*0x24 */
U16 Reserved26; /*0x26 */
U32 IOCCapabilities; /*0x28 */
U32 ImageSize; /*0x2C */
U32 NextImageHeaderOffset; /*0x30 */
U32 Checksum; /*0x34 */
U32 Reserved38; /*0x38 */
U32 Reserved3C; /*0x3C */
U32 Reserved40; /*0x40 */
U32 Reserved44; /*0x44 */
U32 Reserved48; /*0x48 */
U32 Reserved4C; /*0x4C */
U32 Reserved50; /*0x50 */
U32 Reserved54; /*0x54 */
U32 Reserved58; /*0x58 */
U32 Reserved5C; /*0x5C */
U32 Reserved60; /*0x60 */
U32 FirmwareVersionNameWhat; /*0x64 */
U8 FirmwareVersionName[32]; /*0x68 */
U32 VendorNameWhat; /*0x88 */
U8 VendorName[32]; /*0x8C */
U32 PackageNameWhat; /*0x88 */
U8 PackageName[32]; /*0x8C */
U32 ReservedD0; /*0xD0 */
U32 ReservedD4; /*0xD4 */
U32 ReservedD8; /*0xD8 */
U32 ReservedDC; /*0xDC */
U32 ReservedE0; /*0xE0 */
U32 ReservedE4; /*0xE4 */
U32 ReservedE8; /*0xE8 */
U32 ReservedEC; /*0xEC */
U32 ReservedF0; /*0xF0 */
U32 ReservedF4; /*0xF4 */
U32 ReservedF8; /*0xF8 */
U32 ReservedFC; /*0xFC */
} MPI2_FW_IMAGE_HEADER, *PTR_MPI2_FW_IMAGE_HEADER,
Mpi2FWImageHeader_t, *pMpi2FWImageHeader_t;
/*Signature field */
#define MPI2_FW_HEADER_SIGNATURE_OFFSET (0x00)
#define MPI2_FW_HEADER_SIGNATURE_MASK (0xFF000000)
#define MPI2_FW_HEADER_SIGNATURE (0xEA000000)
/*Signature0 field */
#define MPI2_FW_HEADER_SIGNATURE0_OFFSET (0x04)
#define MPI2_FW_HEADER_SIGNATURE0 (0x5AFAA55A)
/*Signature1 field */
#define MPI2_FW_HEADER_SIGNATURE1_OFFSET (0x08)
#define MPI2_FW_HEADER_SIGNATURE1 (0xA55AFAA5)
/*Signature2 field */
#define MPI2_FW_HEADER_SIGNATURE2_OFFSET (0x0C)
#define MPI2_FW_HEADER_SIGNATURE2 (0x5AA55AFA)
/*defines for using the ProductID field */
#define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000)
#define MPI2_FW_HEADER_PID_TYPE_SAS (0x2000)
#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00)
#define MPI2_FW_HEADER_PID_PROD_A (0x0000)
#define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
#define MPI2_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
#define MPI2_FW_HEADER_PID_FAMILY_MASK (0x00FF)
/*SAS ProductID Family bits */
#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0013)
#define MPI2_FW_HEADER_PID_FAMILY_2208_SAS (0x0014)
#define MPI25_FW_HEADER_PID_FAMILY_3108_SAS (0x0021)
/*use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
/*use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
#define MPI2_FW_HEADER_IMAGESIZE_OFFSET (0x2C)
#define MPI2_FW_HEADER_NEXTIMAGE_OFFSET (0x30)
#define MPI2_FW_HEADER_VERNMHWAT_OFFSET (0x64)
#define MPI2_FW_HEADER_WHAT_SIGNATURE (0x29232840)
#define MPI2_FW_HEADER_SIZE (0x100)
/*Extended Image Header */
typedef struct _MPI2_EXT_IMAGE_HEADER {
U8 ImageType; /*0x00 */
U8 Reserved1; /*0x01 */
U16 Reserved2; /*0x02 */
U32 Checksum; /*0x04 */
U32 ImageSize; /*0x08 */
U32 NextImageHeaderOffset; /*0x0C */
U32 PackageVersion; /*0x10 */
U32 Reserved3; /*0x14 */
U32 Reserved4; /*0x18 */
U32 Reserved5; /*0x1C */
U8 IdentifyString[32]; /*0x20 */
} MPI2_EXT_IMAGE_HEADER, *PTR_MPI2_EXT_IMAGE_HEADER,
Mpi2ExtImageHeader_t, *pMpi2ExtImageHeader_t;
/*useful offsets */
#define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET (0x00)
#define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET (0x08)
#define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET (0x0C)
#define MPI2_EXT_IMAGE_HEADER_SIZE (0x40)
/*defines for the ImageType field */
#define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
#define MPI2_EXT_IMAGE_TYPE_FW (0x01)
#define MPI2_EXT_IMAGE_TYPE_NVDATA (0x03)
#define MPI2_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
#define MPI2_EXT_IMAGE_TYPE_INITIALIZATION (0x05)
#define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT (0x06)
#define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES (0x07)
#define MPI2_EXT_IMAGE_TYPE_MEGARAID (0x08)
#define MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC (0x80)
#define MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC (0xFF)
#define MPI2_EXT_IMAGE_TYPE_MAX (MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC)
/*FLASH Layout Extended Image Data */
/*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to
*one and check RegionsPerLayout at runtime.
*/
#ifndef MPI2_FLASH_NUMBER_OF_REGIONS
#define MPI2_FLASH_NUMBER_OF_REGIONS (1)
#endif
/*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to
*one and check NumberOfLayouts at runtime.
*/
#ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
#define MPI2_FLASH_NUMBER_OF_LAYOUTS (1)
#endif
typedef struct _MPI2_FLASH_REGION {
U8 RegionType; /*0x00 */
U8 Reserved1; /*0x01 */
U16 Reserved2; /*0x02 */
U32 RegionOffset; /*0x04 */
U32 RegionSize; /*0x08 */
U32 Reserved3; /*0x0C */
} MPI2_FLASH_REGION, *PTR_MPI2_FLASH_REGION,
Mpi2FlashRegion_t, *pMpi2FlashRegion_t;
typedef struct _MPI2_FLASH_LAYOUT {
U32 FlashSize; /*0x00 */
U32 Reserved1; /*0x04 */
U32 Reserved2; /*0x08 */
U32 Reserved3; /*0x0C */
MPI2_FLASH_REGION Region[MPI2_FLASH_NUMBER_OF_REGIONS]; /*0x10 */
} MPI2_FLASH_LAYOUT, *PTR_MPI2_FLASH_LAYOUT,
Mpi2FlashLayout_t, *pMpi2FlashLayout_t;
typedef struct _MPI2_FLASH_LAYOUT_DATA {
U8 ImageRevision; /*0x00 */
U8 Reserved1; /*0x01 */
U8 SizeOfRegion; /*0x02 */
U8 Reserved2; /*0x03 */
U16 NumberOfLayouts; /*0x04 */
U16 RegionsPerLayout; /*0x06 */
U16 MinimumSectorAlignment; /*0x08 */
U16 Reserved3; /*0x0A */
U32 Reserved4; /*0x0C */
MPI2_FLASH_LAYOUT Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS]; /*0x10 */
} MPI2_FLASH_LAYOUT_DATA, *PTR_MPI2_FLASH_LAYOUT_DATA,
Mpi2FlashLayoutData_t, *pMpi2FlashLayoutData_t;
/*defines for the RegionType field */
#define MPI2_FLASH_REGION_UNUSED (0x00)
#define MPI2_FLASH_REGION_FIRMWARE (0x01)
#define MPI2_FLASH_REGION_BIOS (0x02)
#define MPI2_FLASH_REGION_NVDATA (0x03)
#define MPI2_FLASH_REGION_FIRMWARE_BACKUP (0x05)
#define MPI2_FLASH_REGION_MFG_INFORMATION (0x06)
#define MPI2_FLASH_REGION_CONFIG_1 (0x07)
#define MPI2_FLASH_REGION_CONFIG_2 (0x08)
#define MPI2_FLASH_REGION_MEGARAID (0x09)
#define MPI2_FLASH_REGION_INIT (0x0A)
/*ImageRevision */
#define MPI2_FLASH_LAYOUT_IMAGE_REVISION (0x00)
/*Supported Devices Extended Image Data */
/*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to
*one and check NumberOfDevices at runtime.
*/
#ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
#define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES (1)
#endif
typedef struct _MPI2_SUPPORTED_DEVICE {
U16 DeviceID; /*0x00 */
U16 VendorID; /*0x02 */
U16 DeviceIDMask; /*0x04 */
U16 Reserved1; /*0x06 */
U8 LowPCIRev; /*0x08 */
U8 HighPCIRev; /*0x09 */
U16 Reserved2; /*0x0A */
U32 Reserved3; /*0x0C */
} MPI2_SUPPORTED_DEVICE, *PTR_MPI2_SUPPORTED_DEVICE,
Mpi2SupportedDevice_t, *pMpi2SupportedDevice_t;
typedef struct _MPI2_SUPPORTED_DEVICES_DATA {
U8 ImageRevision; /*0x00 */
U8 Reserved1; /*0x01 */
U8 NumberOfDevices; /*0x02 */
U8 Reserved2; /*0x03 */
U32 Reserved3; /*0x04 */
MPI2_SUPPORTED_DEVICE
SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES];/*0x08 */
} MPI2_SUPPORTED_DEVICES_DATA, *PTR_MPI2_SUPPORTED_DEVICES_DATA,
Mpi2SupportedDevicesData_t, *pMpi2SupportedDevicesData_t;
/*ImageRevision */
#define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION (0x00)
/*Init Extended Image Data */
typedef struct _MPI2_INIT_IMAGE_FOOTER {
U32 BootFlags; /*0x00 */
U32 ImageSize; /*0x04 */
U32 Signature0; /*0x08 */
U32 Signature1; /*0x0C */
U32 Signature2; /*0x10 */
U32 ResetVector; /*0x14 */
} MPI2_INIT_IMAGE_FOOTER, *PTR_MPI2_INIT_IMAGE_FOOTER,
Mpi2InitImageFooter_t, *pMpi2InitImageFooter_t;
/*defines for the BootFlags field */
#define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET (0x00)
/*defines for the ImageSize field */
#define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET (0x04)
/*defines for the Signature0 field */
#define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET (0x08)
#define MPI2_INIT_IMAGE_SIGNATURE0 (0x5AA55AEA)
/*defines for the Signature1 field */
#define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET (0x0C)
#define MPI2_INIT_IMAGE_SIGNATURE1 (0xA55AEAA5)
/*defines for the Signature2 field */
#define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET (0x10)
#define MPI2_INIT_IMAGE_SIGNATURE2 (0x5AEAA55A)
/*Signature fields as individual bytes */
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0 (0xEA)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1 (0x5A)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2 (0xA5)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3 (0x5A)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4 (0xA5)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5 (0xEA)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6 (0x5A)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7 (0xA5)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8 (0x5A)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9 (0xA5)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A (0xEA)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B (0x5A)
/*defines for the ResetVector field */
#define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET (0x14)
/****************************************************************************
* PowerManagementControl message
****************************************************************************/
/*PowerManagementControl Request message */
typedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST {
U8 Feature; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U8 Parameter1; /*0x0C */
U8 Parameter2; /*0x0D */
U8 Parameter3; /*0x0E */
U8 Parameter4; /*0x0F */
U32 Reserved5; /*0x10 */
U32 Reserved6; /*0x14 */
} MPI2_PWR_MGMT_CONTROL_REQUEST, *PTR_MPI2_PWR_MGMT_CONTROL_REQUEST,
Mpi2PwrMgmtControlRequest_t, *pMpi2PwrMgmtControlRequest_t;
/*defines for the Feature field */
#define MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND (0x01)
#define MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION (0x02)
#define MPI2_PM_CONTROL_FEATURE_PCIE_LINK (0x03) /*obsolete */
#define MPI2_PM_CONTROL_FEATURE_IOC_SPEED (0x04)
#define MPI2_PM_CONTROL_FEATURE_GLOBAL_PWR_MGMT_MODE (0x05)
#define MPI2_PM_CONTROL_FEATURE_MIN_PRODUCT_SPECIFIC (0x80)
#define MPI2_PM_CONTROL_FEATURE_MAX_PRODUCT_SPECIFIC (0xFF)
/*parameter usage for the MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND Feature */
/*Parameter1 contains a PHY number */
/*Parameter2 indicates power condition action using these defines */
#define MPI2_PM_CONTROL_PARAM2_PARTIAL (0x01)
#define MPI2_PM_CONTROL_PARAM2_SLUMBER (0x02)
#define MPI2_PM_CONTROL_PARAM2_EXIT_PWR_MGMT (0x03)
/*Parameter3 and Parameter4 are reserved */
/*parameter usage for the MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION
* Feature */
/*Parameter1 contains SAS port width modulation group number */
/*Parameter2 indicates IOC action using these defines */
#define MPI2_PM_CONTROL_PARAM2_REQUEST_OWNERSHIP (0x01)
#define MPI2_PM_CONTROL_PARAM2_CHANGE_MODULATION (0x02)
#define MPI2_PM_CONTROL_PARAM2_RELINQUISH_OWNERSHIP (0x03)
/*Parameter3 indicates desired modulation level using these defines */
#define MPI2_PM_CONTROL_PARAM3_25_PERCENT (0x00)
#define MPI2_PM_CONTROL_PARAM3_50_PERCENT (0x01)
#define MPI2_PM_CONTROL_PARAM3_75_PERCENT (0x02)
#define MPI2_PM_CONTROL_PARAM3_100_PERCENT (0x03)
/*Parameter4 is reserved */
/*this next set (_PCIE_LINK) is obsolete */
/*parameter usage for the MPI2_PM_CONTROL_FEATURE_PCIE_LINK Feature */
/*Parameter1 indicates desired PCIe link speed using these defines */
#define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS (0x00) /*obsolete */
#define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS (0x01) /*obsolete */
#define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS (0x02) /*obsolete */
/*Parameter2 indicates desired PCIe link width using these defines */
#define MPI2_PM_CONTROL_PARAM2_WIDTH_X1 (0x01) /*obsolete */
#define MPI2_PM_CONTROL_PARAM2_WIDTH_X2 (0x02) /*obsolete */
#define MPI2_PM_CONTROL_PARAM2_WIDTH_X4 (0x04) /*obsolete */
#define MPI2_PM_CONTROL_PARAM2_WIDTH_X8 (0x08) /*obsolete */
/*Parameter3 and Parameter4 are reserved */
/*parameter usage for the MPI2_PM_CONTROL_FEATURE_IOC_SPEED Feature */
/*Parameter1 indicates desired IOC hardware clock speed using these defines */
#define MPI2_PM_CONTROL_PARAM1_FULL_IOC_SPEED (0x01)
#define MPI2_PM_CONTROL_PARAM1_HALF_IOC_SPEED (0x02)
#define MPI2_PM_CONTROL_PARAM1_QUARTER_IOC_SPEED (0x04)
#define MPI2_PM_CONTROL_PARAM1_EIGHTH_IOC_SPEED (0x08)
/*Parameter2, Parameter3, and Parameter4 are reserved */
/*parameter usage for the MPI2_PM_CONTROL_FEATURE_GLOBAL_PWR_MGMT_MODE Feature*/
/*Parameter1 indicates host action regarding global power management mode */
#define MPI2_PM_CONTROL_PARAM1_TAKE_CONTROL (0x01)
#define MPI2_PM_CONTROL_PARAM1_CHANGE_GLOBAL_MODE (0x02)
#define MPI2_PM_CONTROL_PARAM1_RELEASE_CONTROL (0x03)
/*Parameter2 indicates the requested global power management mode */
#define MPI2_PM_CONTROL_PARAM2_FULL_PWR_PERF (0x01)
#define MPI2_PM_CONTROL_PARAM2_REDUCED_PWR_PERF (0x08)
#define MPI2_PM_CONTROL_PARAM2_STANDBY (0x40)
/*Parameter3 and Parameter4 are reserved */
/*PowerManagementControl Reply message */
typedef struct _MPI2_PWR_MGMT_CONTROL_REPLY {
U8 Feature; /*0x00 */
U8 Reserved1; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
} MPI2_PWR_MGMT_CONTROL_REPLY, *PTR_MPI2_PWR_MGMT_CONTROL_REPLY,
Mpi2PwrMgmtControlReply_t, *pMpi2PwrMgmtControlReply_t;
#endif
drivers/scsi/mpt3sas/mpi/mpi2_raid.h 0 → 100644
View file @ f92363d1
/*
* Copyright (c) 2000-2012 LSI Corporation.
*
*
* Name: mpi2_raid.h
* Title: MPI Integrated RAID messages and structures
* Creation Date: April 26, 2007
*
* mpi2_raid.h Version: 02.00.08
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Modifications to RAID Action request and reply,
* including the Actions and ActionData.
* 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD.
* 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that
* the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT
* can be sized by the build environment.
* 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of
* VolumeCreationFlags and marked the old one as obsolete.
* 05-12-10 02.00.05 Added MPI2_RAID_VOL_FLAGS_OP_MDC define.
* 08-24-10 02.00.06 Added MPI2_RAID_ACTION_COMPATIBILITY_CHECK along with
* related structures and defines.
* Added product-specific range to RAID Action values.
* 11-18-11 02.00.07 Incorporating additions for MPI v2.5.
* 02-06-12 02.00.08 Added MPI2_RAID_ACTION_PHYSDISK_HIDDEN.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_RAID_H
#define MPI2_RAID_H
/*****************************************************************************
*
* Integrated RAID Messages
*
*****************************************************************************/
/****************************************************************************
* RAID Action messages
****************************************************************************/
/*ActionDataWord defines for use with MPI2_RAID_ACTION_DELETE_VOLUME action */
#define MPI2_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000)
#define MPI2_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000001)
/*use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for
*MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
/*ActionDataWord defines for use with
*MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES action */
#define MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD (0x00000001)
/*ActionDataWord for MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE Action */
typedef struct _MPI2_RAID_ACTION_RATE_DATA {
U8 RateToChange; /*0x00 */
U8 RateOrMode; /*0x01 */
U16 DataScrubDuration; /*0x02 */
} MPI2_RAID_ACTION_RATE_DATA, *PTR_MPI2_RAID_ACTION_RATE_DATA,
Mpi2RaidActionRateData_t, *pMpi2RaidActionRateData_t;
#define MPI2_RAID_ACTION_SET_RATE_RESYNC (0x00)
#define MPI2_RAID_ACTION_SET_RATE_DATA_SCRUB (0x01)
#define MPI2_RAID_ACTION_SET_RATE_POWERSAVE_MODE (0x02)
/*ActionDataWord for MPI2_RAID_ACTION_START_RAID_FUNCTION Action */
typedef struct _MPI2_RAID_ACTION_START_RAID_FUNCTION {
U8 RAIDFunction; /*0x00 */
U8 Flags; /*0x01 */
U16 Reserved1; /*0x02 */
} MPI2_RAID_ACTION_START_RAID_FUNCTION,
*PTR_MPI2_RAID_ACTION_START_RAID_FUNCTION,
Mpi2RaidActionStartRaidFunction_t,
*pMpi2RaidActionStartRaidFunction_t;
/*defines for the RAIDFunction field */
#define MPI2_RAID_ACTION_START_BACKGROUND_INIT (0x00)
#define MPI2_RAID_ACTION_START_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_RAID_ACTION_START_CONSISTENCY_CHECK (0x02)
/*defines for the Flags field */
#define MPI2_RAID_ACTION_START_NEW (0x00)
#define MPI2_RAID_ACTION_START_RESUME (0x01)
/*ActionDataWord for MPI2_RAID_ACTION_STOP_RAID_FUNCTION Action */
typedef struct _MPI2_RAID_ACTION_STOP_RAID_FUNCTION {
U8 RAIDFunction; /*0x00 */
U8 Flags; /*0x01 */
U16 Reserved1; /*0x02 */
} MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
*PTR_MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
Mpi2RaidActionStopRaidFunction_t,
*pMpi2RaidActionStopRaidFunction_t;
/*defines for the RAIDFunction field */
#define MPI2_RAID_ACTION_STOP_BACKGROUND_INIT (0x00)
#define MPI2_RAID_ACTION_STOP_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_RAID_ACTION_STOP_CONSISTENCY_CHECK (0x02)
/*defines for the Flags field */
#define MPI2_RAID_ACTION_STOP_ABORT (0x00)
#define MPI2_RAID_ACTION_STOP_PAUSE (0x01)
/*ActionDataWord for MPI2_RAID_ACTION_CREATE_HOT_SPARE Action */
typedef struct _MPI2_RAID_ACTION_HOT_SPARE {
U8 HotSparePool; /*0x00 */
U8 Reserved1; /*0x01 */
U16 DevHandle; /*0x02 */
} MPI2_RAID_ACTION_HOT_SPARE, *PTR_MPI2_RAID_ACTION_HOT_SPARE,
Mpi2RaidActionHotSpare_t, *pMpi2RaidActionHotSpare_t;
/*ActionDataWord for MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE Action */
typedef struct _MPI2_RAID_ACTION_FW_UPDATE_MODE {
U8 Flags; /*0x00 */
U8 DeviceFirmwareUpdateModeTimeout; /*0x01 */
U16 Reserved1; /*0x02 */
} MPI2_RAID_ACTION_FW_UPDATE_MODE,
*PTR_MPI2_RAID_ACTION_FW_UPDATE_MODE,
Mpi2RaidActionFwUpdateMode_t,
*pMpi2RaidActionFwUpdateMode_t;
/*ActionDataWord defines for use with
*MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */
#define MPI2_RAID_ACTION_ADATA_DISABLE_FW_UPDATE (0x00)
#define MPI2_RAID_ACTION_ADATA_ENABLE_FW_UPDATE (0x01)
typedef union _MPI2_RAID_ACTION_DATA {
U32 Word;
MPI2_RAID_ACTION_RATE_DATA Rates;
MPI2_RAID_ACTION_START_RAID_FUNCTION StartRaidFunction;
MPI2_RAID_ACTION_STOP_RAID_FUNCTION StopRaidFunction;
MPI2_RAID_ACTION_HOT_SPARE HotSpare;
MPI2_RAID_ACTION_FW_UPDATE_MODE FwUpdateMode;
} MPI2_RAID_ACTION_DATA, *PTR_MPI2_RAID_ACTION_DATA,
Mpi2RaidActionData_t, *pMpi2RaidActionData_t;
/*RAID Action Request Message */
typedef struct _MPI2_RAID_ACTION_REQUEST {
U8 Action; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 VolDevHandle; /*0x04 */
U8 PhysDiskNum; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved2; /*0x0A */
U32 Reserved3; /*0x0C */
MPI2_RAID_ACTION_DATA ActionDataWord; /*0x10 */
MPI2_SGE_SIMPLE_UNION ActionDataSGE; /*0x14 */
} MPI2_RAID_ACTION_REQUEST, *PTR_MPI2_RAID_ACTION_REQUEST,
Mpi2RaidActionRequest_t, *pMpi2RaidActionRequest_t;
/*RAID Action request Action values */
#define MPI2_RAID_ACTION_INDICATOR_STRUCT (0x01)
#define MPI2_RAID_ACTION_CREATE_VOLUME (0x02)
#define MPI2_RAID_ACTION_DELETE_VOLUME (0x03)
#define MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES (0x04)
#define MPI2_RAID_ACTION_ENABLE_ALL_VOLUMES (0x05)
#define MPI2_RAID_ACTION_PHYSDISK_OFFLINE (0x0A)
#define MPI2_RAID_ACTION_PHYSDISK_ONLINE (0x0B)
#define MPI2_RAID_ACTION_FAIL_PHYSDISK (0x0F)
#define MPI2_RAID_ACTION_ACTIVATE_VOLUME (0x11)
#define MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE (0x15)
#define MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE (0x17)
#define MPI2_RAID_ACTION_SET_VOLUME_NAME (0x18)
#define MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE (0x19)
#define MPI2_RAID_ACTION_ENABLE_FAILED_VOLUME (0x1C)
#define MPI2_RAID_ACTION_CREATE_HOT_SPARE (0x1D)
#define MPI2_RAID_ACTION_DELETE_HOT_SPARE (0x1E)
#define MPI2_RAID_ACTION_SYSTEM_SHUTDOWN_INITIATED (0x20)
#define MPI2_RAID_ACTION_START_RAID_FUNCTION (0x21)
#define MPI2_RAID_ACTION_STOP_RAID_FUNCTION (0x22)
#define MPI2_RAID_ACTION_COMPATIBILITY_CHECK (0x23)
#define MPI2_RAID_ACTION_PHYSDISK_HIDDEN (0x24)
#define MPI2_RAID_ACTION_MIN_PRODUCT_SPECIFIC (0x80)
#define MPI2_RAID_ACTION_MAX_PRODUCT_SPECIFIC (0xFF)
/*RAID Volume Creation Structure */
/*
*The following define can be customized for the targeted product.
*/
#ifndef MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS
#define MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS (1)
#endif
typedef struct _MPI2_RAID_VOLUME_PHYSDISK {
U8 RAIDSetNum; /*0x00 */
U8 PhysDiskMap; /*0x01 */
U16 PhysDiskDevHandle; /*0x02 */
} MPI2_RAID_VOLUME_PHYSDISK, *PTR_MPI2_RAID_VOLUME_PHYSDISK,
Mpi2RaidVolumePhysDisk_t, *pMpi2RaidVolumePhysDisk_t;
/*defines for the PhysDiskMap field */
#define MPI2_RAIDACTION_PHYSDISK_PRIMARY (0x01)
#define MPI2_RAIDACTION_PHYSDISK_SECONDARY (0x02)
typedef struct _MPI2_RAID_VOLUME_CREATION_STRUCT {
U8 NumPhysDisks; /*0x00 */
U8 VolumeType; /*0x01 */
U16 Reserved1; /*0x02 */
U32 VolumeCreationFlags; /*0x04 */
U32 VolumeSettings; /*0x08 */
U8 Reserved2; /*0x0C */
U8 ResyncRate; /*0x0D */
U16 DataScrubDuration; /*0x0E */
U64 VolumeMaxLBA; /*0x10 */
U32 StripeSize; /*0x18 */
U8 Name[16]; /*0x1C */
MPI2_RAID_VOLUME_PHYSDISK
PhysDisk[MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS]; /*0x2C */
} MPI2_RAID_VOLUME_CREATION_STRUCT,
*PTR_MPI2_RAID_VOLUME_CREATION_STRUCT,
Mpi2RaidVolumeCreationStruct_t,
*pMpi2RaidVolumeCreationStruct_t;
/*use MPI2_RAID_VOL_TYPE_ defines from mpi2_cnfg.h for VolumeType */
/*defines for the VolumeCreationFlags field */
#define MPI2_RAID_VOL_CREATION_DEFAULT_SETTINGS (0x80000000)
#define MPI2_RAID_VOL_CREATION_BACKGROUND_INIT (0x00000004)
#define MPI2_RAID_VOL_CREATION_LOW_LEVEL_INIT (0x00000002)
#define MPI2_RAID_VOL_CREATION_MIGRATE_DATA (0x00000001)
/*The following is an obsolete define.
*It must be shifted left 24 bits in order to set the proper bit.
*/
#define MPI2_RAID_VOL_CREATION_USE_DEFAULT_SETTINGS (0x80)
/*RAID Online Capacity Expansion Structure */
typedef struct _MPI2_RAID_ONLINE_CAPACITY_EXPANSION {
U32 Flags; /*0x00 */
U16 DevHandle0; /*0x04 */
U16 Reserved1; /*0x06 */
U16 DevHandle1; /*0x08 */
U16 Reserved2; /*0x0A */
} MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
*PTR_MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
Mpi2RaidOnlineCapacityExpansion_t,
*pMpi2RaidOnlineCapacityExpansion_t;
/*RAID Compatibility Input Structure */
typedef struct _MPI2_RAID_COMPATIBILITY_INPUT_STRUCT {
U16 SourceDevHandle; /*0x00 */
U16 CandidateDevHandle; /*0x02 */
U32 Flags; /*0x04 */
U32 Reserved1; /*0x08 */
U32 Reserved2; /*0x0C */
} MPI2_RAID_COMPATIBILITY_INPUT_STRUCT,
*PTR_MPI2_RAID_COMPATIBILITY_INPUT_STRUCT,
Mpi2RaidCompatibilityInputStruct_t,
*pMpi2RaidCompatibilityInputStruct_t;
/*defines for RAID Compatibility Structure Flags field */
#define MPI2_RAID_COMPAT_SOURCE_IS_VOLUME_FLAG (0x00000002)
#define MPI2_RAID_COMPAT_REPORT_SOURCE_INFO_FLAG (0x00000001)
/*RAID Volume Indicator Structure */
typedef struct _MPI2_RAID_VOL_INDICATOR {
U64 TotalBlocks; /*0x00 */
U64 BlocksRemaining; /*0x08 */
U32 Flags; /*0x10 */
} MPI2_RAID_VOL_INDICATOR, *PTR_MPI2_RAID_VOL_INDICATOR,
Mpi2RaidVolIndicator_t, *pMpi2RaidVolIndicator_t;
/*defines for RAID Volume Indicator Flags field */
#define MPI2_RAID_VOL_FLAGS_OP_MASK (0x0000000F)
#define MPI2_RAID_VOL_FLAGS_OP_BACKGROUND_INIT (0x00000000)
#define MPI2_RAID_VOL_FLAGS_OP_ONLINE_CAP_EXPANSION (0x00000001)
#define MPI2_RAID_VOL_FLAGS_OP_CONSISTENCY_CHECK (0x00000002)
#define MPI2_RAID_VOL_FLAGS_OP_RESYNC (0x00000003)
#define MPI2_RAID_VOL_FLAGS_OP_MDC (0x00000004)
/*RAID Compatibility Result Structure */
typedef struct _MPI2_RAID_COMPATIBILITY_RESULT_STRUCT {
U8 State; /*0x00 */
U8 Reserved1; /*0x01 */
U16 Reserved2; /*0x02 */
U32 GenericAttributes; /*0x04 */
U32 OEMSpecificAttributes; /*0x08 */
U32 Reserved3; /*0x0C */
U32 Reserved4; /*0x10 */
} MPI2_RAID_COMPATIBILITY_RESULT_STRUCT,
*PTR_MPI2_RAID_COMPATIBILITY_RESULT_STRUCT,
Mpi2RaidCompatibilityResultStruct_t,
*pMpi2RaidCompatibilityResultStruct_t;
/*defines for RAID Compatibility Result Structure State field */
#define MPI2_RAID_COMPAT_STATE_COMPATIBLE (0x00)
#define MPI2_RAID_COMPAT_STATE_NOT_COMPATIBLE (0x01)
/*defines for RAID Compatibility Result Structure GenericAttributes field */
#define MPI2_RAID_COMPAT_GENATTRIB_4K_SECTOR (0x00000010)
#define MPI2_RAID_COMPAT_GENATTRIB_MEDIA_MASK (0x0000000C)
#define MPI2_RAID_COMPAT_GENATTRIB_SOLID_STATE_DRIVE (0x00000008)
#define MPI2_RAID_COMPAT_GENATTRIB_HARD_DISK_DRIVE (0x00000004)
#define MPI2_RAID_COMPAT_GENATTRIB_PROTOCOL_MASK (0x00000003)
#define MPI2_RAID_COMPAT_GENATTRIB_SAS_PROTOCOL (0x00000002)
#define MPI2_RAID_COMPAT_GENATTRIB_SATA_PROTOCOL (0x00000001)
/*RAID Action Reply ActionData union */
typedef union _MPI2_RAID_ACTION_REPLY_DATA {
U32 Word[5];
MPI2_RAID_VOL_INDICATOR RaidVolumeIndicator;
U16 VolDevHandle;
U8 VolumeState;
U8 PhysDiskNum;
MPI2_RAID_COMPATIBILITY_RESULT_STRUCT RaidCompatibilityResult;
} MPI2_RAID_ACTION_REPLY_DATA, *PTR_MPI2_RAID_ACTION_REPLY_DATA,
Mpi2RaidActionReplyData_t, *pMpi2RaidActionReplyData_t;
/*use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for
*MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
/*RAID Action Reply Message */
typedef struct _MPI2_RAID_ACTION_REPLY {
U8 Action; /*0x00 */
U8 Reserved1; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 VolDevHandle; /*0x04 */
U8 PhysDiskNum; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved2; /*0x0A */
U16 Reserved3; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
MPI2_RAID_ACTION_REPLY_DATA ActionData; /*0x14 */
} MPI2_RAID_ACTION_REPLY, *PTR_MPI2_RAID_ACTION_REPLY,
Mpi2RaidActionReply_t, *pMpi2RaidActionReply_t;
#endif
drivers/scsi/mpt3sas/mpi/mpi2_sas.h 0 → 100644
View file @ f92363d1
/*
* Copyright (c) 2000-2012 LSI Corporation.
*
*
* Name: mpi2_sas.h
* Title: MPI Serial Attached SCSI structures and definitions
* Creation Date: February 9, 2007
*
* mpi2_sas.h Version: 02.00.07
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit
* Control Request.
* 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
* Request.
* 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST
* to MPI2_SGE_IO_UNION since it supports chained SGLs.
* 05-12-10 02.00.04 Modified some comments.
* 08-11-10 02.00.05 Added NCQ operations to SAS IO Unit Control.
* 11-18-11 02.00.06 Incorporating additions for MPI v2.5.
* 07-10-12 02.00.07 Added MPI2_SATA_PT_SGE_UNION for use in the SATA
* Passthrough Request message.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_SAS_H
#define MPI2_SAS_H
/*
*Values for SASStatus.
*/
#define MPI2_SASSTATUS_SUCCESS (0x00)
#define MPI2_SASSTATUS_UNKNOWN_ERROR (0x01)
#define MPI2_SASSTATUS_INVALID_FRAME (0x02)
#define MPI2_SASSTATUS_UTC_BAD_DEST (0x03)
#define MPI2_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
#define MPI2_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
#define MPI2_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
#define MPI2_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
#define MPI2_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
#define MPI2_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
#define MPI2_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
#define MPI2_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
#define MPI2_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
#define MPI2_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
#define MPI2_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
#define MPI2_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
#define MPI2_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
#define MPI2_SASSTATUS_DATA_OFFSET_ERROR (0x11)
#define MPI2_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
#define MPI2_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
#define MPI2_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
/*
*Values for the SAS DeviceInfo field used in SAS Device Status Change Event
*data and SAS Configuration pages.
*/
#define MPI2_SAS_DEVICE_INFO_SEP (0x00004000)
#define MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
#define MPI2_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
#define MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
#define MPI2_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
#define MPI2_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
#define MPI2_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
#define MPI2_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
#define MPI2_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
#define MPI2_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
#define MPI2_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
#define MPI2_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
#define MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
#define MPI2_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
#define MPI2_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
#define MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
#define MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/*****************************************************************************
*
* SAS Messages
*
*****************************************************************************/
/****************************************************************************
* SMP Passthrough messages
****************************************************************************/
/*SMP Passthrough Request Message */
typedef struct _MPI2_SMP_PASSTHROUGH_REQUEST {
U8 PassthroughFlags; /*0x00 */
U8 PhysicalPort; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 RequestDataLength; /*0x04 */
U8 SGLFlags; /*0x06*//*MPI v2.0 only. Reserved on MPI v2.5*/
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved1; /*0x0A */
U32 Reserved2; /*0x0C */
U64 SASAddress; /*0x10 */
U32 Reserved3; /*0x18 */
U32 Reserved4; /*0x1C */
MPI2_SIMPLE_SGE_UNION SGL;/*0x20 */
} MPI2_SMP_PASSTHROUGH_REQUEST, *PTR_MPI2_SMP_PASSTHROUGH_REQUEST,
Mpi2SmpPassthroughRequest_t, *pMpi2SmpPassthroughRequest_t;
/*values for PassthroughFlags field */
#define MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
/*MPI v2.0: use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/*SMP Passthrough Reply Message */
typedef struct _MPI2_SMP_PASSTHROUGH_REPLY {
U8 PassthroughFlags; /*0x00 */
U8 PhysicalPort; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 ResponseDataLength; /*0x04 */
U8 SGLFlags; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved1; /*0x0A */
U8 Reserved2; /*0x0C */
U8 SASStatus; /*0x0D */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U32 Reserved3; /*0x14 */
U8 ResponseData[4]; /*0x18 */
} MPI2_SMP_PASSTHROUGH_REPLY, *PTR_MPI2_SMP_PASSTHROUGH_REPLY,
Mpi2SmpPassthroughReply_t, *pMpi2SmpPassthroughReply_t;
/*values for PassthroughFlags field */
#define MPI2_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
/*values for SASStatus field are at the top of this file */
/****************************************************************************
* SATA Passthrough messages
****************************************************************************/
typedef union _MPI2_SATA_PT_SGE_UNION {
MPI2_SGE_SIMPLE_UNION MpiSimple; /*MPI v2.0 only */
MPI2_SGE_CHAIN_UNION MpiChain; /*MPI v2.0 only */
MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
MPI2_IEEE_SGE_CHAIN_UNION IeeeChain; /*MPI v2.0 only */
MPI25_IEEE_SGE_CHAIN64 IeeeChain64; /*MPI v2.5 only */
} MPI2_SATA_PT_SGE_UNION, *PTR_MPI2_SATA_PT_SGE_UNION,
Mpi2SataPTSGEUnion_t, *pMpi2SataPTSGEUnion_t;
/*SATA Passthrough Request Message */
typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST {
U16 DevHandle; /*0x00 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 PassthroughFlags; /*0x04 */
U8 SGLFlags; /*0x06*//*MPI v2.0 only. Reserved on MPI v2.5*/
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved1; /*0x0A */
U32 Reserved2; /*0x0C */
U32 Reserved3; /*0x10 */
U32 Reserved4; /*0x14 */
U32 DataLength; /*0x18 */
U8 CommandFIS[20]; /*0x1C */
MPI2_SATA_PT_SGE_UNION SGL;/*0x30*//*MPI v2.5: IEEE 64 elements only*/
} MPI2_SATA_PASSTHROUGH_REQUEST, *PTR_MPI2_SATA_PASSTHROUGH_REQUEST,
Mpi2SataPassthroughRequest_t,
*pMpi2SataPassthroughRequest_t;
/*values for PassthroughFlags field */
#define MPI2_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
#define MPI2_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
#define MPI2_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
#define MPI2_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
#define MPI2_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002)
#define MPI2_SATA_PT_REQ_PT_FLAGS_READ (0x0001)
/*MPI v2.0: use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/*SATA Passthrough Reply Message */
typedef struct _MPI2_SATA_PASSTHROUGH_REPLY {
U16 DevHandle; /*0x00 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 PassthroughFlags; /*0x04 */
U8 SGLFlags; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved1; /*0x0A */
U8 Reserved2; /*0x0C */
U8 SASStatus; /*0x0D */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U8 StatusFIS[20]; /*0x14 */
U32 StatusControlRegisters; /*0x28 */
U32 TransferCount; /*0x2C */
} MPI2_SATA_PASSTHROUGH_REPLY, *PTR_MPI2_SATA_PASSTHROUGH_REPLY,
Mpi2SataPassthroughReply_t, *pMpi2SataPassthroughReply_t;
/*values for SASStatus field are at the top of this file */
/****************************************************************************
* SAS IO Unit Control messages
****************************************************************************/
/*SAS IO Unit Control Request Message */
typedef struct _MPI2_SAS_IOUNIT_CONTROL_REQUEST {
U8 Operation; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 DevHandle; /*0x04 */
U8 IOCParameter; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved3; /*0x0A */
U16 Reserved4; /*0x0C */
U8 PhyNum; /*0x0E */
U8 PrimFlags; /*0x0F */
U32 Primitive; /*0x10 */
U8 LookupMethod; /*0x14 */
U8 Reserved5; /*0x15 */
U16 SlotNumber; /*0x16 */
U64 LookupAddress; /*0x18 */
U32 IOCParameterValue; /*0x20 */
U32 Reserved7; /*0x24 */
U32 Reserved8; /*0x28 */
} MPI2_SAS_IOUNIT_CONTROL_REQUEST,
*PTR_MPI2_SAS_IOUNIT_CONTROL_REQUEST,
Mpi2SasIoUnitControlRequest_t,
*pMpi2SasIoUnitControlRequest_t;
/*values for the Operation field */
#define MPI2_SAS_OP_CLEAR_ALL_PERSISTENT (0x02)
#define MPI2_SAS_OP_PHY_LINK_RESET (0x06)
#define MPI2_SAS_OP_PHY_HARD_RESET (0x07)
#define MPI2_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
#define MPI2_SAS_OP_SEND_PRIMITIVE (0x0A)
#define MPI2_SAS_OP_FORCE_FULL_DISCOVERY (0x0B)
#define MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL (0x0C)
#define MPI2_SAS_OP_REMOVE_DEVICE (0x0D)
#define MPI2_SAS_OP_LOOKUP_MAPPING (0x0E)
#define MPI2_SAS_OP_SET_IOC_PARAMETER (0x0F)
#define MPI25_SAS_OP_ENABLE_FP_DEVICE (0x10)
#define MPI25_SAS_OP_DISABLE_FP_DEVICE (0x11)
#define MPI25_SAS_OP_ENABLE_FP_ALL (0x12)
#define MPI25_SAS_OP_DISABLE_FP_ALL (0x13)
#define MPI2_SAS_OP_DEV_ENABLE_NCQ (0x14)
#define MPI2_SAS_OP_DEV_DISABLE_NCQ (0x15)
#define MPI2_SAS_OP_PRODUCT_SPECIFIC_MIN (0x80)
/*values for the PrimFlags field */
#define MPI2_SAS_PRIMFLAGS_SINGLE (0x08)
#define MPI2_SAS_PRIMFLAGS_TRIPLE (0x02)
#define MPI2_SAS_PRIMFLAGS_REDUNDANT (0x01)
/*values for the LookupMethod field */
#define MPI2_SAS_LOOKUP_METHOD_SAS_ADDRESS (0x01)
#define MPI2_SAS_LOOKUP_METHOD_SAS_ENCLOSURE_SLOT (0x02)
#define MPI2_SAS_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03)
/*SAS IO Unit Control Reply Message */
typedef struct _MPI2_SAS_IOUNIT_CONTROL_REPLY {
U8 Operation; /*0x00 */
U8 Reserved1; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 DevHandle; /*0x04 */
U8 IOCParameter; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved3; /*0x0A */
U16 Reserved4; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
} MPI2_SAS_IOUNIT_CONTROL_REPLY,
*PTR_MPI2_SAS_IOUNIT_CONTROL_REPLY,
Mpi2SasIoUnitControlReply_t, *pMpi2SasIoUnitControlReply_t;
#endif
drivers/scsi/mpt3sas/mpi/mpi2_tool.h 0 → 100644
View file @ f92363d1
/*
* Copyright (c) 2000-2012 LSI Corporation.
*
*
* Name: mpi2_tool.h
* Title: MPI diagnostic tool structures and definitions
* Creation Date: March 26, 2007
*
* mpi2_tool.h Version: 02.00.09
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release
* structures and defines.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool.
* 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request
* and reply messages.
* Added MPI2_DIAG_BUF_TYPE_EXTENDED.
* Incremented MPI2_DIAG_BUF_TYPE_COUNT.
* 05-12-10 02.00.05 Added Diagnostic Data Upload tool.
* 08-11-10 02.00.06 Added defines that were missing for Diagnostic Buffer
* Post Request.
* 05-25-11 02.00.07 Added Flags field and related defines to
* MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST.
* 11-18-11 02.00.08 Incorporating additions for MPI v2.5.
* 07-10-12 02.00.09 Add MPI v2.5 Toolbox Diagnostic CLI Tool Request
* message.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TOOL_H
#define MPI2_TOOL_H
/*****************************************************************************
*
* Toolbox Messages
*
*****************************************************************************/
/*defines for the Tools */
#define MPI2_TOOLBOX_CLEAN_TOOL (0x00)
#define MPI2_TOOLBOX_MEMORY_MOVE_TOOL (0x01)
#define MPI2_TOOLBOX_DIAG_DATA_UPLOAD_TOOL (0x02)
#define MPI2_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03)
#define MPI2_TOOLBOX_BEACON_TOOL (0x05)
#define MPI2_TOOLBOX_DIAGNOSTIC_CLI_TOOL (0x06)
/****************************************************************************
* Toolbox reply
****************************************************************************/
typedef struct _MPI2_TOOLBOX_REPLY {
U8 Tool; /*0x00 */
U8 Reserved1; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
} MPI2_TOOLBOX_REPLY, *PTR_MPI2_TOOLBOX_REPLY,
Mpi2ToolboxReply_t, *pMpi2ToolboxReply_t;
/****************************************************************************
* Toolbox Clean Tool request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_CLEAN_REQUEST {
U8 Tool; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U32 Flags; /*0x0C */
} MPI2_TOOLBOX_CLEAN_REQUEST, *PTR_MPI2_TOOLBOX_CLEAN_REQUEST,
Mpi2ToolboxCleanRequest_t, *pMpi2ToolboxCleanRequest_t;
/*values for the Flags field */
#define MPI2_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000)
#define MPI2_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000)
#define MPI2_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
#define MPI2_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
#define MPI2_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
#define MPI2_TOOLBOX_CLEAN_MEGARAID (0x02000000)
#define MPI2_TOOLBOX_CLEAN_INITIALIZATION (0x01000000)
#define MPI2_TOOLBOX_CLEAN_FLASH (0x00000004)
#define MPI2_TOOLBOX_CLEAN_SEEPROM (0x00000002)
#define MPI2_TOOLBOX_CLEAN_NVSRAM (0x00000001)
/****************************************************************************
* Toolbox Memory Move request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_MEM_MOVE_REQUEST {
U8 Tool; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
MPI2_SGE_SIMPLE_UNION SGL; /*0x0C */
} MPI2_TOOLBOX_MEM_MOVE_REQUEST, *PTR_MPI2_TOOLBOX_MEM_MOVE_REQUEST,
Mpi2ToolboxMemMoveRequest_t, *pMpi2ToolboxMemMoveRequest_t;
/****************************************************************************
* Toolbox Diagnostic Data Upload request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST {
U8 Tool; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U8 SGLFlags; /*0x0C */
U8 Reserved5; /*0x0D */
U16 Reserved6; /*0x0E */
U32 Flags; /*0x10 */
U32 DataLength; /*0x14 */
MPI2_SGE_SIMPLE_UNION SGL; /*0x18 */
} MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
*PTR_MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
Mpi2ToolboxDiagDataUploadRequest_t,
*pMpi2ToolboxDiagDataUploadRequest_t;
/*use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
typedef struct _MPI2_DIAG_DATA_UPLOAD_HEADER {
U32 DiagDataLength; /*00h */
U8 FormatCode; /*04h */
U8 Reserved1; /*05h */
U16 Reserved2; /*06h */
} MPI2_DIAG_DATA_UPLOAD_HEADER, *PTR_MPI2_DIAG_DATA_UPLOAD_HEADER,
Mpi2DiagDataUploadHeader_t, *pMpi2DiagDataUploadHeader_t;
/****************************************************************************
* Toolbox ISTWI Read Write Tool
****************************************************************************/
/*Toolbox ISTWI Read Write Tool request message */
typedef struct _MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST {
U8 Tool; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U32 Reserved5; /*0x0C */
U32 Reserved6; /*0x10 */
U8 DevIndex; /*0x14 */
U8 Action; /*0x15 */
U8 SGLFlags; /*0x16 */
U8 Flags; /*0x17 */
U16 TxDataLength; /*0x18 */
U16 RxDataLength; /*0x1A */
U32 Reserved8; /*0x1C */
U32 Reserved9; /*0x20 */
U32 Reserved10; /*0x24 */
U32 Reserved11; /*0x28 */
U32 Reserved12; /*0x2C */
MPI2_SGE_SIMPLE_UNION SGL; /*0x30 */
} MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
*PTR_MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
Mpi2ToolboxIstwiReadWriteRequest_t,
*pMpi2ToolboxIstwiReadWriteRequest_t;
/*values for the Action field */
#define MPI2_TOOL_ISTWI_ACTION_READ_DATA (0x01)
#define MPI2_TOOL_ISTWI_ACTION_WRITE_DATA (0x02)
#define MPI2_TOOL_ISTWI_ACTION_SEQUENCE (0x03)
#define MPI2_TOOL_ISTWI_ACTION_RESERVE_BUS (0x10)
#define MPI2_TOOL_ISTWI_ACTION_RELEASE_BUS (0x11)
#define MPI2_TOOL_ISTWI_ACTION_RESET (0x12)
/*use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/*values for the Flags field */
#define MPI2_TOOL_ISTWI_FLAG_AUTO_RESERVE_RELEASE (0x80)
#define MPI2_TOOL_ISTWI_FLAG_PAGE_ADDR_MASK (0x07)
/*Toolbox ISTWI Read Write Tool reply message */
typedef struct _MPI2_TOOLBOX_ISTWI_REPLY {
U8 Tool; /*0x00 */
U8 Reserved1; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U8 DevIndex; /*0x14 */
U8 Action; /*0x15 */
U8 IstwiStatus; /*0x16 */
U8 Reserved6; /*0x17 */
U16 TxDataCount; /*0x18 */
U16 RxDataCount; /*0x1A */
} MPI2_TOOLBOX_ISTWI_REPLY, *PTR_MPI2_TOOLBOX_ISTWI_REPLY,
Mpi2ToolboxIstwiReply_t, *pMpi2ToolboxIstwiReply_t;
/****************************************************************************
* Toolbox Beacon Tool request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_BEACON_REQUEST {
U8 Tool; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U8 Reserved5; /*0x0C */
U8 PhysicalPort; /*0x0D */
U8 Reserved6; /*0x0E */
U8 Flags; /*0x0F */
} MPI2_TOOLBOX_BEACON_REQUEST, *PTR_MPI2_TOOLBOX_BEACON_REQUEST,
Mpi2ToolboxBeaconRequest_t, *pMpi2ToolboxBeaconRequest_t;
/*values for the Flags field */
#define MPI2_TOOLBOX_FLAGS_BEACONMODE_OFF (0x00)
#define MPI2_TOOLBOX_FLAGS_BEACONMODE_ON (0x01)
/****************************************************************************
* Toolbox Diagnostic CLI Tool
****************************************************************************/
#define MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH (0x5C)
/*MPI v2.0 Toolbox Diagnostic CLI Tool request message */
typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST {
U8 Tool; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U8 SGLFlags; /*0x0C */
U8 Reserved5; /*0x0D */
U16 Reserved6; /*0x0E */
U32 DataLength; /*0x10 */
U8 DiagnosticCliCommand[MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH];/*0x14 */
MPI2_SGE_SIMPLE_UNION SGL; /*0x70 */
} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
*PTR_MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
Mpi2ToolboxDiagnosticCliRequest_t,
*pMpi2ToolboxDiagnosticCliRequest_t;
/*use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/*MPI v2.5 Toolbox Diagnostic CLI Tool request message */
typedef struct _MPI25_TOOLBOX_DIAGNOSTIC_CLI_REQUEST {
U8 Tool; /*0x00 */
U8 Reserved1; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U32 Reserved5; /*0x0C */
U32 DataLength; /*0x10 */
U8 DiagnosticCliCommand[MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH];/*0x14 */
MPI25_SGE_IO_UNION SGL; /*0x70 */
} MPI25_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
*PTR_MPI25_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
Mpi25ToolboxDiagnosticCliRequest_t,
*pMpi25ToolboxDiagnosticCliRequest_t;
/*Toolbox Diagnostic CLI Tool reply message */
typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY {
U8 Tool; /*0x00 */
U8 Reserved1; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U32 ReturnedDataLength; /*0x14 */
} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY,
*PTR_MPI2_TOOLBOX_DIAG_CLI_REPLY,
Mpi2ToolboxDiagnosticCliReply_t,
*pMpi2ToolboxDiagnosticCliReply_t;
/*****************************************************************************
*
* Diagnostic Buffer Messages
*
*****************************************************************************/
/****************************************************************************
* Diagnostic Buffer Post request
****************************************************************************/
typedef struct _MPI2_DIAG_BUFFER_POST_REQUEST {
U8 ExtendedType; /*0x00 */
U8 BufferType; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U64 BufferAddress; /*0x0C */
U32 BufferLength; /*0x14 */
U32 Reserved5; /*0x18 */
U32 Reserved6; /*0x1C */
U32 Flags; /*0x20 */
U32 ProductSpecific[23]; /*0x24 */
} MPI2_DIAG_BUFFER_POST_REQUEST, *PTR_MPI2_DIAG_BUFFER_POST_REQUEST,
Mpi2DiagBufferPostRequest_t, *pMpi2DiagBufferPostRequest_t;
/*values for the ExtendedType field */
#define MPI2_DIAG_EXTENDED_TYPE_UTILIZATION (0x02)
/*values for the BufferType field */
#define MPI2_DIAG_BUF_TYPE_TRACE (0x00)
#define MPI2_DIAG_BUF_TYPE_SNAPSHOT (0x01)
#define MPI2_DIAG_BUF_TYPE_EXTENDED (0x02)
/*count of the number of buffer types */
#define MPI2_DIAG_BUF_TYPE_COUNT (0x03)
/*values for the Flags field */
#define MPI2_DIAG_BUF_FLAG_RELEASE_ON_FULL (0x00000002)
#define MPI2_DIAG_BUF_FLAG_IMMEDIATE_RELEASE (0x00000001)
/****************************************************************************
* Diagnostic Buffer Post reply
****************************************************************************/
typedef struct _MPI2_DIAG_BUFFER_POST_REPLY {
U8 ExtendedType; /*0x00 */
U8 BufferType; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
U32 TransferLength; /*0x14 */
} MPI2_DIAG_BUFFER_POST_REPLY, *PTR_MPI2_DIAG_BUFFER_POST_REPLY,
Mpi2DiagBufferPostReply_t, *pMpi2DiagBufferPostReply_t;
/****************************************************************************
* Diagnostic Release request
****************************************************************************/
typedef struct _MPI2_DIAG_RELEASE_REQUEST {
U8 Reserved1; /*0x00 */
U8 BufferType; /*0x01 */
U8 ChainOffset; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
} MPI2_DIAG_RELEASE_REQUEST, *PTR_MPI2_DIAG_RELEASE_REQUEST,
Mpi2DiagReleaseRequest_t, *pMpi2DiagReleaseRequest_t;
/****************************************************************************
* Diagnostic Buffer Post reply
****************************************************************************/
typedef struct _MPI2_DIAG_RELEASE_REPLY {
U8 Reserved1; /*0x00 */
U8 BufferType; /*0x01 */
U8 MsgLength; /*0x02 */
U8 Function; /*0x03 */
U16 Reserved2; /*0x04 */
U8 Reserved3; /*0x06 */
U8 MsgFlags; /*0x07 */
U8 VP_ID; /*0x08 */
U8 VF_ID; /*0x09 */
U16 Reserved4; /*0x0A */
U16 Reserved5; /*0x0C */
U16 IOCStatus; /*0x0E */
U32 IOCLogInfo; /*0x10 */
} MPI2_DIAG_RELEASE_REPLY, *PTR_MPI2_DIAG_RELEASE_REPLY,
Mpi2DiagReleaseReply_t, *pMpi2DiagReleaseReply_t;
#endif
drivers/scsi/mpt3sas/mpi/mpi2_type.h 0 → 100644
View file @ f92363d1
/*
* Copyright (c) 2000-2007 LSI Corporation.
*
*
* Name: mpi2_type.h
* Title: MPI basic type definitions
* Creation Date: August 16, 2006
*
* mpi2_type.h Version: 02.00.00
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TYPE_H
#define MPI2_TYPE_H
/*******************************************************************************
* Define * if it hasn't already been defined. By default
* * is defined to be a near pointer. MPI2_POINTER can be defined as
* a far pointer by defining * as "far *" before this header file is
* included.
*/
/* the basic types may have already been included by mpi_type.h */
#ifndef MPI_TYPE_H
/*****************************************************************************
*
* Basic Types
*
*****************************************************************************/
typedef u8 U8;
typedef __le16 U16;
typedef __le32 U32;
typedef __le64 U64 __attribute__ ((aligned(4)));
/*****************************************************************************
*
* Pointer Types
*
*****************************************************************************/
typedef U8 *PU8;
typedef U16 *PU16;
typedef U32 *PU32;
typedef U64 *PU64;
#endif
#endif
drivers/scsi/mpt3sas/mpt3sas_base.c 0 → 100644
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This source diff could not be displayed because it is too large. You can view the blob instead.
drivers/scsi/mpt3sas/mpt3sas_base.h 0 → 100644
View file @ f92363d1
/*
* This is the Fusion MPT base driver providing common API layer interface
* for access to MPT (Message Passing Technology) firmware.
*
* This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
* Copyright (C) 2012 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* NO WARRANTY
* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
* solely responsible for determining the appropriateness of using and
* distributing the Program and assumes all risks associated with its
* exercise of rights under this Agreement, including but not limited to
* the risks and costs of program errors, damage to or loss of data,
* programs or equipment, and unavailability or interruption of operations.
* DISCLAIMER OF LIABILITY
* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
* USA.
*/
#ifndef MPT3SAS_BASE_H_INCLUDED
#define MPT3SAS_BASE_H_INCLUDED
#include "mpi/mpi2_type.h"
#include "mpi/mpi2.h"
#include "mpi/mpi2_ioc.h"
#include "mpi/mpi2_cnfg.h"
#include "mpi/mpi2_init.h"
#include "mpi/mpi2_raid.h"
#include "mpi/mpi2_tool.h"
#include "mpi/mpi2_sas.h"
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi_tcq.h>
#include <scsi/scsi_transport_sas.h>
#include <scsi/scsi_dbg.h>
#include <scsi/scsi_eh.h>
#include "mpt3sas_debug.h"
#include "mpt3sas_trigger_diag.h"
/* driver versioning info */
#define MPT3SAS_DRIVER_NAME "mpt3sas"
#define MPT3SAS_AUTHOR "LSI Corporation <DL-MPTFusionLinux@lsi.com>"
#define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
#define MPT3SAS_DRIVER_VERSION "01.100.01.00"
#define MPT3SAS_MAJOR_VERSION 1
#define MPT3SAS_MINOR_VERSION 100
#define MPT3SAS_BUILD_VERSION 1
#define MPT3SAS_RELEASE_VERSION 00
/*
* Set MPT3SAS_SG_DEPTH value based on user input.
*/
#define MPT3SAS_MAX_PHYS_SEGMENTS SCSI_MAX_SG_SEGMENTS
#define MPT3SAS_MIN_PHYS_SEGMENTS 16
#ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
#define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
#else
#define MPT3SAS_SG_DEPTH MPT3SAS_MAX_PHYS_SEGMENTS
#endif
/*
* Generic Defines
*/
#define MPT3SAS_SATA_QUEUE_DEPTH 32
#define MPT3SAS_SAS_QUEUE_DEPTH 254
#define MPT3SAS_RAID_QUEUE_DEPTH 128
#define MPT_NAME_LENGTH 32 /* generic length of strings */
#define MPT_STRING_LENGTH 64
#define MPT_MAX_CALLBACKS 32
#define CAN_SLEEP 1
#define NO_SLEEP 0
#define INTERNAL_CMDS_COUNT 10 /* reserved cmds */
#define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/
#define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
/*
* reset phases
*/
#define MPT3_IOC_PRE_RESET 1 /* prior to host reset */
#define MPT3_IOC_AFTER_RESET 2 /* just after host reset */
#define MPT3_IOC_DONE_RESET 3 /* links re-initialized */
/*
* logging format
*/
#define MPT3SAS_FMT "%s: "
/*
* per target private data
*/
#define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
#define MPT_TARGET_FLAGS_VOLUME 0x02
#define MPT_TARGET_FLAGS_DELETED 0x04
#define MPT_TARGET_FASTPATH_IO 0x08
/*
* status bits for ioc->diag_buffer_status
*/
#define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
#define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
#define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
/* OEM Identifiers */
#define MFG10_OEM_ID_INVALID (0x00000000)
#define MFG10_OEM_ID_DELL (0x00000001)
#define MFG10_OEM_ID_FSC (0x00000002)
#define MFG10_OEM_ID_SUN (0x00000003)
#define MFG10_OEM_ID_IBM (0x00000004)
/* GENERIC Flags 0*/
#define MFG10_GF0_OCE_DISABLED (0x00000001)
#define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
#define MFG10_GF0_R10_DISPLAY (0x00000004)
#define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
#define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
/* OEM Specific Flags will come from OEM specific header files */
struct Mpi2ManufacturingPage10_t {
MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
U8 OEMIdentifier; /* 04h */
U8 Reserved1; /* 05h */
U16 Reserved2; /* 08h */
U32 Reserved3; /* 0Ch */
U32 GenericFlags0; /* 10h */
U32 GenericFlags1; /* 14h */
U32 Reserved4; /* 18h */
U32 OEMSpecificFlags0; /* 1Ch */
U32 OEMSpecificFlags1; /* 20h */
U32 Reserved5[18]; /* 24h - 60h*/
};
/* Miscellaneous options */
struct Mpi2ManufacturingPage11_t {
MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
__le32 Reserved1; /* 04h */
u8 Reserved2; /* 08h */
u8 EEDPTagMode; /* 09h */
u8 Reserved3; /* 0Ah */
u8 Reserved4; /* 0Bh */
__le32 Reserved5[23]; /* 0Ch-60h*/
};
/**
* struct MPT3SAS_TARGET - starget private hostdata
* @starget: starget object
* @sas_address: target sas address
* @handle: device handle
* @num_luns: number luns
* @flags: MPT_TARGET_FLAGS_XXX flags
* @deleted: target flaged for deletion
* @tm_busy: target is busy with TM request.
*/
struct MPT3SAS_TARGET {
struct scsi_target *starget;
u64 sas_address;
u16 handle;
int num_luns;
u32 flags;
u8 deleted;
u8 tm_busy;
};
/*
* per device private data
*/
#define MPT_DEVICE_FLAGS_INIT 0x01
#define MPT_DEVICE_TLR_ON 0x02
/**
* struct MPT3SAS_DEVICE - sdev private hostdata
* @sas_target: starget private hostdata
* @lun: lun number
* @flags: MPT_DEVICE_XXX flags
* @configured_lun: lun is configured
* @block: device is in SDEV_BLOCK state
* @tlr_snoop_check: flag used in determining whether to disable TLR
* @eedp_enable: eedp support enable bit
* @eedp_type: 0(type_1), 1(type_2), 2(type_3)
* @eedp_block_length: block size
*/
struct MPT3SAS_DEVICE {
struct MPT3SAS_TARGET *sas_target;
unsigned int lun;
u32 flags;
u8 configured_lun;
u8 block;
u8 tlr_snoop_check;
};
#define MPT3_CMD_NOT_USED 0x8000 /* free */
#define MPT3_CMD_COMPLETE 0x0001 /* completed */
#define MPT3_CMD_PENDING 0x0002 /* pending */
#define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */
#define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */
/**
* struct _internal_cmd - internal commands struct
* @mutex: mutex
* @done: completion
* @reply: reply message pointer
* @sense: sense data
* @status: MPT3_CMD_XXX status
* @smid: system message id
*/
struct _internal_cmd {
struct mutex mutex;
struct completion done;
void *reply;
void *sense;
u16 status;
u16 smid;
};
/**
* struct _sas_device - attached device information
* @list: sas device list
* @starget: starget object
* @sas_address: device sas address
* @device_name: retrieved from the SAS IDENTIFY frame.
* @handle: device handle
* @sas_address_parent: sas address of parent expander or sas host
* @enclosure_handle: enclosure handle
* @enclosure_logical_id: enclosure logical identifier
* @volume_handle: volume handle (valid when hidden raid member)
* @volume_wwid: volume unique identifier
* @device_info: bitfield provides detailed info about the device
* @id: target id
* @channel: target channel
* @slot: number number
* @phy: phy identifier provided in sas device page 0
* @fast_path: fast path feature enable bit
* @responding: used in _scsih_sas_device_mark_responding
*/
struct _sas_device {
struct list_head list;
struct scsi_target *starget;
u64 sas_address;
u64 device_name;
u16 handle;
u64 sas_address_parent;
u16 enclosure_handle;
u64 enclosure_logical_id;
u16 volume_handle;
u64 volume_wwid;
u32 device_info;
int id;
int channel;
u16 slot;
u8 phy;
u8 responding;
u8 fast_path;
};
/**
* struct _raid_device - raid volume link list
* @list: sas device list
* @starget: starget object
* @sdev: scsi device struct (volumes are single lun)
* @wwid: unique identifier for the volume
* @handle: device handle
* @id: target id
* @channel: target channel
* @volume_type: the raid level
* @device_info: bitfield provides detailed info about the hidden components
* @num_pds: number of hidden raid components
* @responding: used in _scsih_raid_device_mark_responding
* @percent_complete: resync percent complete
*/
#define MPT_MAX_WARPDRIVE_PDS 8
struct _raid_device {
struct list_head list;
struct scsi_target *starget;
struct scsi_device *sdev;
u64 wwid;
u16 handle;
int id;
int channel;
u8 volume_type;
u8 num_pds;
u8 responding;
u8 percent_complete;
u32 device_info;
};
/**
* struct _boot_device - boot device info
* @is_raid: flag to indicate whether this is volume
* @device: holds pointer for either struct _sas_device or
* struct _raid_device
*/
struct _boot_device {
u8 is_raid;
void *device;
};
/**
* struct _sas_port - wide/narrow sas port information
* @port_list: list of ports belonging to expander
* @num_phys: number of phys belonging to this port
* @remote_identify: attached device identification
* @rphy: sas transport rphy object
* @port: sas transport wide/narrow port object
* @phy_list: _sas_phy list objects belonging to this port
*/
struct _sas_port {
struct list_head port_list;
u8 num_phys;
struct sas_identify remote_identify;
struct sas_rphy *rphy;
struct sas_port *port;
struct list_head phy_list;
};
/**
* struct _sas_phy - phy information
* @port_siblings: list of phys belonging to a port
* @identify: phy identification
* @remote_identify: attached device identification
* @phy: sas transport phy object
* @phy_id: unique phy id
* @handle: device handle for this phy
* @attached_handle: device handle for attached device
* @phy_belongs_to_port: port has been created for this phy
*/
struct _sas_phy {
struct list_head port_siblings;
struct sas_identify identify;
struct sas_identify remote_identify;
struct sas_phy *phy;
u8 phy_id;
u16 handle;
u16 attached_handle;
u8 phy_belongs_to_port;
};
/**
* struct _sas_node - sas_host/expander information
* @list: list of expanders
* @parent_dev: parent device class
* @num_phys: number phys belonging to this sas_host/expander
* @sas_address: sas address of this sas_host/expander
* @handle: handle for this sas_host/expander
* @sas_address_parent: sas address of parent expander or sas host
* @enclosure_handle: handle for this a member of an enclosure
* @device_info: bitwise defining capabilities of this sas_host/expander
* @responding: used in _scsih_expander_device_mark_responding
* @phy: a list of phys that make up this sas_host/expander
* @sas_port_list: list of ports attached to this sas_host/expander
*/
struct _sas_node {
struct list_head list;
struct device *parent_dev;
u8 num_phys;
u64 sas_address;
u16 handle;
u64 sas_address_parent;
u16 enclosure_handle;
u64 enclosure_logical_id;
u8 responding;
struct _sas_phy *phy;
struct list_head sas_port_list;
};
/**
* enum reset_type - reset state
* @FORCE_BIG_HAMMER: issue diagnostic reset
* @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
*/
enum reset_type {
FORCE_BIG_HAMMER,
SOFT_RESET,
};
/**
* struct chain_tracker - firmware chain tracker
* @chain_buffer: chain buffer
* @chain_buffer_dma: physical address
* @tracker_list: list of free request (ioc->free_chain_list)
*/
struct chain_tracker {
void *chain_buffer;
dma_addr_t chain_buffer_dma;
struct list_head tracker_list;
};
/**
* struct scsiio_tracker - scsi mf request tracker
* @smid: system message id
* @scmd: scsi request pointer
* @cb_idx: callback index
* @tracker_list: list of free request (ioc->free_list)
*/
struct scsiio_tracker {
u16 smid;
struct scsi_cmnd *scmd;
u8 cb_idx;
struct list_head chain_list;
struct list_head tracker_list;
};
/**
* struct request_tracker - firmware request tracker
* @smid: system message id
* @cb_idx: callback index
* @tracker_list: list of free request (ioc->free_list)
*/
struct request_tracker {
u16 smid;
u8 cb_idx;
struct list_head tracker_list;
};
/**
* struct _tr_list - target reset list
* @handle: device handle
* @state: state machine
*/
struct _tr_list {
struct list_head list;
u16 handle;
u16 state;
};
/**
* struct adapter_reply_queue - the reply queue struct
* @ioc: per adapter object
* @msix_index: msix index into vector table
* @vector: irq vector
* @reply_post_host_index: head index in the pool where FW completes IO
* @reply_post_free: reply post base virt address
* @name: the name registered to request_irq()
* @busy: isr is actively processing replies on another cpu
* @list: this list
*/
struct adapter_reply_queue {
struct MPT3SAS_ADAPTER *ioc;
u8 msix_index;
unsigned int vector;
u32 reply_post_host_index;
Mpi2ReplyDescriptorsUnion_t *reply_post_free;
char name[MPT_NAME_LENGTH];
atomic_t busy;
struct list_head list;
};
typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
/* SAS3.0 support */
typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
struct scsi_cmnd *scmd, u16 smid);
typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
dma_addr_t data_out_dma, size_t data_out_sz,
dma_addr_t data_in_dma, size_t data_in_sz);
typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
void *paddr);
/* IOC Facts and Port Facts converted from little endian to cpu */
union mpi3_version_union {
MPI2_VERSION_STRUCT Struct;
u32 Word;
};
struct mpt3sas_facts {
u16 MsgVersion;
u16 HeaderVersion;
u8 IOCNumber;
u8 VP_ID;
u8 VF_ID;
u16 IOCExceptions;
u16 IOCStatus;
u32 IOCLogInfo;
u8 MaxChainDepth;
u8 WhoInit;
u8 NumberOfPorts;
u8 MaxMSIxVectors;
u16 RequestCredit;
u16 ProductID;
u32 IOCCapabilities;
union mpi3_version_union FWVersion;
u16 IOCRequestFrameSize;
u16 Reserved3;
u16 MaxInitiators;
u16 MaxTargets;
u16 MaxSasExpanders;
u16 MaxEnclosures;
u16 ProtocolFlags;
u16 HighPriorityCredit;
u16 MaxReplyDescriptorPostQueueDepth;
u8 ReplyFrameSize;
u8 MaxVolumes;
u16 MaxDevHandle;
u16 MaxPersistentEntries;
u16 MinDevHandle;
};
struct mpt3sas_port_facts {
u8 PortNumber;
u8 VP_ID;
u8 VF_ID;
u8 PortType;
u16 MaxPostedCmdBuffers;
};
/**
* enum mutex_type - task management mutex type
* @TM_MUTEX_OFF: mutex is not required becuase calling function is acquiring it
* @TM_MUTEX_ON: mutex is required
*/
enum mutex_type {
TM_MUTEX_OFF = 0,
TM_MUTEX_ON = 1,
};
typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
/**
* struct MPT3SAS_ADAPTER - per adapter struct
* @list: ioc_list
* @shost: shost object
* @id: unique adapter id
* @cpu_count: number online cpus
* @name: generic ioc string
* @tmp_string: tmp string used for logging
* @pdev: pci pdev object
* @pio_chip: physical io register space
* @chip: memory mapped register space
* @chip_phys: physical addrss prior to mapping
* @logging_level: see mpt3sas_debug.h
* @fwfault_debug: debuging FW timeouts
* @ir_firmware: IR firmware present
* @bars: bitmask of BAR's that must be configured
* @mask_interrupts: ignore interrupt
* @fault_reset_work_q_name: fw fault work queue
* @fault_reset_work_q: ""
* @fault_reset_work: ""
* @firmware_event_name: fw event work queue
* @firmware_event_thread: ""
* @fw_event_lock:
* @fw_event_list: list of fw events
* @aen_event_read_flag: event log was read
* @broadcast_aen_busy: broadcast aen waiting to be serviced
* @shost_recovery: host reset in progress
* @ioc_reset_in_progress_lock:
* @ioc_link_reset_in_progress: phy/hard reset in progress
* @ignore_loginfos: ignore loginfos during task management
* @remove_host: flag for when driver unloads, to avoid sending dev resets
* @pci_error_recovery: flag to prevent ioc access until slot reset completes
* @wait_for_discovery_to_complete: flag set at driver load time when
* waiting on reporting devices
* @is_driver_loading: flag set at driver load time
* @port_enable_failed: flag set when port enable has failed
* @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
* @start_scan_failed: means port enable failed, return's the ioc_status
* @msix_enable: flag indicating msix is enabled
* @msix_vector_count: number msix vectors
* @cpu_msix_table: table for mapping cpus to msix index
* @cpu_msix_table_sz: table size
* @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
* @scsi_io_cb_idx: shost generated commands
* @tm_cb_idx: task management commands
* @scsih_cb_idx: scsih internal commands
* @transport_cb_idx: transport internal commands
* @ctl_cb_idx: clt internal commands
* @base_cb_idx: base internal commands
* @config_cb_idx: base internal commands
* @tm_tr_cb_idx : device removal target reset handshake
* @tm_tr_volume_cb_idx : volume removal target reset
* @base_cmds:
* @transport_cmds:
* @scsih_cmds:
* @tm_cmds:
* @ctl_cmds:
* @config_cmds:
* @base_add_sg_single: handler for either 32/64 bit sgl's
* @event_type: bits indicating which events to log
* @event_context: unique id for each logged event
* @event_log: event log pointer
* @event_masks: events that are masked
* @facts: static facts data
* @pfacts: static port facts data
* @manu_pg0: static manufacturing page 0
* @manu_pg10: static manufacturing page 10
* @manu_pg11: static manufacturing page 11
* @bios_pg2: static bios page 2
* @bios_pg3: static bios page 3
* @ioc_pg8: static ioc page 8
* @iounit_pg0: static iounit page 0
* @iounit_pg1: static iounit page 1
* @sas_hba: sas host object
* @sas_expander_list: expander object list
* @sas_node_lock:
* @sas_device_list: sas device object list
* @sas_device_init_list: sas device object list (used only at init time)
* @sas_device_lock:
* @io_missing_delay: time for IO completed by fw when PDR enabled
* @device_missing_delay: time for device missing by fw when PDR enabled
* @sas_id : used for setting volume target IDs
* @blocking_handles: bitmask used to identify which devices need blocking
* @pd_handles : bitmask for PD handles
* @pd_handles_sz : size of pd_handle bitmask
* @config_page_sz: config page size
* @config_page: reserve memory for config page payload
* @config_page_dma:
* @hba_queue_depth: hba request queue depth
* @sge_size: sg element size for either 32/64 bit
* @scsiio_depth: SCSI_IO queue depth
* @request_sz: per request frame size
* @request: pool of request frames
* @request_dma:
* @request_dma_sz:
* @scsi_lookup: firmware request tracker list
* @scsi_lookup_lock:
* @free_list: free list of request
* @pending_io_count:
* @reset_wq:
* @chain: pool of chains
* @chain_dma:
* @max_sges_in_main_message: number sg elements in main message
* @max_sges_in_chain_message: number sg elements per chain
* @chains_needed_per_io: max chains per io
* @chain_depth: total chains allocated
* @hi_priority_smid:
* @hi_priority:
* @hi_priority_dma:
* @hi_priority_depth:
* @hpr_lookup:
* @hpr_free_list:
* @internal_smid:
* @internal:
* @internal_dma:
* @internal_depth:
* @internal_lookup:
* @internal_free_list:
* @sense: pool of sense
* @sense_dma:
* @sense_dma_pool:
* @reply_depth: hba reply queue depth:
* @reply_sz: per reply frame size:
* @reply: pool of replys:
* @reply_dma:
* @reply_dma_pool:
* @reply_free_queue_depth: reply free depth
* @reply_free: pool for reply free queue (32 bit addr)
* @reply_free_dma:
* @reply_free_dma_pool:
* @reply_free_host_index: tail index in pool to insert free replys
* @reply_post_queue_depth: reply post queue depth
* @reply_post_free: pool for reply post (64bit descriptor)
* @reply_post_free_dma:
* @reply_queue_count: number of reply queue's
* @reply_queue_list: link list contaning the reply queue info
* @reply_post_host_index: head index in the pool where FW completes IO
* @delayed_tr_list: target reset link list
* @delayed_tr_volume_list: volume target reset link list
*/
struct MPT3SAS_ADAPTER {
struct list_head list;
struct Scsi_Host *shost;
u8 id;
int cpu_count;
char name[MPT_NAME_LENGTH];
char tmp_string[MPT_STRING_LENGTH];
struct pci_dev *pdev;
Mpi2SystemInterfaceRegs_t __iomem *chip;
resource_size_t chip_phys;
int logging_level;
int fwfault_debug;
u8 ir_firmware;
int bars;
u8 mask_interrupts;
/* fw fault handler */
char fault_reset_work_q_name[20];
struct workqueue_struct *fault_reset_work_q;
struct delayed_work fault_reset_work;
/* fw event handler */
char firmware_event_name[20];
struct workqueue_struct *firmware_event_thread;
spinlock_t fw_event_lock;
struct list_head fw_event_list;
/* misc flags */
int aen_event_read_flag;
u8 broadcast_aen_busy;
u16 broadcast_aen_pending;
u8 shost_recovery;
struct mutex reset_in_progress_mutex;
spinlock_t ioc_reset_in_progress_lock;
u8 ioc_link_reset_in_progress;
u8 ioc_reset_in_progress_status;
u8 ignore_loginfos;
u8 remove_host;
u8 pci_error_recovery;
u8 wait_for_discovery_to_complete;
u8 is_driver_loading;
u8 port_enable_failed;
u8 start_scan;
u16 start_scan_failed;
u8 msix_enable;
u16 msix_vector_count;
u8 *cpu_msix_table;
u16 cpu_msix_table_sz;
u32 ioc_reset_count;
MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
/* internal commands, callback index */
u8 scsi_io_cb_idx;
u8 tm_cb_idx;
u8 transport_cb_idx;
u8 scsih_cb_idx;
u8 ctl_cb_idx;
u8 base_cb_idx;
u8 port_enable_cb_idx;
u8 config_cb_idx;
u8 tm_tr_cb_idx;
u8 tm_tr_volume_cb_idx;
u8 tm_sas_control_cb_idx;
struct _internal_cmd base_cmds;
struct _internal_cmd port_enable_cmds;
struct _internal_cmd transport_cmds;
struct _internal_cmd scsih_cmds;
struct _internal_cmd tm_cmds;
struct _internal_cmd ctl_cmds;
struct _internal_cmd config_cmds;
MPT_ADD_SGE base_add_sg_single;
/* function ptr for either IEEE or MPI sg elements */
MPT_BUILD_SG_SCMD build_sg_scmd;
MPT_BUILD_SG build_sg;
MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
u8 mpi25;
u16 sge_size_ieee;
/* function ptr for MPI sg elements only */
MPT_BUILD_SG build_sg_mpi;
MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
/* event log */
u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
u32 event_context;
void *event_log;
u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
/* static config pages */
struct mpt3sas_facts facts;
struct mpt3sas_port_facts *pfacts;
Mpi2ManufacturingPage0_t manu_pg0;
struct Mpi2ManufacturingPage10_t manu_pg10;
struct Mpi2ManufacturingPage11_t manu_pg11;
Mpi2BiosPage2_t bios_pg2;
Mpi2BiosPage3_t bios_pg3;
Mpi2IOCPage8_t ioc_pg8;
Mpi2IOUnitPage0_t iounit_pg0;
Mpi2IOUnitPage1_t iounit_pg1;
struct _boot_device req_boot_device;
struct _boot_device req_alt_boot_device;
struct _boot_device current_boot_device;
/* sas hba, expander, and device list */
struct _sas_node sas_hba;
struct list_head sas_expander_list;
spinlock_t sas_node_lock;
struct list_head sas_device_list;
struct list_head sas_device_init_list;
spinlock_t sas_device_lock;
struct list_head raid_device_list;
spinlock_t raid_device_lock;
u8 io_missing_delay;
u16 device_missing_delay;
int sas_id;
void *blocking_handles;
void *pd_handles;
u16 pd_handles_sz;
/* config page */
u16 config_page_sz;
void *config_page;
dma_addr_t config_page_dma;
/* scsiio request */
u16 hba_queue_depth;
u16 sge_size;
u16 scsiio_depth;
u16 request_sz;
u8 *request;
dma_addr_t request_dma;
u32 request_dma_sz;
struct scsiio_tracker *scsi_lookup;
ulong scsi_lookup_pages;
spinlock_t scsi_lookup_lock;
struct list_head free_list;
int pending_io_count;
wait_queue_head_t reset_wq;
/* chain */
struct chain_tracker *chain_lookup;
struct list_head free_chain_list;
struct dma_pool *chain_dma_pool;
ulong chain_pages;
u16 max_sges_in_main_message;
u16 max_sges_in_chain_message;
u16 chains_needed_per_io;
u32 chain_depth;
/* hi-priority queue */
u16 hi_priority_smid;
u8 *hi_priority;
dma_addr_t hi_priority_dma;
u16 hi_priority_depth;
struct request_tracker *hpr_lookup;
struct list_head hpr_free_list;
/* internal queue */
u16 internal_smid;
u8 *internal;
dma_addr_t internal_dma;
u16 internal_depth;
struct request_tracker *internal_lookup;
struct list_head internal_free_list;
/* sense */
u8 *sense;
dma_addr_t sense_dma;
struct dma_pool *sense_dma_pool;
/* reply */
u16 reply_sz;
u8 *reply;
dma_addr_t reply_dma;
u32 reply_dma_max_address;
u32 reply_dma_min_address;
struct dma_pool *reply_dma_pool;
/* reply free queue */
u16 reply_free_queue_depth;
__le32 *reply_free;
dma_addr_t reply_free_dma;
struct dma_pool *reply_free_dma_pool;
u32 reply_free_host_index;
/* reply post queue */
u16 reply_post_queue_depth;
Mpi2ReplyDescriptorsUnion_t *reply_post_free;
dma_addr_t reply_post_free_dma;
struct dma_pool *reply_post_free_dma_pool;
u8 reply_queue_count;
struct list_head reply_queue_list;
struct list_head delayed_tr_list;
struct list_head delayed_tr_volume_list;
/* diag buffer support */
u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
u32 ring_buffer_offset;
u32 ring_buffer_sz;
spinlock_t diag_trigger_lock;
u8 diag_trigger_active;
struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
};
typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
u32 reply);
/* base shared API */
extern struct list_head mpt3sas_ioc_list;
void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
enum reset_type type);
void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
__le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
u16 smid);
void mpt3sas_base_flush_reply_queues(struct MPT3SAS_ADAPTER *ioc);
/* hi-priority queue */
u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
struct scsi_cmnd *scmd);
u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
void mpt3sas_base_put_smid_scsi_io(struct MPT3SAS_ADAPTER *ioc, u16 smid,
u16 handle);
void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
u16 handle);
void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid);
void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
void mpt3sas_base_initialize_callback_handler(void);
u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
void mpt3sas_base_release_callback_handler(u8 cb_idx);
u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
u32 reply);
u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
u8 msix_index, u32 reply);
void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
u32 phys_addr);
u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
Mpi2SasIoUnitControlReply_t *mpi_reply,
Mpi2SasIoUnitControlRequest_t *mpi_request);
int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
u32 *event_type);
void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
u16 device_missing_delay, u8 io_missing_delay);
int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
/* scsih shared API */
u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
u32 reply);
void mpt3sas_scsih_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase);
int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
uint channel, uint id, uint lun, u8 type, u16 smid_task,
ulong timeout, unsigned long serial_number, enum mutex_type m_type);
void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
u64 sas_address);
struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
struct MPT3SAS_ADAPTER *ioc, u16 handle);
struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
struct _sas_device *mpt3sas_scsih_sas_device_find_by_sas_address(
struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
/* config shared API */
u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
u32 reply);
int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
u8 *num_phys);
int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
u16 sz);
int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply,
struct Mpi2ManufacturingPage10_t *config_page);
int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply,
struct Mpi2ManufacturingPage11_t *config_page);
int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply,
struct Mpi2ManufacturingPage11_t *config_page);
int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2BiosPage2_t *config_page);
int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2BiosPage3_t *config_page);
int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2IOUnitPage0_t *config_page);
int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
u32 form, u32 handle);
int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
u32 form, u32 handle);
int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
u16 sz);
int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2IOUnitPage1_t *config_page);
int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2IOUnitPage1_t *config_page);
int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
u16 sz);
int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
u16 sz);
int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2IOCPage8_t *config_page);
int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
u32 form, u32 handle);
int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
u32 phy_number, u16 handle);
int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
u32 form, u32 handle);
int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
u32 handle);
int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
u8 *num_pds);
int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
u32 handle, u16 sz);
int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
u32 form, u32 form_specific);
int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
u16 *volume_handle);
int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
u16 volume_handle, u64 *wwid);
/* ctl shared API */
extern struct device_attribute *mpt3sas_host_attrs[];
extern struct device_attribute *mpt3sas_dev_attrs[];
void mpt3sas_ctl_init(void);
void mpt3sas_ctl_exit(void);
u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
u32 reply);
void mpt3sas_ctl_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase);
u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
u8 msix_index, u32 reply);
void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
Mpi2EventNotificationReply_t *mpi_reply);
void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
u8 bits_to_regsiter);
int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
u8 *issue_reset);
/* transport shared API */
u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
u32 reply);
struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
u16 handle, u64 sas_address);
void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
u64 sas_address_parent);
int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
*mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
struct device *parent_dev);
void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
extern struct sas_function_template mpt3sas_transport_functions;
extern struct scsi_transport_template *mpt3sas_transport_template;
extern int scsi_internal_device_block(struct scsi_device *sdev);
extern int scsi_internal_device_unblock(struct scsi_device *sdev,
enum scsi_device_state new_state);
/* trigger data externs */
void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
u32 tigger_bitmask);
void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
u16 log_entry_qualifier);
void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
u8 asc, u8 ascq);
void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
u32 loginfo);
#endif /* MPT3SAS_BASE_H_INCLUDED */
drivers/scsi/mpt3sas/mpt3sas_config.c 0 → 100644
View file @ f92363d1
/*
* This module provides common API for accessing firmware configuration pages
*
* This code is based on drivers/scsi/mpt3sas/mpt3sas_base.c
* Copyright (C) 2012 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* NO WARRANTY
* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
* solely responsible for determining the appropriateness of using and
* distributing the Program and assumes all risks associated with its
* exercise of rights under this Agreement, including but not limited to
* the risks and costs of program errors, damage to or loss of data,
* programs or equipment, and unavailability or interruption of operations.
* DISCLAIMER OF LIABILITY
* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
* USA.
*/
#include <linux/version.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/blkdev.h>
#include <linux/sched.h>
#include <linux/workqueue.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include "mpt3sas_base.h"
/* local definitions */
/* Timeout for config page request (in seconds) */
#define MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT 15
/* Common sgl flags for READING a config page. */
#define MPT3_CONFIG_COMMON_SGLFLAGS ((MPI2_SGE_FLAGS_SIMPLE_ELEMENT | \
MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER \
| MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT)
/* Common sgl flags for WRITING a config page. */
#define MPT3_CONFIG_COMMON_WRITE_SGLFLAGS ((MPI2_SGE_FLAGS_SIMPLE_ELEMENT | \
MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER \
| MPI2_SGE_FLAGS_END_OF_LIST | MPI2_SGE_FLAGS_HOST_TO_IOC) \
<< MPI2_SGE_FLAGS_SHIFT)
/**
* struct config_request - obtain dma memory via routine
* @sz: size
* @page: virt pointer
* @page_dma: phys pointer
*
*/
struct config_request {
u16 sz;
void *page;
dma_addr_t page_dma;
};
#ifdef CONFIG_SCSI_MPT3SAS_LOGGING
/**
* _config_display_some_debug - debug routine
* @ioc: per adapter object
* @smid: system request message index
* @calling_function_name: string pass from calling function
* @mpi_reply: reply message frame
* Context: none.
*
* Function for displaying debug info helpful when debugging issues
* in this module.
*/
static void
_config_display_some_debug(struct MPT3SAS_ADAPTER *ioc, u16 smid,
char *calling_function_name, MPI2DefaultReply_t *mpi_reply)
{
Mpi2ConfigRequest_t *mpi_request;
char *desc = NULL;
if (!(ioc->logging_level & MPT_DEBUG_CONFIG))
return;
mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
switch (mpi_request->Header.PageType & MPI2_CONFIG_PAGETYPE_MASK) {
case MPI2_CONFIG_PAGETYPE_IO_UNIT:
desc = "io_unit";
break;
case MPI2_CONFIG_PAGETYPE_IOC:
desc = "ioc";
break;
case MPI2_CONFIG_PAGETYPE_BIOS:
desc = "bios";
break;
case MPI2_CONFIG_PAGETYPE_RAID_VOLUME:
desc = "raid_volume";
break;
case MPI2_CONFIG_PAGETYPE_MANUFACTURING:
desc = "manufaucturing";
break;
case MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK:
desc = "physdisk";
break;
case MPI2_CONFIG_PAGETYPE_EXTENDED:
switch (mpi_request->ExtPageType) {
case MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT:
desc = "sas_io_unit";
break;
case MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER:
desc = "sas_expander";
break;
case MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE:
desc = "sas_device";
break;
case MPI2_CONFIG_EXTPAGETYPE_SAS_PHY:
desc = "sas_phy";
break;
case MPI2_CONFIG_EXTPAGETYPE_LOG:
desc = "log";
break;
case MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE:
desc = "enclosure";
break;
case MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG:
desc = "raid_config";
break;
case MPI2_CONFIG_EXTPAGETYPE_DRIVER_MAPPING:
desc = "driver_mappping";
break;
}
break;
}
if (!desc)
return;
pr_info(MPT3SAS_FMT
"%s: %s(%d), action(%d), form(0x%08x), smid(%d)\n",
ioc->name, calling_function_name, desc,
mpi_request->Header.PageNumber, mpi_request->Action,
le32_to_cpu(mpi_request->PageAddress), smid);
if (!mpi_reply)
return;
if (mpi_reply->IOCStatus || mpi_reply->IOCLogInfo)
pr_info(MPT3SAS_FMT
"\tiocstatus(0x%04x), loginfo(0x%08x)\n",
ioc->name, le16_to_cpu(mpi_reply->IOCStatus),
le32_to_cpu(mpi_reply->IOCLogInfo));
}
#endif
/**
* _config_alloc_config_dma_memory - obtain physical memory
* @ioc: per adapter object
* @mem: struct config_request
*
* A wrapper for obtaining dma-able memory for config page request.
*
* Returns 0 for success, non-zero for failure.
*/
static int
_config_alloc_config_dma_memory(struct MPT3SAS_ADAPTER *ioc,
struct config_request *mem)
{
int r = 0;
if (mem->sz > ioc->config_page_sz) {
mem->page = dma_alloc_coherent(&ioc->pdev->dev, mem->sz,
&mem->page_dma, GFP_KERNEL);
if (!mem->page) {
pr_err(MPT3SAS_FMT
"%s: dma_alloc_coherent failed asking for (%d) bytes!!\n",
ioc->name, __func__, mem->sz);
r = -ENOMEM;
}
} else { /* use tmp buffer if less than 512 bytes */
mem->page = ioc->config_page;
mem->page_dma = ioc->config_page_dma;
}
return r;
}
/**
* _config_free_config_dma_memory - wrapper to free the memory
* @ioc: per adapter object
* @mem: struct config_request
*
* A wrapper to free dma-able memory when using _config_alloc_config_dma_memory.
*
* Returns 0 for success, non-zero for failure.
*/
static void
_config_free_config_dma_memory(struct MPT3SAS_ADAPTER *ioc,
struct config_request *mem)
{
if (mem->sz > ioc->config_page_sz)
dma_free_coherent(&ioc->pdev->dev, mem->sz, mem->page,
mem->page_dma);
}
/**
* mpt3sas_config_done - config page completion routine
* @ioc: per adapter object
* @smid: system request message index
* @msix_index: MSIX table index supplied by the OS
* @reply: reply message frame(lower 32bit addr)
* Context: none.
*
* The callback handler when using _config_request.
*
* Return 1 meaning mf should be freed from _base_interrupt
* 0 means the mf is freed from this function.
*/
u8
mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
u32 reply)
{
MPI2DefaultReply_t *mpi_reply;
if (ioc->config_cmds.status == MPT3_CMD_NOT_USED)
return 1;
if (ioc->config_cmds.smid != smid)
return 1;
ioc->config_cmds.status |= MPT3_CMD_COMPLETE;
mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
if (mpi_reply) {
ioc->config_cmds.status |= MPT3_CMD_REPLY_VALID;
memcpy(ioc->config_cmds.reply, mpi_reply,
mpi_reply->MsgLength*4);
}
ioc->config_cmds.status &= ~MPT3_CMD_PENDING;
#ifdef CONFIG_SCSI_MPT3SAS_LOGGING
_config_display_some_debug(ioc, smid, "config_done", mpi_reply);
#endif
ioc->config_cmds.smid = USHRT_MAX;
complete(&ioc->config_cmds.done);
return 1;
}
/**
* _config_request - main routine for sending config page requests
* @ioc: per adapter object
* @mpi_request: request message frame
* @mpi_reply: reply mf payload returned from firmware
* @timeout: timeout in seconds
* @config_page: contents of the config page
* @config_page_sz: size of config page
* Context: sleep
*
* A generic API for config page requests to firmware.
*
* The ioc->config_cmds.status flag should be MPT3_CMD_NOT_USED before calling
* this API.
*
* The callback index is set inside `ioc->config_cb_idx.
*
* Returns 0 for success, non-zero for failure.
*/
static int
_config_request(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigRequest_t
*mpi_request, Mpi2ConfigReply_t *mpi_reply, int timeout,
void *config_page, u16 config_page_sz)
{
u16 smid;
u32 ioc_state;
unsigned long timeleft;
Mpi2ConfigRequest_t *config_request;
int r;
u8 retry_count, issue_host_reset = 0;
u16 wait_state_count;
struct config_request mem;
u32 ioc_status = UINT_MAX;
mutex_lock(&ioc->config_cmds.mutex);
if (ioc->config_cmds.status != MPT3_CMD_NOT_USED) {
pr_err(MPT3SAS_FMT "%s: config_cmd in use\n",
ioc->name, __func__);
mutex_unlock(&ioc->config_cmds.mutex);
return -EAGAIN;
}
retry_count = 0;
memset(&mem, 0, sizeof(struct config_request));
mpi_request->VF_ID = 0; /* TODO */
mpi_request->VP_ID = 0;
if (config_page) {
mpi_request->Header.PageVersion = mpi_reply->Header.PageVersion;
mpi_request->Header.PageNumber = mpi_reply->Header.PageNumber;
mpi_request->Header.PageType = mpi_reply->Header.PageType;
mpi_request->Header.PageLength = mpi_reply->Header.PageLength;
mpi_request->ExtPageLength = mpi_reply->ExtPageLength;
mpi_request->ExtPageType = mpi_reply->ExtPageType;
if (mpi_request->Header.PageLength)
mem.sz = mpi_request->Header.PageLength * 4;
else
mem.sz = le16_to_cpu(mpi_reply->ExtPageLength) * 4;
r = _config_alloc_config_dma_memory(ioc, &mem);
if (r != 0)
goto out;
if (mpi_request->Action ==
MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT ||
mpi_request->Action ==
MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM) {
ioc->base_add_sg_single(&mpi_request->PageBufferSGE,
MPT3_CONFIG_COMMON_WRITE_SGLFLAGS | mem.sz,
mem.page_dma);
memcpy(mem.page, config_page, min_t(u16, mem.sz,
config_page_sz));
} else {
memset(config_page, 0, config_page_sz);
ioc->base_add_sg_single(&mpi_request->PageBufferSGE,
MPT3_CONFIG_COMMON_SGLFLAGS | mem.sz, mem.page_dma);
memset(mem.page, 0, min_t(u16, mem.sz, config_page_sz));
}
}
retry_config:
if (retry_count) {
if (retry_count > 2) { /* attempt only 2 retries */
r = -EFAULT;
goto free_mem;
}
pr_info(MPT3SAS_FMT "%s: attempting retry (%d)\n",
ioc->name, __func__, retry_count);
}
wait_state_count = 0;
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
if (wait_state_count++ == MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT) {
pr_err(MPT3SAS_FMT
"%s: failed due to ioc not operational\n",
ioc->name, __func__);
ioc->config_cmds.status = MPT3_CMD_NOT_USED;
r = -EFAULT;
goto free_mem;
}
ssleep(1);
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
pr_info(MPT3SAS_FMT
"%s: waiting for operational state(count=%d)\n",
ioc->name, __func__, wait_state_count);
}
if (wait_state_count)
pr_info(MPT3SAS_FMT "%s: ioc is operational\n",
ioc->name, __func__);
smid = mpt3sas_base_get_smid(ioc, ioc->config_cb_idx);
if (!smid) {
pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
ioc->name, __func__);
ioc->config_cmds.status = MPT3_CMD_NOT_USED;
r = -EAGAIN;
goto free_mem;
}
r = 0;
memset(mpi_reply, 0, sizeof(Mpi2ConfigReply_t));
ioc->config_cmds.status = MPT3_CMD_PENDING;
config_request = mpt3sas_base_get_msg_frame(ioc, smid);
ioc->config_cmds.smid = smid;
memcpy(config_request, mpi_request, sizeof(Mpi2ConfigRequest_t));
#ifdef CONFIG_SCSI_MPT3SAS_LOGGING
_config_display_some_debug(ioc, smid, "config_request", NULL);
#endif
init_completion(&ioc->config_cmds.done);
mpt3sas_base_put_smid_default(ioc, smid);
timeleft = wait_for_completion_timeout(&ioc->config_cmds.done,
timeout*HZ);
if (!(ioc->config_cmds.status & MPT3_CMD_COMPLETE)) {
pr_err(MPT3SAS_FMT "%s: timeout\n",
ioc->name, __func__);
_debug_dump_mf(mpi_request,
sizeof(Mpi2ConfigRequest_t)/4);
retry_count++;
if (ioc->config_cmds.smid == smid)
mpt3sas_base_free_smid(ioc, smid);
if ((ioc->shost_recovery) || (ioc->config_cmds.status &
MPT3_CMD_RESET) || ioc->pci_error_recovery)
goto retry_config;
issue_host_reset = 1;
r = -EFAULT;
goto free_mem;
}
if (ioc->config_cmds.status & MPT3_CMD_REPLY_VALID) {
memcpy(mpi_reply, ioc->config_cmds.reply,
sizeof(Mpi2ConfigReply_t));
/* Reply Frame Sanity Checks to workaround FW issues */
if ((mpi_request->Header.PageType & 0xF) !=
(mpi_reply->Header.PageType & 0xF)) {
_debug_dump_mf(mpi_request, ioc->request_sz/4);
_debug_dump_reply(mpi_reply, ioc->request_sz/4);
panic(KERN_WARNING MPT3SAS_FMT "%s: Firmware BUG:" \
" mpi_reply mismatch: Requested PageType(0x%02x)" \
" Reply PageType(0x%02x)\n", \
ioc->name, __func__,
(mpi_request->Header.PageType & 0xF),
(mpi_reply->Header.PageType & 0xF));
}
if (((mpi_request->Header.PageType & 0xF) ==
MPI2_CONFIG_PAGETYPE_EXTENDED) &&
mpi_request->ExtPageType != mpi_reply->ExtPageType) {
_debug_dump_mf(mpi_request, ioc->request_sz/4);
_debug_dump_reply(mpi_reply, ioc->request_sz/4);
panic(KERN_WARNING MPT3SAS_FMT "%s: Firmware BUG:" \
" mpi_reply mismatch: Requested ExtPageType(0x%02x)"
" Reply ExtPageType(0x%02x)\n",
ioc->name, __func__, mpi_request->ExtPageType,
mpi_reply->ExtPageType);
}
ioc_status = le16_to_cpu(mpi_reply->IOCStatus)
& MPI2_IOCSTATUS_MASK;
}
if (retry_count)
pr_info(MPT3SAS_FMT "%s: retry (%d) completed!!\n", \
ioc->name, __func__, retry_count);
if ((ioc_status == MPI2_IOCSTATUS_SUCCESS) &&
config_page && mpi_request->Action ==
MPI2_CONFIG_ACTION_PAGE_READ_CURRENT) {
u8 *p = (u8 *)mem.page;
/* Config Page Sanity Checks to workaround FW issues */
if (p) {
if ((mpi_request->Header.PageType & 0xF) !=
(p[3] & 0xF)) {
_debug_dump_mf(mpi_request, ioc->request_sz/4);
_debug_dump_reply(mpi_reply, ioc->request_sz/4);
_debug_dump_config(p, min_t(u16, mem.sz,
config_page_sz)/4);
panic(KERN_WARNING MPT3SAS_FMT
"%s: Firmware BUG:" \
" config page mismatch:"
" Requested PageType(0x%02x)"
" Reply PageType(0x%02x)\n",
ioc->name, __func__,
(mpi_request->Header.PageType & 0xF),
(p[3] & 0xF));
}
if (((mpi_request->Header.PageType & 0xF) ==
MPI2_CONFIG_PAGETYPE_EXTENDED) &&
(mpi_request->ExtPageType != p[6])) {
_debug_dump_mf(mpi_request, ioc->request_sz/4);
_debug_dump_reply(mpi_reply, ioc->request_sz/4);
_debug_dump_config(p, min_t(u16, mem.sz,
config_page_sz)/4);
panic(KERN_WARNING MPT3SAS_FMT
"%s: Firmware BUG:" \
" config page mismatch:"
" Requested ExtPageType(0x%02x)"
" Reply ExtPageType(0x%02x)\n",
ioc->name, __func__,
mpi_request->ExtPageType, p[6]);
}
}
memcpy(config_page, mem.page, min_t(u16, mem.sz,
config_page_sz));
}
free_mem:
if (config_page)
_config_free_config_dma_memory(ioc, &mem);
out:
ioc->config_cmds.status = MPT3_CMD_NOT_USED;
mutex_unlock(&ioc->config_cmds.mutex);
if (issue_host_reset)
mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
FORCE_BIG_HAMMER);
return r;
}
/**
* mpt3sas_config_get_manufacturing_pg0 - obtain manufacturing page 0
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_MANUFACTURING;
mpi_request.Header.PageNumber = 0;
mpi_request.Header.PageVersion = MPI2_MANUFACTURING0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_manufacturing_pg7 - obtain manufacturing page 7
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @sz: size of buffer passed in config_page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
u16 sz)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_MANUFACTURING;
mpi_request.Header.PageNumber = 7;
mpi_request.Header.PageVersion = MPI2_MANUFACTURING7_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sz);
out:
return r;
}
/**
* mpt3sas_config_get_manufacturing_pg10 - obtain manufacturing page 10
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply,
struct Mpi2ManufacturingPage10_t *config_page)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_MANUFACTURING;
mpi_request.Header.PageNumber = 10;
mpi_request.Header.PageVersion = MPI2_MANUFACTURING0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_manufacturing_pg11 - obtain manufacturing page 11
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply,
struct Mpi2ManufacturingPage11_t *config_page)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_MANUFACTURING;
mpi_request.Header.PageNumber = 11;
mpi_request.Header.PageVersion = MPI2_MANUFACTURING0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_set_manufacturing_pg11 - set manufacturing page 11
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply,
struct Mpi2ManufacturingPage11_t *config_page)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_MANUFACTURING;
mpi_request.Header.PageNumber = 11;
mpi_request.Header.PageVersion = MPI2_MANUFACTURING0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_bios_pg2 - obtain bios page 2
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2BiosPage2_t *config_page)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_BIOS;
mpi_request.Header.PageNumber = 2;
mpi_request.Header.PageVersion = MPI2_BIOSPAGE2_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_bios_pg3 - obtain bios page 3
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2BiosPage3_t *config_page)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_BIOS;
mpi_request.Header.PageNumber = 3;
mpi_request.Header.PageVersion = MPI2_BIOSPAGE3_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_iounit_pg0 - obtain iounit page 0
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage0_t *config_page)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_IO_UNIT;
mpi_request.Header.PageNumber = 0;
mpi_request.Header.PageVersion = MPI2_IOUNITPAGE0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_iounit_pg1 - obtain iounit page 1
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage1_t *config_page)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_IO_UNIT;
mpi_request.Header.PageNumber = 1;
mpi_request.Header.PageVersion = MPI2_IOUNITPAGE1_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_set_iounit_pg1 - set iounit page 1
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage1_t *config_page)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_IO_UNIT;
mpi_request.Header.PageNumber = 1;
mpi_request.Header.PageVersion = MPI2_IOUNITPAGE1_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_ioc_pg8 - obtain ioc page 8
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2IOCPage8_t *config_page)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_IOC;
mpi_request.Header.PageNumber = 8;
mpi_request.Header.PageVersion = MPI2_IOCPAGE8_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_sas_device_pg0 - obtain sas device page 0
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @form: GET_NEXT_HANDLE or HANDLE
* @handle: device handle
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
u32 form, u32 handle)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE;
mpi_request.Header.PageVersion = MPI2_SASDEVICE0_PAGEVERSION;
mpi_request.Header.PageNumber = 0;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress = cpu_to_le32(form | handle);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_sas_device_pg1 - obtain sas device page 1
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @form: GET_NEXT_HANDLE or HANDLE
* @handle: device handle
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
u32 form, u32 handle)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE;
mpi_request.Header.PageVersion = MPI2_SASDEVICE1_PAGEVERSION;
mpi_request.Header.PageNumber = 1;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress = cpu_to_le32(form | handle);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_number_hba_phys - obtain number of phys on the host
* @ioc: per adapter object
* @num_phys: pointer returned with the number of phys
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc, u8 *num_phys)
{
Mpi2ConfigRequest_t mpi_request;
int r;
u16 ioc_status;
Mpi2ConfigReply_t mpi_reply;
Mpi2SasIOUnitPage0_t config_page;
*num_phys = 0;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
mpi_request.Header.PageNumber = 0;
mpi_request.Header.PageVersion = MPI2_SASIOUNITPAGE0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, &mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, &mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, &config_page,
sizeof(Mpi2SasIOUnitPage0_t));
if (!r) {
ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
MPI2_IOCSTATUS_MASK;
if (ioc_status == MPI2_IOCSTATUS_SUCCESS)
*num_phys = config_page.NumPhys;
}
out:
return r;
}
/**
* mpt3sas_config_get_sas_iounit_pg0 - obtain sas iounit page 0
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @sz: size of buffer passed in config_page
* Context: sleep.
*
* Calling function should call config_get_number_hba_phys prior to
* this function, so enough memory is allocated for config_page.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
u16 sz)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
mpi_request.Header.PageNumber = 0;
mpi_request.Header.PageVersion = MPI2_SASIOUNITPAGE0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page, sz);
out:
return r;
}
/**
* mpt3sas_config_get_sas_iounit_pg1 - obtain sas iounit page 1
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @sz: size of buffer passed in config_page
* Context: sleep.
*
* Calling function should call config_get_number_hba_phys prior to
* this function, so enough memory is allocated for config_page.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
u16 sz)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
mpi_request.Header.PageNumber = 1;
mpi_request.Header.PageVersion = MPI2_SASIOUNITPAGE1_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page, sz);
out:
return r;
}
/**
* mpt3sas_config_set_sas_iounit_pg1 - send sas iounit page 1
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @sz: size of buffer passed in config_page
* Context: sleep.
*
* Calling function should call config_get_number_hba_phys prior to
* this function, so enough memory is allocated for config_page.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
u16 sz)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
mpi_request.Header.PageNumber = 1;
mpi_request.Header.PageVersion = MPI2_SASIOUNITPAGE1_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT;
_config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page, sz);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page, sz);
out:
return r;
}
/**
* mpt3sas_config_get_expander_pg0 - obtain expander page 0
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @form: GET_NEXT_HANDLE or HANDLE
* @handle: expander handle
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2ExpanderPage0_t *config_page, u32 form, u32 handle)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER;
mpi_request.Header.PageNumber = 0;
mpi_request.Header.PageVersion = MPI2_SASEXPANDER0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress = cpu_to_le32(form | handle);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_expander_pg1 - obtain expander page 1
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @phy_number: phy number
* @handle: expander handle
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2ExpanderPage1_t *config_page, u32 phy_number,
u16 handle)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER;
mpi_request.Header.PageNumber = 1;
mpi_request.Header.PageVersion = MPI2_SASEXPANDER1_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress =
cpu_to_le32(MPI2_SAS_EXPAND_PGAD_FORM_HNDL_PHY_NUM |
(phy_number << MPI2_SAS_EXPAND_PGAD_PHYNUM_SHIFT) | handle);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_enclosure_pg0 - obtain enclosure page 0
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @form: GET_NEXT_HANDLE or HANDLE
* @handle: expander handle
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2SasEnclosurePage0_t *config_page, u32 form, u32 handle)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE;
mpi_request.Header.PageNumber = 0;
mpi_request.Header.PageVersion = MPI2_SASENCLOSURE0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress = cpu_to_le32(form | handle);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_phy_pg0 - obtain phy page 0
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @phy_number: phy number
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_PHY;
mpi_request.Header.PageNumber = 0;
mpi_request.Header.PageVersion = MPI2_SASPHY0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress =
cpu_to_le32(MPI2_SAS_PHY_PGAD_FORM_PHY_NUMBER | phy_number);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_phy_pg1 - obtain phy page 1
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @phy_number: phy number
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_PHY;
mpi_request.Header.PageNumber = 1;
mpi_request.Header.PageVersion = MPI2_SASPHY1_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress =
cpu_to_le32(MPI2_SAS_PHY_PGAD_FORM_PHY_NUMBER | phy_number);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_raid_volume_pg1 - obtain raid volume page 1
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @form: GET_NEXT_HANDLE or HANDLE
* @handle: volume handle
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
u32 handle)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_RAID_VOLUME;
mpi_request.Header.PageNumber = 1;
mpi_request.Header.PageVersion = MPI2_RAIDVOLPAGE1_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress = cpu_to_le32(form | handle);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_number_pds - obtain number of phys disk assigned to volume
* @ioc: per adapter object
* @handle: volume handle
* @num_pds: returns pds count
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
u8 *num_pds)
{
Mpi2ConfigRequest_t mpi_request;
Mpi2RaidVolPage0_t config_page;
Mpi2ConfigReply_t mpi_reply;
int r;
u16 ioc_status;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
*num_pds = 0;
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_RAID_VOLUME;
mpi_request.Header.PageNumber = 0;
mpi_request.Header.PageVersion = MPI2_RAIDVOLPAGE0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, &mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress =
cpu_to_le32(MPI2_RAID_VOLUME_PGAD_FORM_HANDLE | handle);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, &mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, &config_page,
sizeof(Mpi2RaidVolPage0_t));
if (!r) {
ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
MPI2_IOCSTATUS_MASK;
if (ioc_status == MPI2_IOCSTATUS_SUCCESS)
*num_pds = config_page.NumPhysDisks;
}
out:
return r;
}
/**
* mpt3sas_config_get_raid_volume_pg0 - obtain raid volume page 0
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @form: GET_NEXT_HANDLE or HANDLE
* @handle: volume handle
* @sz: size of buffer passed in config_page
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
u32 handle, u16 sz)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_RAID_VOLUME;
mpi_request.Header.PageNumber = 0;
mpi_request.Header.PageVersion = MPI2_RAIDVOLPAGE0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress = cpu_to_le32(form | handle);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page, sz);
out:
return r;
}
/**
* mpt3sas_config_get_phys_disk_pg0 - obtain phys disk page 0
* @ioc: per adapter object
* @mpi_reply: reply mf payload returned from firmware
* @config_page: contents of the config page
* @form: GET_NEXT_PHYSDISKNUM, PHYSDISKNUM, DEVHANDLE
* @form_specific: specific to the form
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
*mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, u32 form,
u32 form_specific)
{
Mpi2ConfigRequest_t mpi_request;
int r;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK;
mpi_request.Header.PageNumber = 0;
mpi_request.Header.PageVersion = MPI2_RAIDPHYSDISKPAGE0_PAGEVERSION;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.PageAddress = cpu_to_le32(form | form_specific);
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
r = _config_request(ioc, &mpi_request, mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
sizeof(*config_page));
out:
return r;
}
/**
* mpt3sas_config_get_volume_handle - returns volume handle for give hidden
* raid components
* @ioc: per adapter object
* @pd_handle: phys disk handle
* @volume_handle: volume handle
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
u16 *volume_handle)
{
Mpi2RaidConfigurationPage0_t *config_page = NULL;
Mpi2ConfigRequest_t mpi_request;
Mpi2ConfigReply_t mpi_reply;
int r, i, config_page_sz;
u16 ioc_status;
int config_num;
u16 element_type;
u16 phys_disk_dev_handle;
*volume_handle = 0;
memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
mpi_request.Function = MPI2_FUNCTION_CONFIG;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG;
mpi_request.Header.PageVersion = MPI2_RAIDCONFIG0_PAGEVERSION;
mpi_request.Header.PageNumber = 0;
ioc->build_zero_len_sge_mpi(ioc, &mpi_request.PageBufferSGE);
r = _config_request(ioc, &mpi_request, &mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, NULL, 0);
if (r)
goto out;
mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
config_page_sz = (le16_to_cpu(mpi_reply.ExtPageLength) * 4);
config_page = kmalloc(config_page_sz, GFP_KERNEL);
if (!config_page) {
r = -1;
goto out;
}
config_num = 0xff;
while (1) {
mpi_request.PageAddress = cpu_to_le32(config_num +
MPI2_RAID_PGAD_FORM_GET_NEXT_CONFIGNUM);
r = _config_request(ioc, &mpi_request, &mpi_reply,
MPT3_CONFIG_PAGE_DEFAULT_TIMEOUT, config_page,
config_page_sz);
if (r)
goto out;
r = -1;
ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
MPI2_IOCSTATUS_MASK;
if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
goto out;
for (i = 0; i < config_page->NumElements; i++) {
element_type = le16_to_cpu(config_page->
ConfigElement[i].ElementFlags) &
MPI2_RAIDCONFIG0_EFLAGS_MASK_ELEMENT_TYPE;
if (element_type ==
MPI2_RAIDCONFIG0_EFLAGS_VOL_PHYS_DISK_ELEMENT ||
element_type ==
MPI2_RAIDCONFIG0_EFLAGS_OCE_ELEMENT) {
phys_disk_dev_handle =
le16_to_cpu(config_page->ConfigElement[i].
PhysDiskDevHandle);
if (phys_disk_dev_handle == pd_handle) {
*volume_handle =
le16_to_cpu(config_page->
ConfigElement[i].VolDevHandle);
r = 0;
goto out;
}
} else if (element_type ==
MPI2_RAIDCONFIG0_EFLAGS_HOT_SPARE_ELEMENT) {
*volume_handle = 0;
r = 0;
goto out;
}
}
config_num = config_page->ConfigNum;
}
out:
kfree(config_page);
return r;
}
/**
* mpt3sas_config_get_volume_wwid - returns wwid given the volume handle
* @ioc: per adapter object
* @volume_handle: volume handle
* @wwid: volume wwid
* Context: sleep.
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc, u16 volume_handle,
u64 *wwid)
{
Mpi2ConfigReply_t mpi_reply;
Mpi2RaidVolPage1_t raid_vol_pg1;
*wwid = 0;
if (!(mpt3sas_config_get_raid_volume_pg1(ioc, &mpi_reply,
&raid_vol_pg1, MPI2_RAID_VOLUME_PGAD_FORM_HANDLE,
volume_handle))) {
*wwid = le64_to_cpu(raid_vol_pg1.WWID);
return 0;
} else
return -1;
}
drivers/scsi/mpt3sas/mpt3sas_ctl.c 0 → 100644
View file @ f92363d1
/*
* Management Module Support for MPT (Message Passing Technology) based
* controllers
*
* This code is based on drivers/scsi/mpt3sas/mpt3sas_ctl.c
* Copyright (C) 2012 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* NO WARRANTY
* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
* solely responsible for determining the appropriateness of using and
* distributing the Program and assumes all risks associated with its
* exercise of rights under this Agreement, including but not limited to
* the risks and costs of program errors, damage to or loss of data,
* programs or equipment, and unavailability or interruption of operations.
* DISCLAIMER OF LIABILITY
* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
* USA.
*/
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/compat.h>
#include <linux/poll.h>
#include <linux/io.h>
#include <linux/uaccess.h>
#include "mpt3sas_base.h"
#include "mpt3sas_ctl.h"
static struct fasync_struct *async_queue;
static DECLARE_WAIT_QUEUE_HEAD(ctl_poll_wait);
/**
* enum block_state - blocking state
* @NON_BLOCKING: non blocking
* @BLOCKING: blocking
*
* These states are for ioctls that need to wait for a response
* from firmware, so they probably require sleep.
*/
enum block_state {
NON_BLOCKING,
BLOCKING,
};
#ifdef CONFIG_SCSI_MPT3SAS_LOGGING
/**
* _ctl_sas_device_find_by_handle - sas device search
* @ioc: per adapter object
* @handle: sas device handle (assigned by firmware)
* Context: Calling function should acquire ioc->sas_device_lock
*
* This searches for sas_device based on sas_address, then return sas_device
* object.
*/
static struct _sas_device *
_ctl_sas_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle)
{
struct _sas_device *sas_device, *r;
r = NULL;
list_for_each_entry(sas_device, &ioc->sas_device_list, list) {
if (sas_device->handle != handle)
continue;
r = sas_device;
goto out;
}
out:
return r;
}
/**
* _ctl_display_some_debug - debug routine
* @ioc: per adapter object
* @smid: system request message index
* @calling_function_name: string pass from calling function
* @mpi_reply: reply message frame
* Context: none.
*
* Function for displaying debug info helpful when debugging issues
* in this module.
*/
static void
_ctl_display_some_debug(struct MPT3SAS_ADAPTER *ioc, u16 smid,
char *calling_function_name, MPI2DefaultReply_t *mpi_reply)
{
Mpi2ConfigRequest_t *mpi_request;
char *desc = NULL;
if (!(ioc->logging_level & MPT_DEBUG_IOCTL))
return;
mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
switch (mpi_request->Function) {
case MPI2_FUNCTION_SCSI_IO_REQUEST:
{
Mpi2SCSIIORequest_t *scsi_request =
(Mpi2SCSIIORequest_t *)mpi_request;
snprintf(ioc->tmp_string, MPT_STRING_LENGTH,
"scsi_io, cmd(0x%02x), cdb_len(%d)",
scsi_request->CDB.CDB32[0],
le16_to_cpu(scsi_request->IoFlags) & 0xF);
desc = ioc->tmp_string;
break;
}
case MPI2_FUNCTION_SCSI_TASK_MGMT:
desc = "task_mgmt";
break;
case MPI2_FUNCTION_IOC_INIT:
desc = "ioc_init";
break;
case MPI2_FUNCTION_IOC_FACTS:
desc = "ioc_facts";
break;
case MPI2_FUNCTION_CONFIG:
{
Mpi2ConfigRequest_t *config_request =
(Mpi2ConfigRequest_t *)mpi_request;
snprintf(ioc->tmp_string, MPT_STRING_LENGTH,
"config, type(0x%02x), ext_type(0x%02x), number(%d)",
(config_request->Header.PageType &
MPI2_CONFIG_PAGETYPE_MASK), config_request->ExtPageType,
config_request->Header.PageNumber);
desc = ioc->tmp_string;
break;
}
case MPI2_FUNCTION_PORT_FACTS:
desc = "port_facts";
break;
case MPI2_FUNCTION_PORT_ENABLE:
desc = "port_enable";
break;
case MPI2_FUNCTION_EVENT_NOTIFICATION:
desc = "event_notification";
break;
case MPI2_FUNCTION_FW_DOWNLOAD:
desc = "fw_download";
break;
case MPI2_FUNCTION_FW_UPLOAD:
desc = "fw_upload";
break;
case MPI2_FUNCTION_RAID_ACTION:
desc = "raid_action";
break;
case MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH:
{
Mpi2SCSIIORequest_t *scsi_request =
(Mpi2SCSIIORequest_t *)mpi_request;
snprintf(ioc->tmp_string, MPT_STRING_LENGTH,
"raid_pass, cmd(0x%02x), cdb_len(%d)",
scsi_request->CDB.CDB32[0],
le16_to_cpu(scsi_request->IoFlags) & 0xF);
desc = ioc->tmp_string;
break;
}
case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
desc = "sas_iounit_cntl";
break;
case MPI2_FUNCTION_SATA_PASSTHROUGH:
desc = "sata_pass";
break;
case MPI2_FUNCTION_DIAG_BUFFER_POST:
desc = "diag_buffer_post";
break;
case MPI2_FUNCTION_DIAG_RELEASE:
desc = "diag_release";
break;
case MPI2_FUNCTION_SMP_PASSTHROUGH:
desc = "smp_passthrough";
break;
}
if (!desc)
return;
pr_info(MPT3SAS_FMT "%s: %s, smid(%d)\n",
ioc->name, calling_function_name, desc, smid);
if (!mpi_reply)
return;
if (mpi_reply->IOCStatus || mpi_reply->IOCLogInfo)
pr_info(MPT3SAS_FMT
"\tiocstatus(0x%04x), loginfo(0x%08x)\n",
ioc->name, le16_to_cpu(mpi_reply->IOCStatus),
le32_to_cpu(mpi_reply->IOCLogInfo));
if (mpi_request->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
mpi_request->Function ==
MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH) {
Mpi2SCSIIOReply_t *scsi_reply =
(Mpi2SCSIIOReply_t *)mpi_reply;
struct _sas_device *sas_device = NULL;
unsigned long flags;
spin_lock_irqsave(&ioc->sas_device_lock, flags);
sas_device = _ctl_sas_device_find_by_handle(ioc,
le16_to_cpu(scsi_reply->DevHandle));
if (sas_device) {
pr_warn(MPT3SAS_FMT "\tsas_address(0x%016llx), phy(%d)\n",
ioc->name, (unsigned long long)
sas_device->sas_address, sas_device->phy);
pr_warn(MPT3SAS_FMT
"\tenclosure_logical_id(0x%016llx), slot(%d)\n",
ioc->name, (unsigned long long)
sas_device->enclosure_logical_id, sas_device->slot);
}
spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
if (scsi_reply->SCSIState || scsi_reply->SCSIStatus)
pr_info(MPT3SAS_FMT
"\tscsi_state(0x%02x), scsi_status"
"(0x%02x)\n", ioc->name,
scsi_reply->SCSIState,
scsi_reply->SCSIStatus);
}
}
#endif
/**
* mpt3sas_ctl_done - ctl module completion routine
* @ioc: per adapter object
* @smid: system request message index
* @msix_index: MSIX table index supplied by the OS
* @reply: reply message frame(lower 32bit addr)
* Context: none.
*
* The callback handler when using ioc->ctl_cb_idx.
*
* Return 1 meaning mf should be freed from _base_interrupt
* 0 means the mf is freed from this function.
*/
u8
mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
u32 reply)
{
MPI2DefaultReply_t *mpi_reply;
Mpi2SCSIIOReply_t *scsiio_reply;
const void *sense_data;
u32 sz;
if (ioc->ctl_cmds.status == MPT3_CMD_NOT_USED)
return 1;
if (ioc->ctl_cmds.smid != smid)
return 1;
ioc->ctl_cmds.status |= MPT3_CMD_COMPLETE;
mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
if (mpi_reply) {
memcpy(ioc->ctl_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
ioc->ctl_cmds.status |= MPT3_CMD_REPLY_VALID;
/* get sense data */
if (mpi_reply->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
mpi_reply->Function ==
MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH) {
scsiio_reply = (Mpi2SCSIIOReply_t *)mpi_reply;
if (scsiio_reply->SCSIState &
MPI2_SCSI_STATE_AUTOSENSE_VALID) {
sz = min_t(u32, SCSI_SENSE_BUFFERSIZE,
le32_to_cpu(scsiio_reply->SenseCount));
sense_data = mpt3sas_base_get_sense_buffer(ioc,
smid);
memcpy(ioc->ctl_cmds.sense, sense_data, sz);
}
}
}
#ifdef CONFIG_SCSI_MPT3SAS_LOGGING
_ctl_display_some_debug(ioc, smid, "ctl_done", mpi_reply);
#endif
ioc->ctl_cmds.status &= ~MPT3_CMD_PENDING;
complete(&ioc->ctl_cmds.done);
return 1;
}
/**
* _ctl_check_event_type - determines when an event needs logging
* @ioc: per adapter object
* @event: firmware event
*
* The bitmask in ioc->event_type[] indicates which events should be
* be saved in the driver event_log. This bitmask is set by application.
*
* Returns 1 when event should be captured, or zero means no match.
*/
static int
_ctl_check_event_type(struct MPT3SAS_ADAPTER *ioc, u16 event)
{
u16 i;
u32 desired_event;
if (event >= 128 || !event || !ioc->event_log)
return 0;
desired_event = (1 << (event % 32));
if (!desired_event)
desired_event = 1;
i = event / 32;
return desired_event & ioc->event_type[i];
}
/**
* mpt3sas_ctl_add_to_event_log - add event
* @ioc: per adapter object
* @mpi_reply: reply message frame
*
* Return nothing.
*/
void
mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
Mpi2EventNotificationReply_t *mpi_reply)
{
struct MPT3_IOCTL_EVENTS *event_log;
u16 event;
int i;
u32 sz, event_data_sz;
u8 send_aen = 0;
if (!ioc->event_log)
return;
event = le16_to_cpu(mpi_reply->Event);
if (_ctl_check_event_type(ioc, event)) {
/* insert entry into circular event_log */
i = ioc->event_context % MPT3SAS_CTL_EVENT_LOG_SIZE;
event_log = ioc->event_log;
event_log[i].event = event;
event_log[i].context = ioc->event_context++;
event_data_sz = le16_to_cpu(mpi_reply->EventDataLength)*4;
sz = min_t(u32, event_data_sz, MPT3_EVENT_DATA_SIZE);
memset(event_log[i].data, 0, MPT3_EVENT_DATA_SIZE);
memcpy(event_log[i].data, mpi_reply->EventData, sz);
send_aen = 1;
}
/* This aen_event_read_flag flag is set until the
* application has read the event log.
* For MPI2_EVENT_LOG_ENTRY_ADDED, we always notify.
*/
if (event == MPI2_EVENT_LOG_ENTRY_ADDED ||
(send_aen && !ioc->aen_event_read_flag)) {
ioc->aen_event_read_flag = 1;
wake_up_interruptible(&ctl_poll_wait);
if (async_queue)
kill_fasync(&async_queue, SIGIO, POLL_IN);
}
}
/**
* mpt3sas_ctl_event_callback - firmware event handler (called at ISR time)
* @ioc: per adapter object
* @msix_index: MSIX table index supplied by the OS
* @reply: reply message frame(lower 32bit addr)
* Context: interrupt.
*
* This function merely adds a new work task into ioc->firmware_event_thread.
* The tasks are worked from _firmware_event_work in user context.
*
* Return 1 meaning mf should be freed from _base_interrupt
* 0 means the mf is freed from this function.
*/
u8
mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
u32 reply)
{
Mpi2EventNotificationReply_t *mpi_reply;
mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
mpt3sas_ctl_add_to_event_log(ioc, mpi_reply);
return 1;
}
/**
* _ctl_verify_adapter - validates ioc_number passed from application
* @ioc: per adapter object
* @iocpp: The ioc pointer is returned in this.
*
* Return (-1) means error, else ioc_number.
*/
static int
_ctl_verify_adapter(int ioc_number, struct MPT3SAS_ADAPTER **iocpp)
{
struct MPT3SAS_ADAPTER *ioc;
list_for_each_entry(ioc, &mpt3sas_ioc_list, list) {
if (ioc->id != ioc_number)
continue;
*iocpp = ioc;
return ioc_number;
}
*iocpp = NULL;
return -1;
}
/**
* mpt3sas_ctl_reset_handler - reset callback handler (for ctl)
* @ioc: per adapter object
* @reset_phase: phase
*
* The handler for doing any required cleanup or initialization.
*
* The reset phase can be MPT3_IOC_PRE_RESET, MPT3_IOC_AFTER_RESET,
* MPT3_IOC_DONE_RESET
*/
void
mpt3sas_ctl_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase)
{
int i;
u8 issue_reset;
switch (reset_phase) {
case MPT3_IOC_PRE_RESET:
dtmprintk(ioc, pr_info(MPT3SAS_FMT
"%s: MPT3_IOC_PRE_RESET\n", ioc->name, __func__));
for (i = 0; i < MPI2_DIAG_BUF_TYPE_COUNT; i++) {
if (!(ioc->diag_buffer_status[i] &
MPT3_DIAG_BUFFER_IS_REGISTERED))
continue;
if ((ioc->diag_buffer_status[i] &
MPT3_DIAG_BUFFER_IS_RELEASED))
continue;
mpt3sas_send_diag_release(ioc, i, &issue_reset);
}
break;
case MPT3_IOC_AFTER_RESET:
dtmprintk(ioc, pr_info(MPT3SAS_FMT
"%s: MPT3_IOC_AFTER_RESET\n", ioc->name, __func__));
if (ioc->ctl_cmds.status & MPT3_CMD_PENDING) {
ioc->ctl_cmds.status |= MPT3_CMD_RESET;
mpt3sas_base_free_smid(ioc, ioc->ctl_cmds.smid);
complete(&ioc->ctl_cmds.done);
}
break;
case MPT3_IOC_DONE_RESET:
dtmprintk(ioc, pr_info(MPT3SAS_FMT
"%s: MPT3_IOC_DONE_RESET\n", ioc->name, __func__));
for (i = 0; i < MPI2_DIAG_BUF_TYPE_COUNT; i++) {
if (!(ioc->diag_buffer_status[i] &
MPT3_DIAG_BUFFER_IS_REGISTERED))
continue;
if ((ioc->diag_buffer_status[i] &
MPT3_DIAG_BUFFER_IS_RELEASED))
continue;
ioc->diag_buffer_status[i] |=
MPT3_DIAG_BUFFER_IS_DIAG_RESET;
}
break;
}
}
/**
* _ctl_fasync -
* @fd -
* @filep -
* @mode -
*
* Called when application request fasyn callback handler.
*/
static int
_ctl_fasync(int fd, struct file *filep, int mode)
{
return fasync_helper(fd, filep, mode, &async_queue);
}
/**
* _ctl_release -
* @inode -
* @filep -
*
* Called when application releases the fasyn callback handler.
*/
static int
_ctl_release(struct inode *inode, struct file *filep)
{
return fasync_helper(-1, filep, 0, &async_queue);
}
/**
* _ctl_poll -
* @file -
* @wait -
*
*/
static unsigned int
_ctl_poll(struct file *filep, poll_table *wait)
{
struct MPT3SAS_ADAPTER *ioc;
poll_wait(filep, &ctl_poll_wait, wait);
list_for_each_entry(ioc, &mpt3sas_ioc_list, list) {
if (ioc->aen_event_read_flag)
return POLLIN | POLLRDNORM;
}
return 0;
}
/**
* _ctl_set_task_mid - assign an active smid to tm request
* @ioc: per adapter object
* @karg - (struct mpt3_ioctl_command)
* @tm_request - pointer to mf from user space
*
* Returns 0 when an smid if found, else fail.
* during failure, the reply frame is filled.
*/
static int
_ctl_set_task_mid(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command *karg,
Mpi2SCSITaskManagementRequest_t *tm_request)
{
u8 found = 0;
u16 i;
u16 handle;
struct scsi_cmnd *scmd;
struct MPT3SAS_DEVICE *priv_data;
unsigned long flags;
Mpi2SCSITaskManagementReply_t *tm_reply;
u32 sz;
u32 lun;
char *desc = NULL;
if (tm_request->TaskType == MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK)
desc = "abort_task";
else if (tm_request->TaskType == MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK)
desc = "query_task";
else
return 0;
lun = scsilun_to_int((struct scsi_lun *)tm_request->LUN);
handle = le16_to_cpu(tm_request->DevHandle);
spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
for (i = ioc->scsiio_depth; i && !found; i--) {
scmd = ioc->scsi_lookup[i - 1].scmd;
if (scmd == NULL || scmd->device == NULL ||
scmd->device->hostdata == NULL)
continue;
if (lun != scmd->device->lun)
continue;
priv_data = scmd->device->hostdata;
if (priv_data->sas_target == NULL)
continue;
if (priv_data->sas_target->handle != handle)
continue;
tm_request->TaskMID = cpu_to_le16(ioc->scsi_lookup[i - 1].smid);
found = 1;
}
spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
if (!found) {
dctlprintk(ioc, pr_info(MPT3SAS_FMT
"%s: handle(0x%04x), lun(%d), no active mid!!\n",
ioc->name,
desc, le16_to_cpu(tm_request->DevHandle), lun));
tm_reply = ioc->ctl_cmds.reply;
tm_reply->DevHandle = tm_request->DevHandle;
tm_reply->Function = MPI2_FUNCTION_SCSI_TASK_MGMT;
tm_reply->TaskType = tm_request->TaskType;
tm_reply->MsgLength = sizeof(Mpi2SCSITaskManagementReply_t)/4;
tm_reply->VP_ID = tm_request->VP_ID;
tm_reply->VF_ID = tm_request->VF_ID;
sz = min_t(u32, karg->max_reply_bytes, ioc->reply_sz);
if (copy_to_user(karg->reply_frame_buf_ptr, ioc->ctl_cmds.reply,
sz))
pr_err("failure at %s:%d/%s()!\n", __FILE__,
__LINE__, __func__);
return 1;
}
dctlprintk(ioc, pr_info(MPT3SAS_FMT
"%s: handle(0x%04x), lun(%d), task_mid(%d)\n", ioc->name,
desc, le16_to_cpu(tm_request->DevHandle), lun,
le16_to_cpu(tm_request->TaskMID)));
return 0;
}
/**
* _ctl_do_mpt_command - main handler for MPT3COMMAND opcode
* @ioc: per adapter object
* @karg - (struct mpt3_ioctl_command)
* @mf - pointer to mf in user space
*/
static long
_ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg,
void __user *mf)
{
MPI2RequestHeader_t *mpi_request = NULL, *request;
MPI2DefaultReply_t *mpi_reply;
u32 ioc_state;
u16 ioc_status;
u16 smid;
unsigned long timeout, timeleft;
u8 issue_reset;
u32 sz;
void *psge;
void *data_out = NULL;
dma_addr_t data_out_dma = 0;
size_t data_out_sz = 0;
void *data_in = NULL;
dma_addr_t data_in_dma = 0;
size_t data_in_sz = 0;
long ret;
u16 wait_state_count;
issue_reset = 0;
if (ioc->ctl_cmds.status != MPT3_CMD_NOT_USED) {
pr_err(MPT3SAS_FMT "%s: ctl_cmd in use\n",
ioc->name, __func__);
ret = -EAGAIN;
goto out;
}
wait_state_count = 0;
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
if (wait_state_count++ == 10) {
pr_err(MPT3SAS_FMT
"%s: failed due to ioc not operational\n",
ioc->name, __func__);
ret = -EFAULT;
goto out;
}
ssleep(1);
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
pr_info(MPT3SAS_FMT
"%s: waiting for operational state(count=%d)\n",
ioc->name,
__func__, wait_state_count);
}
if (wait_state_count)
pr_info(MPT3SAS_FMT "%s: ioc is operational\n",
ioc->name, __func__);
mpi_request = kzalloc(ioc->request_sz, GFP_KERNEL);
if (!mpi_request) {
pr_err(MPT3SAS_FMT
"%s: failed obtaining a memory for mpi_request\n",
ioc->name, __func__);
ret = -ENOMEM;
goto out;
}
/* Check for overflow and wraparound */
if (karg.data_sge_offset * 4 > ioc->request_sz ||
karg.data_sge_offset > (UINT_MAX / 4)) {
ret = -EINVAL;
goto out;
}
/* copy in request message frame from user */
if (copy_from_user(mpi_request, mf, karg.data_sge_offset*4)) {
pr_err("failure at %s:%d/%s()!\n", __FILE__, __LINE__,
__func__);
ret = -EFAULT;
goto out;
}
if (mpi_request->Function == MPI2_FUNCTION_SCSI_TASK_MGMT) {
smid = mpt3sas_base_get_smid_hpr(ioc, ioc->ctl_cb_idx);
if (!smid) {
pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
ioc->name, __func__);
ret = -EAGAIN;
goto out;
}
} else {
smid = mpt3sas_base_get_smid_scsiio(ioc, ioc->ctl_cb_idx, NULL);
if (!smid) {
pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
ioc->name, __func__);
ret = -EAGAIN;
goto out;
}
}
ret = 0;
ioc->ctl_cmds.status = MPT3_CMD_PENDING;
memset(ioc->ctl_cmds.reply, 0, ioc->reply_sz);
request = mpt3sas_base_get_msg_frame(ioc, smid);
memcpy(request, mpi_request, karg.data_sge_offset*4);
ioc->ctl_cmds.smid = smid;
data_out_sz = karg.data_out_size;
data_in_sz = karg.data_in_size;
if (mpi_request->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
mpi_request->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH) {
if (!le16_to_cpu(mpi_request->FunctionDependent1) ||
le16_to_cpu(mpi_request->FunctionDependent1) >
ioc->facts.MaxDevHandle) {
ret = -EINVAL;
mpt3sas_base_free_smid(ioc, smid);
goto out;
}
}
/* obtain dma-able memory for data transfer */
if (data_out_sz) /* WRITE */ {
data_out = pci_alloc_consistent(ioc->pdev, data_out_sz,
&data_out_dma);
if (!data_out) {
pr_err("failure at %s:%d/%s()!\n", __FILE__,
__LINE__, __func__);
ret = -ENOMEM;
mpt3sas_base_free_smid(ioc, smid);
goto out;
}
if (copy_from_user(data_out, karg.data_out_buf_ptr,
data_out_sz)) {
pr_err("failure at %s:%d/%s()!\n", __FILE__,
__LINE__, __func__);
ret = -EFAULT;
mpt3sas_base_free_smid(ioc, smid);
goto out;
}
}
if (data_in_sz) /* READ */ {
data_in = pci_alloc_consistent(ioc->pdev, data_in_sz,
&data_in_dma);
if (!data_in) {
pr_err("failure at %s:%d/%s()!\n", __FILE__,
__LINE__, __func__);
ret = -ENOMEM;
mpt3sas_base_free_smid(ioc, smid);
goto out;
}
}
psge = (void *)request + (karg.data_sge_offset*4);
/* send command to firmware */
#ifdef CONFIG_SCSI_MPT3SAS_LOGGING
_ctl_display_some_debug(ioc, smid, "ctl_request", NULL);
#endif
init_completion(&ioc->ctl_cmds.done);
switch (mpi_request->Function) {
case MPI2_FUNCTION_SCSI_IO_REQUEST:
case MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH:
{
Mpi2SCSIIORequest_t *scsiio_request =
(Mpi2SCSIIORequest_t *)request;
scsiio_request->SenseBufferLength = SCSI_SENSE_BUFFERSIZE;
scsiio_request->SenseBufferLowAddress =
mpt3sas_base_get_sense_buffer_dma(ioc, smid);
memset(ioc->ctl_cmds.sense, 0, SCSI_SENSE_BUFFERSIZE);
ioc->build_sg(ioc, psge, data_out_dma, data_out_sz,
data_in_dma, data_in_sz);
if (mpi_request->Function == MPI2_FUNCTION_SCSI_IO_REQUEST)
mpt3sas_base_put_smid_scsi_io(ioc, smid,
le16_to_cpu(mpi_request->FunctionDependent1));
else
mpt3sas_base_put_smid_default(ioc, smid);
break;
}
case MPI2_FUNCTION_SCSI_TASK_MGMT:
{
Mpi2SCSITaskManagementRequest_t *tm_request =
(Mpi2SCSITaskManagementRequest_t *)request;
dtmprintk(ioc, pr_info(MPT3SAS_FMT
"TASK_MGMT: handle(0x%04x), task_type(0x%02x)\n",
ioc->name,
le16_to_cpu(tm_request->DevHandle), tm_request->TaskType));
if (tm_request->TaskType ==
MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK ||
tm_request->TaskType ==
MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK) {
if (_ctl_set_task_mid(ioc, &karg, tm_request)) {
mpt3sas_base_free_smid(ioc, smid);
goto out;
}
}
mpt3sas_scsih_set_tm_flag(ioc, le16_to_cpu(
tm_request->DevHandle));
ioc->build_sg_mpi(ioc, psge, data_out_dma, data_out_sz,
data_in_dma, data_in_sz);
mpt3sas_base_put_smid_hi_priority(ioc, smid);
break;
}
case MPI2_FUNCTION_SMP_PASSTHROUGH:
{
Mpi2SmpPassthroughRequest_t *smp_request =
(Mpi2SmpPassthroughRequest_t *)mpi_request;
u8 *data;
/* ioc determines which port to use */
smp_request->PhysicalPort = 0xFF;
if (smp_request->PassthroughFlags &
MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE)
data = (u8 *)&smp_request->SGL;
else {
if (unlikely(data_out == NULL)) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
mpt3sas_base_free_smid(ioc, smid);
ret = -EINVAL;
goto out;
}
data = data_out;
}
if (data[1] == 0x91 && (data[10] == 1 || data[10] == 2)) {
ioc->ioc_link_reset_in_progress = 1;
ioc->ignore_loginfos = 1;
}
ioc->build_sg(ioc, psge, data_out_dma, data_out_sz, data_in_dma,
data_in_sz);
mpt3sas_base_put_smid_default(ioc, smid);
break;
}
case MPI2_FUNCTION_SATA_PASSTHROUGH:
case MPI2_FUNCTION_FW_DOWNLOAD:
case MPI2_FUNCTION_FW_UPLOAD:
{
ioc->build_sg(ioc, psge, data_out_dma, data_out_sz, data_in_dma,
data_in_sz);
mpt3sas_base_put_smid_default(ioc, smid);
break;
}
case MPI2_FUNCTION_TOOLBOX:
{
Mpi2ToolboxCleanRequest_t *toolbox_request =
(Mpi2ToolboxCleanRequest_t *)mpi_request;
if (toolbox_request->Tool == MPI2_TOOLBOX_DIAGNOSTIC_CLI_TOOL) {
ioc->build_sg(ioc, psge, data_out_dma, data_out_sz,
data_in_dma, data_in_sz);
} else {
ioc->build_sg_mpi(ioc, psge, data_out_dma, data_out_sz,
data_in_dma, data_in_sz);
}
mpt3sas_base_put_smid_default(ioc, smid);
break;
}
case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
{
Mpi2SasIoUnitControlRequest_t *sasiounit_request =
(Mpi2SasIoUnitControlRequest_t *)mpi_request;
if (sasiounit_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET
|| sasiounit_request->Operation ==
MPI2_SAS_OP_PHY_LINK_RESET) {
ioc->ioc_link_reset_in_progress = 1;
ioc->ignore_loginfos = 1;
}
/* drop to default case for posting the request */
}
default:
ioc->build_sg_mpi(ioc, psge, data_out_dma, data_out_sz,
data_in_dma, data_in_sz);
mpt3sas_base_put_smid_default(ioc, smid);
break;
}
if (karg.timeout < MPT3_IOCTL_DEFAULT_TIMEOUT)
timeout = MPT3_IOCTL_DEFAULT_TIMEOUT;
else
timeout = karg.timeout;
timeleft = wait_for_completion_timeout(&ioc->ctl_cmds.done,
timeout*HZ);
if (mpi_request->Function == MPI2_FUNCTION_SCSI_TASK_MGMT) {
Mpi2SCSITaskManagementRequest_t *tm_request =
(Mpi2SCSITaskManagementRequest_t *)mpi_request;
mpt3sas_scsih_clear_tm_flag(ioc, le16_to_cpu(
tm_request->DevHandle));
mpt3sas_trigger_master(ioc, MASTER_TRIGGER_TASK_MANAGMENT);
} else if ((mpi_request->Function == MPI2_FUNCTION_SMP_PASSTHROUGH ||
mpi_request->Function == MPI2_FUNCTION_SAS_IO_UNIT_CONTROL) &&
ioc->ioc_link_reset_in_progress) {
ioc->ioc_link_reset_in_progress = 0;
ioc->ignore_loginfos = 0;
}
if (!(ioc->ctl_cmds.status & MPT3_CMD_COMPLETE)) {
pr_err(MPT3SAS_FMT "%s: timeout\n", ioc->name,
__func__);
_debug_dump_mf(mpi_request, karg.data_sge_offset);
if (!(ioc->ctl_cmds.status & MPT3_CMD_RESET))
issue_reset = 1;
goto issue_host_reset;
}
mpi_reply = ioc->ctl_cmds.reply;
ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
#ifdef CONFIG_SCSI_MPT3SAS_LOGGING
if (mpi_reply->Function == MPI2_FUNCTION_SCSI_TASK_MGMT &&
(ioc->logging_level & MPT_DEBUG_TM)) {
Mpi2SCSITaskManagementReply_t *tm_reply =
(Mpi2SCSITaskManagementReply_t *)mpi_reply;
pr_info(MPT3SAS_FMT "TASK_MGMT: " \
"IOCStatus(0x%04x), IOCLogInfo(0x%08x), "
"TerminationCount(0x%08x)\n", ioc->name,
le16_to_cpu(tm_reply->IOCStatus),
le32_to_cpu(tm_reply->IOCLogInfo),
le32_to_cpu(tm_reply->TerminationCount));
}
#endif
/* copy out xdata to user */
if (data_in_sz) {
if (copy_to_user(karg.data_in_buf_ptr, data_in,
data_in_sz)) {
pr_err("failure at %s:%d/%s()!\n", __FILE__,
__LINE__, __func__);
ret = -ENODATA;
goto out;
}
}
/* copy out reply message frame to user */
if (karg.max_reply_bytes) {
sz = min_t(u32, karg.max_reply_bytes, ioc->reply_sz);
if (copy_to_user(karg.reply_frame_buf_ptr, ioc->ctl_cmds.reply,
sz)) {
pr_err("failure at %s:%d/%s()!\n", __FILE__,
__LINE__, __func__);
ret = -ENODATA;
goto out;
}
}
/* copy out sense to user */
if (karg.max_sense_bytes && (mpi_request->Function ==
MPI2_FUNCTION_SCSI_IO_REQUEST || mpi_request->Function ==
MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH)) {
sz = min_t(u32, karg.max_sense_bytes, SCSI_SENSE_BUFFERSIZE);
if (copy_to_user(karg.sense_data_ptr, ioc->ctl_cmds.sense,
sz)) {
pr_err("failure at %s:%d/%s()!\n", __FILE__,
__LINE__, __func__);
ret = -ENODATA;
goto out;
}
}
issue_host_reset:
if (issue_reset) {
ret = -ENODATA;
if ((mpi_request->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
mpi_request->Function ==
MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
mpi_request->Function == MPI2_FUNCTION_SATA_PASSTHROUGH)) {
pr_info(MPT3SAS_FMT "issue target reset: handle = (0x%04x)\n",
ioc->name,
le16_to_cpu(mpi_request->FunctionDependent1));
mpt3sas_halt_firmware(ioc);
mpt3sas_scsih_issue_tm(ioc,
le16_to_cpu(mpi_request->FunctionDependent1), 0, 0,
0, MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET, 0, 30,
0, TM_MUTEX_ON);
} else
mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
FORCE_BIG_HAMMER);
}
out:
/* free memory associated with sg buffers */
if (data_in)
pci_free_consistent(ioc->pdev, data_in_sz, data_in,
data_in_dma);
if (data_out)
pci_free_consistent(ioc->pdev, data_out_sz, data_out,
data_out_dma);
kfree(mpi_request);
ioc->ctl_cmds.status = MPT3_CMD_NOT_USED;
return ret;
}
/**
* _ctl_getiocinfo - main handler for MPT3IOCINFO opcode
* @ioc: per adapter object
* @arg - user space buffer containing ioctl content
*/
static long
_ctl_getiocinfo(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_ioctl_iocinfo karg;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n", ioc->name,
__func__));
memset(&karg, 0 , sizeof(karg));
karg.adapter_type = MPT3_IOCTL_INTERFACE_SAS3;
if (ioc->pfacts)
karg.port_number = ioc->pfacts[0].PortNumber;
karg.hw_rev = ioc->pdev->revision;
karg.pci_id = ioc->pdev->device;
karg.subsystem_device = ioc->pdev->subsystem_device;
karg.subsystem_vendor = ioc->pdev->subsystem_vendor;
karg.pci_information.u.bits.bus = ioc->pdev->bus->number;
karg.pci_information.u.bits.device = PCI_SLOT(ioc->pdev->devfn);
karg.pci_information.u.bits.function = PCI_FUNC(ioc->pdev->devfn);
karg.pci_information.segment_id = pci_domain_nr(ioc->pdev->bus);
karg.firmware_version = ioc->facts.FWVersion.Word;
strcpy(karg.driver_version, MPT3SAS_DRIVER_NAME);
strcat(karg.driver_version, "-");
strcat(karg.driver_version, MPT3SAS_DRIVER_VERSION);
karg.bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
if (copy_to_user(arg, &karg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
return 0;
}
/**
* _ctl_eventquery - main handler for MPT3EVENTQUERY opcode
* @ioc: per adapter object
* @arg - user space buffer containing ioctl content
*/
static long
_ctl_eventquery(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_ioctl_eventquery karg;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n", ioc->name,
__func__));
karg.event_entries = MPT3SAS_CTL_EVENT_LOG_SIZE;
memcpy(karg.event_types, ioc->event_type,
MPI2_EVENT_NOTIFY_EVENTMASK_WORDS * sizeof(u32));
if (copy_to_user(arg, &karg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
return 0;
}
/**
* _ctl_eventenable - main handler for MPT3EVENTENABLE opcode
* @ioc: per adapter object
* @arg - user space buffer containing ioctl content
*/
static long
_ctl_eventenable(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_ioctl_eventenable karg;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n", ioc->name,
__func__));
memcpy(ioc->event_type, karg.event_types,
MPI2_EVENT_NOTIFY_EVENTMASK_WORDS * sizeof(u32));
mpt3sas_base_validate_event_type(ioc, ioc->event_type);
if (ioc->event_log)
return 0;
/* initialize event_log */
ioc->event_context = 0;
ioc->aen_event_read_flag = 0;
ioc->event_log = kcalloc(MPT3SAS_CTL_EVENT_LOG_SIZE,
sizeof(struct MPT3_IOCTL_EVENTS), GFP_KERNEL);
if (!ioc->event_log) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -ENOMEM;
}
return 0;
}
/**
* _ctl_eventreport - main handler for MPT3EVENTREPORT opcode
* @ioc: per adapter object
* @arg - user space buffer containing ioctl content
*/
static long
_ctl_eventreport(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_ioctl_eventreport karg;
u32 number_bytes, max_events, max;
struct mpt3_ioctl_eventreport __user *uarg = arg;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n", ioc->name,
__func__));
number_bytes = karg.hdr.max_data_size -
sizeof(struct mpt3_ioctl_header);
max_events = number_bytes/sizeof(struct MPT3_IOCTL_EVENTS);
max = min_t(u32, MPT3SAS_CTL_EVENT_LOG_SIZE, max_events);
/* If fewer than 1 event is requested, there must have
* been some type of error.
*/
if (!max || !ioc->event_log)
return -ENODATA;
number_bytes = max * sizeof(struct MPT3_IOCTL_EVENTS);
if (copy_to_user(uarg->event_data, ioc->event_log, number_bytes)) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
/* reset flag so SIGIO can restart */
ioc->aen_event_read_flag = 0;
return 0;
}
/**
* _ctl_do_reset - main handler for MPT3HARDRESET opcode
* @ioc: per adapter object
* @arg - user space buffer containing ioctl content
*/
static long
_ctl_do_reset(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_ioctl_diag_reset karg;
int retval;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
if (ioc->shost_recovery || ioc->pci_error_recovery ||
ioc->is_driver_loading)
return -EAGAIN;
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n", ioc->name,
__func__));
retval = mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
FORCE_BIG_HAMMER);
pr_info(MPT3SAS_FMT "host reset: %s\n",
ioc->name, ((!retval) ? "SUCCESS" : "FAILED"));
return 0;
}
/**
* _ctl_btdh_search_sas_device - searching for sas device
* @ioc: per adapter object
* @btdh: btdh ioctl payload
*/
static int
_ctl_btdh_search_sas_device(struct MPT3SAS_ADAPTER *ioc,
struct mpt3_ioctl_btdh_mapping *btdh)
{
struct _sas_device *sas_device;
unsigned long flags;
int rc = 0;
if (list_empty(&ioc->sas_device_list))
return rc;
spin_lock_irqsave(&ioc->sas_device_lock, flags);
list_for_each_entry(sas_device, &ioc->sas_device_list, list) {
if (btdh->bus == 0xFFFFFFFF && btdh->id == 0xFFFFFFFF &&
btdh->handle == sas_device->handle) {
btdh->bus = sas_device->channel;
btdh->id = sas_device->id;
rc = 1;
goto out;
} else if (btdh->bus == sas_device->channel && btdh->id ==
sas_device->id && btdh->handle == 0xFFFF) {
btdh->handle = sas_device->handle;
rc = 1;
goto out;
}
}
out:
spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
return rc;
}
/**
* _ctl_btdh_search_raid_device - searching for raid device
* @ioc: per adapter object
* @btdh: btdh ioctl payload
*/
static int
_ctl_btdh_search_raid_device(struct MPT3SAS_ADAPTER *ioc,
struct mpt3_ioctl_btdh_mapping *btdh)
{
struct _raid_device *raid_device;
unsigned long flags;
int rc = 0;
if (list_empty(&ioc->raid_device_list))
return rc;
spin_lock_irqsave(&ioc->raid_device_lock, flags);
list_for_each_entry(raid_device, &ioc->raid_device_list, list) {
if (btdh->bus == 0xFFFFFFFF && btdh->id == 0xFFFFFFFF &&
btdh->handle == raid_device->handle) {
btdh->bus = raid_device->channel;
btdh->id = raid_device->id;
rc = 1;
goto out;
} else if (btdh->bus == raid_device->channel && btdh->id ==
raid_device->id && btdh->handle == 0xFFFF) {
btdh->handle = raid_device->handle;
rc = 1;
goto out;
}
}
out:
spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
return rc;
}
/**
* _ctl_btdh_mapping - main handler for MPT3BTDHMAPPING opcode
* @ioc: per adapter object
* @arg - user space buffer containing ioctl content
*/
static long
_ctl_btdh_mapping(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_ioctl_btdh_mapping karg;
int rc;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
__func__));
rc = _ctl_btdh_search_sas_device(ioc, &karg);
if (!rc)
_ctl_btdh_search_raid_device(ioc, &karg);
if (copy_to_user(arg, &karg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
return 0;
}
/**
* _ctl_diag_capability - return diag buffer capability
* @ioc: per adapter object
* @buffer_type: specifies either TRACE, SNAPSHOT, or EXTENDED
*
* returns 1 when diag buffer support is enabled in firmware
*/
static u8
_ctl_diag_capability(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type)
{
u8 rc = 0;
switch (buffer_type) {
case MPI2_DIAG_BUF_TYPE_TRACE:
if (ioc->facts.IOCCapabilities &
MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
rc = 1;
break;
case MPI2_DIAG_BUF_TYPE_SNAPSHOT:
if (ioc->facts.IOCCapabilities &
MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
rc = 1;
break;
case MPI2_DIAG_BUF_TYPE_EXTENDED:
if (ioc->facts.IOCCapabilities &
MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER)
rc = 1;
}
return rc;
}
/**
* _ctl_diag_register_2 - wrapper for registering diag buffer support
* @ioc: per adapter object
* @diag_register: the diag_register struct passed in from user space
*
*/
static long
_ctl_diag_register_2(struct MPT3SAS_ADAPTER *ioc,
struct mpt3_diag_register *diag_register)
{
int rc, i;
void *request_data = NULL;
dma_addr_t request_data_dma;
u32 request_data_sz = 0;
Mpi2DiagBufferPostRequest_t *mpi_request;
Mpi2DiagBufferPostReply_t *mpi_reply;
u8 buffer_type;
unsigned long timeleft;
u16 smid;
u16 ioc_status;
u32 ioc_state;
u8 issue_reset = 0;
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
__func__));
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
if (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
pr_err(MPT3SAS_FMT
"%s: failed due to ioc not operational\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
if (ioc->ctl_cmds.status != MPT3_CMD_NOT_USED) {
pr_err(MPT3SAS_FMT "%s: ctl_cmd in use\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
buffer_type = diag_register->buffer_type;
if (!_ctl_diag_capability(ioc, buffer_type)) {
pr_err(MPT3SAS_FMT
"%s: doesn't have capability for buffer_type(0x%02x)\n",
ioc->name, __func__, buffer_type);
return -EPERM;
}
if (ioc->diag_buffer_status[buffer_type] &
MPT3_DIAG_BUFFER_IS_REGISTERED) {
pr_err(MPT3SAS_FMT
"%s: already has a registered buffer for buffer_type(0x%02x)\n",
ioc->name, __func__,
buffer_type);
return -EINVAL;
}
if (diag_register->requested_buffer_size % 4) {
pr_err(MPT3SAS_FMT
"%s: the requested_buffer_size is not 4 byte aligned\n",
ioc->name, __func__);
return -EINVAL;
}
smid = mpt3sas_base_get_smid(ioc, ioc->ctl_cb_idx);
if (!smid) {
pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
rc = 0;
ioc->ctl_cmds.status = MPT3_CMD_PENDING;
memset(ioc->ctl_cmds.reply, 0, ioc->reply_sz);
mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
ioc->ctl_cmds.smid = smid;
request_data = ioc->diag_buffer[buffer_type];
request_data_sz = diag_register->requested_buffer_size;
ioc->unique_id[buffer_type] = diag_register->unique_id;
ioc->diag_buffer_status[buffer_type] = 0;
memcpy(ioc->product_specific[buffer_type],
diag_register->product_specific, MPT3_PRODUCT_SPECIFIC_DWORDS);
ioc->diagnostic_flags[buffer_type] = diag_register->diagnostic_flags;
if (request_data) {
request_data_dma = ioc->diag_buffer_dma[buffer_type];
if (request_data_sz != ioc->diag_buffer_sz[buffer_type]) {
pci_free_consistent(ioc->pdev,
ioc->diag_buffer_sz[buffer_type],
request_data, request_data_dma);
request_data = NULL;
}
}
if (request_data == NULL) {
ioc->diag_buffer_sz[buffer_type] = 0;
ioc->diag_buffer_dma[buffer_type] = 0;
request_data = pci_alloc_consistent(
ioc->pdev, request_data_sz, &request_data_dma);
if (request_data == NULL) {
pr_err(MPT3SAS_FMT "%s: failed allocating memory" \
" for diag buffers, requested size(%d)\n",
ioc->name, __func__, request_data_sz);
mpt3sas_base_free_smid(ioc, smid);
return -ENOMEM;
}
ioc->diag_buffer[buffer_type] = request_data;
ioc->diag_buffer_sz[buffer_type] = request_data_sz;
ioc->diag_buffer_dma[buffer_type] = request_data_dma;
}
mpi_request->Function = MPI2_FUNCTION_DIAG_BUFFER_POST;
mpi_request->BufferType = diag_register->buffer_type;
mpi_request->Flags = cpu_to_le32(diag_register->diagnostic_flags);
mpi_request->BufferAddress = cpu_to_le64(request_data_dma);
mpi_request->BufferLength = cpu_to_le32(request_data_sz);
mpi_request->VF_ID = 0; /* TODO */
mpi_request->VP_ID = 0;
dctlprintk(ioc, pr_info(MPT3SAS_FMT
"%s: diag_buffer(0x%p), dma(0x%llx), sz(%d)\n",
ioc->name, __func__, request_data,
(unsigned long long)request_data_dma,
le32_to_cpu(mpi_request->BufferLength)));
for (i = 0; i < MPT3_PRODUCT_SPECIFIC_DWORDS; i++)
mpi_request->ProductSpecific[i] =
cpu_to_le32(ioc->product_specific[buffer_type][i]);
init_completion(&ioc->ctl_cmds.done);
mpt3sas_base_put_smid_default(ioc, smid);
timeleft = wait_for_completion_timeout(&ioc->ctl_cmds.done,
MPT3_IOCTL_DEFAULT_TIMEOUT*HZ);
if (!(ioc->ctl_cmds.status & MPT3_CMD_COMPLETE)) {
pr_err(MPT3SAS_FMT "%s: timeout\n", ioc->name,
__func__);
_debug_dump_mf(mpi_request,
sizeof(Mpi2DiagBufferPostRequest_t)/4);
if (!(ioc->ctl_cmds.status & MPT3_CMD_RESET))
issue_reset = 1;
goto issue_host_reset;
}
/* process the completed Reply Message Frame */
if ((ioc->ctl_cmds.status & MPT3_CMD_REPLY_VALID) == 0) {
pr_err(MPT3SAS_FMT "%s: no reply message\n",
ioc->name, __func__);
rc = -EFAULT;
goto out;
}
mpi_reply = ioc->ctl_cmds.reply;
ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
ioc->diag_buffer_status[buffer_type] |=
MPT3_DIAG_BUFFER_IS_REGISTERED;
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s: success\n",
ioc->name, __func__));
} else {
pr_info(MPT3SAS_FMT
"%s: ioc_status(0x%04x) log_info(0x%08x)\n",
ioc->name, __func__,
ioc_status, le32_to_cpu(mpi_reply->IOCLogInfo));
rc = -EFAULT;
}
issue_host_reset:
if (issue_reset)
mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
FORCE_BIG_HAMMER);
out:
if (rc && request_data)
pci_free_consistent(ioc->pdev, request_data_sz,
request_data, request_data_dma);
ioc->ctl_cmds.status = MPT3_CMD_NOT_USED;
return rc;
}
/**
* mpt3sas_enable_diag_buffer - enabling diag_buffers support driver load time
* @ioc: per adapter object
* @bits_to_register: bitwise field where trace is bit 0, and snapshot is bit 1
*
* This is called when command line option diag_buffer_enable is enabled
* at driver load time.
*/
void
mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc, u8 bits_to_register)
{
struct mpt3_diag_register diag_register;
memset(&diag_register, 0, sizeof(struct mpt3_diag_register));
if (bits_to_register & 1) {
pr_info(MPT3SAS_FMT "registering trace buffer support\n",
ioc->name);
ioc->diag_trigger_master.MasterData =
(MASTER_TRIGGER_FW_FAULT + MASTER_TRIGGER_ADAPTER_RESET);
diag_register.buffer_type = MPI2_DIAG_BUF_TYPE_TRACE;
/* register for 2MB buffers */
diag_register.requested_buffer_size = 2 * (1024 * 1024);
diag_register.unique_id = 0x7075900;
_ctl_diag_register_2(ioc, &diag_register);
}
if (bits_to_register & 2) {
pr_info(MPT3SAS_FMT "registering snapshot buffer support\n",
ioc->name);
diag_register.buffer_type = MPI2_DIAG_BUF_TYPE_SNAPSHOT;
/* register for 2MB buffers */
diag_register.requested_buffer_size = 2 * (1024 * 1024);
diag_register.unique_id = 0x7075901;
_ctl_diag_register_2(ioc, &diag_register);
}
if (bits_to_register & 4) {
pr_info(MPT3SAS_FMT "registering extended buffer support\n",
ioc->name);
diag_register.buffer_type = MPI2_DIAG_BUF_TYPE_EXTENDED;
/* register for 2MB buffers */
diag_register.requested_buffer_size = 2 * (1024 * 1024);
diag_register.unique_id = 0x7075901;
_ctl_diag_register_2(ioc, &diag_register);
}
}
/**
* _ctl_diag_register - application register with driver
* @ioc: per adapter object
* @arg - user space buffer containing ioctl content
*
* This will allow the driver to setup any required buffers that will be
* needed by firmware to communicate with the driver.
*/
static long
_ctl_diag_register(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_diag_register karg;
long rc;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
rc = _ctl_diag_register_2(ioc, &karg);
return rc;
}
/**
* _ctl_diag_unregister - application unregister with driver
* @ioc: per adapter object
* @arg - user space buffer containing ioctl content
*
* This will allow the driver to cleanup any memory allocated for diag
* messages and to free up any resources.
*/
static long
_ctl_diag_unregister(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_diag_unregister karg;
void *request_data;
dma_addr_t request_data_dma;
u32 request_data_sz;
u8 buffer_type;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
__func__));
buffer_type = karg.unique_id & 0x000000ff;
if (!_ctl_diag_capability(ioc, buffer_type)) {
pr_err(MPT3SAS_FMT
"%s: doesn't have capability for buffer_type(0x%02x)\n",
ioc->name, __func__, buffer_type);
return -EPERM;
}
if ((ioc->diag_buffer_status[buffer_type] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0) {
pr_err(MPT3SAS_FMT
"%s: buffer_type(0x%02x) is not registered\n",
ioc->name, __func__, buffer_type);
return -EINVAL;
}
if ((ioc->diag_buffer_status[buffer_type] &
MPT3_DIAG_BUFFER_IS_RELEASED) == 0) {
pr_err(MPT3SAS_FMT
"%s: buffer_type(0x%02x) has not been released\n",
ioc->name, __func__, buffer_type);
return -EINVAL;
}
if (karg.unique_id != ioc->unique_id[buffer_type]) {
pr_err(MPT3SAS_FMT
"%s: unique_id(0x%08x) is not registered\n",
ioc->name, __func__, karg.unique_id);
return -EINVAL;
}
request_data = ioc->diag_buffer[buffer_type];
if (!request_data) {
pr_err(MPT3SAS_FMT
"%s: doesn't have memory allocated for buffer_type(0x%02x)\n",
ioc->name, __func__, buffer_type);
return -ENOMEM;
}
request_data_sz = ioc->diag_buffer_sz[buffer_type];
request_data_dma = ioc->diag_buffer_dma[buffer_type];
pci_free_consistent(ioc->pdev, request_data_sz,
request_data, request_data_dma);
ioc->diag_buffer[buffer_type] = NULL;
ioc->diag_buffer_status[buffer_type] = 0;
return 0;
}
/**
* _ctl_diag_query - query relevant info associated with diag buffers
* @ioc: per adapter object
* @arg - user space buffer containing ioctl content
*
* The application will send only buffer_type and unique_id. Driver will
* inspect unique_id first, if valid, fill in all the info. If unique_id is
* 0x00, the driver will return info specified by Buffer Type.
*/
static long
_ctl_diag_query(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_diag_query karg;
void *request_data;
int i;
u8 buffer_type;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
__func__));
karg.application_flags = 0;
buffer_type = karg.buffer_type;
if (!_ctl_diag_capability(ioc, buffer_type)) {
pr_err(MPT3SAS_FMT
"%s: doesn't have capability for buffer_type(0x%02x)\n",
ioc->name, __func__, buffer_type);
return -EPERM;
}
if ((ioc->diag_buffer_status[buffer_type] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0) {
pr_err(MPT3SAS_FMT
"%s: buffer_type(0x%02x) is not registered\n",
ioc->name, __func__, buffer_type);
return -EINVAL;
}
if (karg.unique_id & 0xffffff00) {
if (karg.unique_id != ioc->unique_id[buffer_type]) {
pr_err(MPT3SAS_FMT
"%s: unique_id(0x%08x) is not registered\n",
ioc->name, __func__, karg.unique_id);
return -EINVAL;
}
}
request_data = ioc->diag_buffer[buffer_type];
if (!request_data) {
pr_err(MPT3SAS_FMT
"%s: doesn't have buffer for buffer_type(0x%02x)\n",
ioc->name, __func__, buffer_type);
return -ENOMEM;
}
if (ioc->diag_buffer_status[buffer_type] & MPT3_DIAG_BUFFER_IS_RELEASED)
karg.application_flags = (MPT3_APP_FLAGS_APP_OWNED |
MPT3_APP_FLAGS_BUFFER_VALID);
else
karg.application_flags = (MPT3_APP_FLAGS_APP_OWNED |
MPT3_APP_FLAGS_BUFFER_VALID |
MPT3_APP_FLAGS_FW_BUFFER_ACCESS);
for (i = 0; i < MPT3_PRODUCT_SPECIFIC_DWORDS; i++)
karg.product_specific[i] =
ioc->product_specific[buffer_type][i];
karg.total_buffer_size = ioc->diag_buffer_sz[buffer_type];
karg.driver_added_buffer_size = 0;
karg.unique_id = ioc->unique_id[buffer_type];
karg.diagnostic_flags = ioc->diagnostic_flags[buffer_type];
if (copy_to_user(arg, &karg, sizeof(struct mpt3_diag_query))) {
pr_err(MPT3SAS_FMT
"%s: unable to write mpt3_diag_query data @ %p\n",
ioc->name, __func__, arg);
return -EFAULT;
}
return 0;
}
/**
* mpt3sas_send_diag_release - Diag Release Message
* @ioc: per adapter object
* @buffer_type - specifies either TRACE, SNAPSHOT, or EXTENDED
* @issue_reset - specifies whether host reset is required.
*
*/
int
mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
u8 *issue_reset)
{
Mpi2DiagReleaseRequest_t *mpi_request;
Mpi2DiagReleaseReply_t *mpi_reply;
u16 smid;
u16 ioc_status;
u32 ioc_state;
int rc;
unsigned long timeleft;
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
__func__));
rc = 0;
*issue_reset = 0;
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
if (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
if (ioc->diag_buffer_status[buffer_type] &
MPT3_DIAG_BUFFER_IS_REGISTERED)
ioc->diag_buffer_status[buffer_type] |=
MPT3_DIAG_BUFFER_IS_RELEASED;
dctlprintk(ioc, pr_info(MPT3SAS_FMT
"%s: skipping due to FAULT state\n", ioc->name,
__func__));
rc = -EAGAIN;
goto out;
}
if (ioc->ctl_cmds.status != MPT3_CMD_NOT_USED) {
pr_err(MPT3SAS_FMT "%s: ctl_cmd in use\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
smid = mpt3sas_base_get_smid(ioc, ioc->ctl_cb_idx);
if (!smid) {
pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
ioc->ctl_cmds.status = MPT3_CMD_PENDING;
memset(ioc->ctl_cmds.reply, 0, ioc->reply_sz);
mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
ioc->ctl_cmds.smid = smid;
mpi_request->Function = MPI2_FUNCTION_DIAG_RELEASE;
mpi_request->BufferType = buffer_type;
mpi_request->VF_ID = 0; /* TODO */
mpi_request->VP_ID = 0;
init_completion(&ioc->ctl_cmds.done);
mpt3sas_base_put_smid_default(ioc, smid);
timeleft = wait_for_completion_timeout(&ioc->ctl_cmds.done,
MPT3_IOCTL_DEFAULT_TIMEOUT*HZ);
if (!(ioc->ctl_cmds.status & MPT3_CMD_COMPLETE)) {
pr_err(MPT3SAS_FMT "%s: timeout\n", ioc->name,
__func__);
_debug_dump_mf(mpi_request,
sizeof(Mpi2DiagReleaseRequest_t)/4);
if (!(ioc->ctl_cmds.status & MPT3_CMD_RESET))
*issue_reset = 1;
rc = -EFAULT;
goto out;
}
/* process the completed Reply Message Frame */
if ((ioc->ctl_cmds.status & MPT3_CMD_REPLY_VALID) == 0) {
pr_err(MPT3SAS_FMT "%s: no reply message\n",
ioc->name, __func__);
rc = -EFAULT;
goto out;
}
mpi_reply = ioc->ctl_cmds.reply;
ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
ioc->diag_buffer_status[buffer_type] |=
MPT3_DIAG_BUFFER_IS_RELEASED;
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s: success\n",
ioc->name, __func__));
} else {
pr_info(MPT3SAS_FMT
"%s: ioc_status(0x%04x) log_info(0x%08x)\n",
ioc->name, __func__,
ioc_status, le32_to_cpu(mpi_reply->IOCLogInfo));
rc = -EFAULT;
}
out:
ioc->ctl_cmds.status = MPT3_CMD_NOT_USED;
return rc;
}
/**
* _ctl_diag_release - request to send Diag Release Message to firmware
* @arg - user space buffer containing ioctl content
*
* This allows ownership of the specified buffer to returned to the driver,
* allowing an application to read the buffer without fear that firmware is
* overwritting information in the buffer.
*/
static long
_ctl_diag_release(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_diag_release karg;
void *request_data;
int rc;
u8 buffer_type;
u8 issue_reset = 0;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
__func__));
buffer_type = karg.unique_id & 0x000000ff;
if (!_ctl_diag_capability(ioc, buffer_type)) {
pr_err(MPT3SAS_FMT
"%s: doesn't have capability for buffer_type(0x%02x)\n",
ioc->name, __func__, buffer_type);
return -EPERM;
}
if ((ioc->diag_buffer_status[buffer_type] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0) {
pr_err(MPT3SAS_FMT
"%s: buffer_type(0x%02x) is not registered\n",
ioc->name, __func__, buffer_type);
return -EINVAL;
}
if (karg.unique_id != ioc->unique_id[buffer_type]) {
pr_err(MPT3SAS_FMT
"%s: unique_id(0x%08x) is not registered\n",
ioc->name, __func__, karg.unique_id);
return -EINVAL;
}
if (ioc->diag_buffer_status[buffer_type] &
MPT3_DIAG_BUFFER_IS_RELEASED) {
pr_err(MPT3SAS_FMT
"%s: buffer_type(0x%02x) is already released\n",
ioc->name, __func__,
buffer_type);
return 0;
}
request_data = ioc->diag_buffer[buffer_type];
if (!request_data) {
pr_err(MPT3SAS_FMT
"%s: doesn't have memory allocated for buffer_type(0x%02x)\n",
ioc->name, __func__, buffer_type);
return -ENOMEM;
}
/* buffers were released by due to host reset */
if ((ioc->diag_buffer_status[buffer_type] &
MPT3_DIAG_BUFFER_IS_DIAG_RESET)) {
ioc->diag_buffer_status[buffer_type] |=
MPT3_DIAG_BUFFER_IS_RELEASED;
ioc->diag_buffer_status[buffer_type] &=
~MPT3_DIAG_BUFFER_IS_DIAG_RESET;
pr_err(MPT3SAS_FMT
"%s: buffer_type(0x%02x) was released due to host reset\n",
ioc->name, __func__, buffer_type);
return 0;
}
rc = mpt3sas_send_diag_release(ioc, buffer_type, &issue_reset);
if (issue_reset)
mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
FORCE_BIG_HAMMER);
return rc;
}
/**
* _ctl_diag_read_buffer - request for copy of the diag buffer
* @ioc: per adapter object
* @arg - user space buffer containing ioctl content
*/
static long
_ctl_diag_read_buffer(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
{
struct mpt3_diag_read_buffer karg;
struct mpt3_diag_read_buffer __user *uarg = arg;
void *request_data, *diag_data;
Mpi2DiagBufferPostRequest_t *mpi_request;
Mpi2DiagBufferPostReply_t *mpi_reply;
int rc, i;
u8 buffer_type;
unsigned long timeleft, request_size, copy_size;
u16 smid;
u16 ioc_status;
u8 issue_reset = 0;
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
__func__));
buffer_type = karg.unique_id & 0x000000ff;
if (!_ctl_diag_capability(ioc, buffer_type)) {
pr_err(MPT3SAS_FMT
"%s: doesn't have capability for buffer_type(0x%02x)\n",
ioc->name, __func__, buffer_type);
return -EPERM;
}
if (karg.unique_id != ioc->unique_id[buffer_type]) {
pr_err(MPT3SAS_FMT
"%s: unique_id(0x%08x) is not registered\n",
ioc->name, __func__, karg.unique_id);
return -EINVAL;
}
request_data = ioc->diag_buffer[buffer_type];
if (!request_data) {
pr_err(MPT3SAS_FMT
"%s: doesn't have buffer for buffer_type(0x%02x)\n",
ioc->name, __func__, buffer_type);
return -ENOMEM;
}
request_size = ioc->diag_buffer_sz[buffer_type];
if ((karg.starting_offset % 4) || (karg.bytes_to_read % 4)) {
pr_err(MPT3SAS_FMT "%s: either the starting_offset " \
"or bytes_to_read are not 4 byte aligned\n", ioc->name,
__func__);
return -EINVAL;
}
if (karg.starting_offset > request_size)
return -EINVAL;
diag_data = (void *)(request_data + karg.starting_offset);
dctlprintk(ioc, pr_info(MPT3SAS_FMT
"%s: diag_buffer(%p), offset(%d), sz(%d)\n",
ioc->name, __func__,
diag_data, karg.starting_offset, karg.bytes_to_read));
/* Truncate data on requests that are too large */
if ((diag_data + karg.bytes_to_read < diag_data) ||
(diag_data + karg.bytes_to_read > request_data + request_size))
copy_size = request_size - karg.starting_offset;
else
copy_size = karg.bytes_to_read;
if (copy_to_user((void __user *)uarg->diagnostic_data,
diag_data, copy_size)) {
pr_err(MPT3SAS_FMT
"%s: Unable to write mpt_diag_read_buffer_t data @ %p\n",
ioc->name, __func__, diag_data);
return -EFAULT;
}
if ((karg.flags & MPT3_FLAGS_REREGISTER) == 0)
return 0;
dctlprintk(ioc, pr_info(MPT3SAS_FMT
"%s: Reregister buffer_type(0x%02x)\n",
ioc->name, __func__, buffer_type));
if ((ioc->diag_buffer_status[buffer_type] &
MPT3_DIAG_BUFFER_IS_RELEASED) == 0) {
dctlprintk(ioc, pr_info(MPT3SAS_FMT
"%s: buffer_type(0x%02x) is still registered\n",
ioc->name, __func__, buffer_type));
return 0;
}
/* Get a free request frame and save the message context.
*/
if (ioc->ctl_cmds.status != MPT3_CMD_NOT_USED) {
pr_err(MPT3SAS_FMT "%s: ctl_cmd in use\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
smid = mpt3sas_base_get_smid(ioc, ioc->ctl_cb_idx);
if (!smid) {
pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
rc = 0;
ioc->ctl_cmds.status = MPT3_CMD_PENDING;
memset(ioc->ctl_cmds.reply, 0, ioc->reply_sz);
mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
ioc->ctl_cmds.smid = smid;
mpi_request->Function = MPI2_FUNCTION_DIAG_BUFFER_POST;
mpi_request->BufferType = buffer_type;
mpi_request->BufferLength =
cpu_to_le32(ioc->diag_buffer_sz[buffer_type]);
mpi_request->BufferAddress =
cpu_to_le64(ioc->diag_buffer_dma[buffer_type]);
for (i = 0; i < MPT3_PRODUCT_SPECIFIC_DWORDS; i++)
mpi_request->ProductSpecific[i] =
cpu_to_le32(ioc->product_specific[buffer_type][i]);
mpi_request->VF_ID = 0; /* TODO */
mpi_request->VP_ID = 0;
init_completion(&ioc->ctl_cmds.done);
mpt3sas_base_put_smid_default(ioc, smid);
timeleft = wait_for_completion_timeout(&ioc->ctl_cmds.done,
MPT3_IOCTL_DEFAULT_TIMEOUT*HZ);
if (!(ioc->ctl_cmds.status & MPT3_CMD_COMPLETE)) {
pr_err(MPT3SAS_FMT "%s: timeout\n", ioc->name,
__func__);
_debug_dump_mf(mpi_request,
sizeof(Mpi2DiagBufferPostRequest_t)/4);
if (!(ioc->ctl_cmds.status & MPT3_CMD_RESET))
issue_reset = 1;
goto issue_host_reset;
}
/* process the completed Reply Message Frame */
if ((ioc->ctl_cmds.status & MPT3_CMD_REPLY_VALID) == 0) {
pr_err(MPT3SAS_FMT "%s: no reply message\n",
ioc->name, __func__);
rc = -EFAULT;
goto out;
}
mpi_reply = ioc->ctl_cmds.reply;
ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
ioc->diag_buffer_status[buffer_type] |=
MPT3_DIAG_BUFFER_IS_REGISTERED;
dctlprintk(ioc, pr_info(MPT3SAS_FMT "%s: success\n",
ioc->name, __func__));
} else {
pr_info(MPT3SAS_FMT
"%s: ioc_status(0x%04x) log_info(0x%08x)\n",
ioc->name, __func__,
ioc_status, le32_to_cpu(mpi_reply->IOCLogInfo));
rc = -EFAULT;
}
issue_host_reset:
if (issue_reset)
mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
FORCE_BIG_HAMMER);
out:
ioc->ctl_cmds.status = MPT3_CMD_NOT_USED;
return rc;
}
#ifdef CONFIG_COMPAT
/**
* _ctl_compat_mpt_command - convert 32bit pointers to 64bit.
* @ioc: per adapter object
* @cmd - ioctl opcode
* @arg - (struct mpt3_ioctl_command32)
*
* MPT3COMMAND32 - Handle 32bit applications running on 64bit os.
*/
static long
_ctl_compat_mpt_command(struct MPT3SAS_ADAPTER *ioc, unsigned cmd,
void __user *arg)
{
struct mpt3_ioctl_command32 karg32;
struct mpt3_ioctl_command32 __user *uarg;
struct mpt3_ioctl_command karg;
if (_IOC_SIZE(cmd) != sizeof(struct mpt3_ioctl_command32))
return -EINVAL;
uarg = (struct mpt3_ioctl_command32 __user *) arg;
if (copy_from_user(&karg32, (char __user *)arg, sizeof(karg32))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
memset(&karg, 0, sizeof(struct mpt3_ioctl_command));
karg.hdr.ioc_number = karg32.hdr.ioc_number;
karg.hdr.port_number = karg32.hdr.port_number;
karg.hdr.max_data_size = karg32.hdr.max_data_size;
karg.timeout = karg32.timeout;
karg.max_reply_bytes = karg32.max_reply_bytes;
karg.data_in_size = karg32.data_in_size;
karg.data_out_size = karg32.data_out_size;
karg.max_sense_bytes = karg32.max_sense_bytes;
karg.data_sge_offset = karg32.data_sge_offset;
karg.reply_frame_buf_ptr = compat_ptr(karg32.reply_frame_buf_ptr);
karg.data_in_buf_ptr = compat_ptr(karg32.data_in_buf_ptr);
karg.data_out_buf_ptr = compat_ptr(karg32.data_out_buf_ptr);
karg.sense_data_ptr = compat_ptr(karg32.sense_data_ptr);
return _ctl_do_mpt_command(ioc, karg, &uarg->mf);
}
#endif
/**
* _ctl_ioctl_main - main ioctl entry point
* @file - (struct file)
* @cmd - ioctl opcode
* @arg -
* compat - handles 32 bit applications in 64bit os
*/
static long
_ctl_ioctl_main(struct file *file, unsigned int cmd, void __user *arg,
u8 compat)
{
struct MPT3SAS_ADAPTER *ioc;
struct mpt3_ioctl_header ioctl_header;
enum block_state state;
long ret = -EINVAL;
/* get IOCTL header */
if (copy_from_user(&ioctl_header, (char __user *)arg,
sizeof(struct mpt3_ioctl_header))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
return -EFAULT;
}
if (_ctl_verify_adapter(ioctl_header.ioc_number, &ioc) == -1 || !ioc)
return -ENODEV;
if (ioc->shost_recovery || ioc->pci_error_recovery ||
ioc->is_driver_loading)
return -EAGAIN;
state = (file->f_flags & O_NONBLOCK) ? NON_BLOCKING : BLOCKING;
if (state == NON_BLOCKING) {
if (!mutex_trylock(&ioc->ctl_cmds.mutex))
return -EAGAIN;
} else if (mutex_lock_interruptible(&ioc->ctl_cmds.mutex))
return -ERESTARTSYS;
switch (cmd) {
case MPT3IOCINFO:
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_ioctl_iocinfo))
ret = _ctl_getiocinfo(ioc, arg);
break;
#ifdef CONFIG_COMPAT
case MPT3COMMAND32:
#endif
case MPT3COMMAND:
{
struct mpt3_ioctl_command __user *uarg;
struct mpt3_ioctl_command karg;
#ifdef CONFIG_COMPAT
if (compat) {
ret = _ctl_compat_mpt_command(ioc, cmd, arg);
break;
}
#endif
if (copy_from_user(&karg, arg, sizeof(karg))) {
pr_err("failure at %s:%d/%s()!\n",
__FILE__, __LINE__, __func__);
ret = -EFAULT;
break;
}
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_ioctl_command)) {
uarg = arg;
ret = _ctl_do_mpt_command(ioc, karg, &uarg->mf);
}
break;
}
case MPT3EVENTQUERY:
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_ioctl_eventquery))
ret = _ctl_eventquery(ioc, arg);
break;
case MPT3EVENTENABLE:
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_ioctl_eventenable))
ret = _ctl_eventenable(ioc, arg);
break;
case MPT3EVENTREPORT:
ret = _ctl_eventreport(ioc, arg);
break;
case MPT3HARDRESET:
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_ioctl_diag_reset))
ret = _ctl_do_reset(ioc, arg);
break;
case MPT3BTDHMAPPING:
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_ioctl_btdh_mapping))
ret = _ctl_btdh_mapping(ioc, arg);
break;
case MPT3DIAGREGISTER:
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_diag_register))
ret = _ctl_diag_register(ioc, arg);
break;
case MPT3DIAGUNREGISTER:
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_diag_unregister))
ret = _ctl_diag_unregister(ioc, arg);
break;
case MPT3DIAGQUERY:
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_diag_query))
ret = _ctl_diag_query(ioc, arg);
break;
case MPT3DIAGRELEASE:
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_diag_release))
ret = _ctl_diag_release(ioc, arg);
break;
case MPT3DIAGREADBUFFER:
if (_IOC_SIZE(cmd) == sizeof(struct mpt3_diag_read_buffer))
ret = _ctl_diag_read_buffer(ioc, arg);
break;
default:
dctlprintk(ioc, pr_info(MPT3SAS_FMT
"unsupported ioctl opcode(0x%08x)\n", ioc->name, cmd));
break;
}
mutex_unlock(&ioc->ctl_cmds.mutex);
return ret;
}
/**
* _ctl_ioctl - main ioctl entry point (unlocked)
* @file - (struct file)
* @cmd - ioctl opcode
* @arg -
*/
static long
_ctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
long ret;
ret = _ctl_ioctl_main(file, cmd, (void __user *)arg, 0);
return ret;
}
#ifdef CONFIG_COMPAT
/**
* _ctl_ioctl_compat - main ioctl entry point (compat)
* @file -
* @cmd -
* @arg -
*
* This routine handles 32 bit applications in 64bit os.
*/
static long
_ctl_ioctl_compat(struct file *file, unsigned cmd, unsigned long arg)
{
long ret;
ret = _ctl_ioctl_main(file, cmd, (void __user *)arg, 1);
return ret;
}
#endif
/* scsi host attributes */
/**
* _ctl_version_fw_show - firmware version
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_version_fw_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "%02d.%02d.%02d.%02d\n",
(ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
(ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
(ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
ioc->facts.FWVersion.Word & 0x000000FF);
}
static DEVICE_ATTR(version_fw, S_IRUGO, _ctl_version_fw_show, NULL);
/**
* _ctl_version_bios_show - bios version
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_version_bios_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
u32 version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
return snprintf(buf, PAGE_SIZE, "%02d.%02d.%02d.%02d\n",
(version & 0xFF000000) >> 24,
(version & 0x00FF0000) >> 16,
(version & 0x0000FF00) >> 8,
version & 0x000000FF);
}
static DEVICE_ATTR(version_bios, S_IRUGO, _ctl_version_bios_show, NULL);
/**
* _ctl_version_mpi_show - MPI (message passing interface) version
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_version_mpi_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "%03x.%02x\n",
ioc->facts.MsgVersion, ioc->facts.HeaderVersion >> 8);
}
static DEVICE_ATTR(version_mpi, S_IRUGO, _ctl_version_mpi_show, NULL);
/**
* _ctl_version_product_show - product name
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_version_product_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, 16, "%s\n", ioc->manu_pg0.ChipName);
}
static DEVICE_ATTR(version_product, S_IRUGO, _ctl_version_product_show, NULL);
/**
* _ctl_version_nvdata_persistent_show - ndvata persistent version
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_version_nvdata_persistent_show(struct device *cdev,
struct device_attribute *attr, char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "%08xh\n",
le32_to_cpu(ioc->iounit_pg0.NvdataVersionPersistent.Word));
}
static DEVICE_ATTR(version_nvdata_persistent, S_IRUGO,
_ctl_version_nvdata_persistent_show, NULL);
/**
* _ctl_version_nvdata_default_show - nvdata default version
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_version_nvdata_default_show(struct device *cdev, struct device_attribute
*attr, char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "%08xh\n",
le32_to_cpu(ioc->iounit_pg0.NvdataVersionDefault.Word));
}
static DEVICE_ATTR(version_nvdata_default, S_IRUGO,
_ctl_version_nvdata_default_show, NULL);
/**
* _ctl_board_name_show - board name
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_board_name_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, 16, "%s\n", ioc->manu_pg0.BoardName);
}
static DEVICE_ATTR(board_name, S_IRUGO, _ctl_board_name_show, NULL);
/**
* _ctl_board_assembly_show - board assembly name
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_board_assembly_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, 16, "%s\n", ioc->manu_pg0.BoardAssembly);
}
static DEVICE_ATTR(board_assembly, S_IRUGO, _ctl_board_assembly_show, NULL);
/**
* _ctl_board_tracer_show - board tracer number
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_board_tracer_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, 16, "%s\n", ioc->manu_pg0.BoardTracerNumber);
}
static DEVICE_ATTR(board_tracer, S_IRUGO, _ctl_board_tracer_show, NULL);
/**
* _ctl_io_delay_show - io missing delay
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* This is for firmware implemention for deboucing device
* removal events.
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_io_delay_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "%02d\n", ioc->io_missing_delay);
}
static DEVICE_ATTR(io_delay, S_IRUGO, _ctl_io_delay_show, NULL);
/**
* _ctl_device_delay_show - device missing delay
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* This is for firmware implemention for deboucing device
* removal events.
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_device_delay_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "%02d\n", ioc->device_missing_delay);
}
static DEVICE_ATTR(device_delay, S_IRUGO, _ctl_device_delay_show, NULL);
/**
* _ctl_fw_queue_depth_show - global credits
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* This is firmware queue depth limit
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_fw_queue_depth_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "%02d\n", ioc->facts.RequestCredit);
}
static DEVICE_ATTR(fw_queue_depth, S_IRUGO, _ctl_fw_queue_depth_show, NULL);
/**
* _ctl_sas_address_show - sas address
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* This is the controller sas address
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_host_sas_address_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "0x%016llx\n",
(unsigned long long)ioc->sas_hba.sas_address);
}
static DEVICE_ATTR(host_sas_address, S_IRUGO,
_ctl_host_sas_address_show, NULL);
/**
* _ctl_logging_level_show - logging level
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*/
static ssize_t
_ctl_logging_level_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "%08xh\n", ioc->logging_level);
}
static ssize_t
_ctl_logging_level_store(struct device *cdev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
int val = 0;
if (sscanf(buf, "%x", &val) != 1)
return -EINVAL;
ioc->logging_level = val;
pr_info(MPT3SAS_FMT "logging_level=%08xh\n", ioc->name,
ioc->logging_level);
return strlen(buf);
}
static DEVICE_ATTR(logging_level, S_IRUGO | S_IWUSR, _ctl_logging_level_show,
_ctl_logging_level_store);
/**
* _ctl_fwfault_debug_show - show/store fwfault_debug
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* mpt3sas_fwfault_debug is command line option
* A sysfs 'read/write' shost attribute.
*/
static ssize_t
_ctl_fwfault_debug_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "%d\n", ioc->fwfault_debug);
}
static ssize_t
_ctl_fwfault_debug_store(struct device *cdev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
int val = 0;
if (sscanf(buf, "%d", &val) != 1)
return -EINVAL;
ioc->fwfault_debug = val;
pr_info(MPT3SAS_FMT "fwfault_debug=%d\n", ioc->name,
ioc->fwfault_debug);
return strlen(buf);
}
static DEVICE_ATTR(fwfault_debug, S_IRUGO | S_IWUSR,
_ctl_fwfault_debug_show, _ctl_fwfault_debug_store);
/**
* _ctl_ioc_reset_count_show - ioc reset count
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* This is firmware queue depth limit
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_ioc_reset_count_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
return snprintf(buf, PAGE_SIZE, "%d\n", ioc->ioc_reset_count);
}
static DEVICE_ATTR(ioc_reset_count, S_IRUGO, _ctl_ioc_reset_count_show, NULL);
/**
* _ctl_ioc_reply_queue_count_show - number of reply queues
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* This is number of reply queues
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_ioc_reply_queue_count_show(struct device *cdev,
struct device_attribute *attr, char *buf)
{
u8 reply_queue_count;
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
if ((ioc->facts.IOCCapabilities &
MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable)
reply_queue_count = ioc->reply_queue_count;
else
reply_queue_count = 1;
return snprintf(buf, PAGE_SIZE, "%d\n", reply_queue_count);
}
static DEVICE_ATTR(reply_queue_count, S_IRUGO, _ctl_ioc_reply_queue_count_show,
NULL);
struct DIAG_BUFFER_START {
__le32 Size;
__le32 DiagVersion;
u8 BufferType;
u8 Reserved[3];
__le32 Reserved1;
__le32 Reserved2;
__le32 Reserved3;
};
/**
* _ctl_host_trace_buffer_size_show - host buffer size (trace only)
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_host_trace_buffer_size_show(struct device *cdev,
struct device_attribute *attr, char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
u32 size = 0;
struct DIAG_BUFFER_START *request_data;
if (!ioc->diag_buffer[MPI2_DIAG_BUF_TYPE_TRACE]) {
pr_err(MPT3SAS_FMT
"%s: host_trace_buffer is not registered\n",
ioc->name, __func__);
return 0;
}
if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0) {
pr_err(MPT3SAS_FMT
"%s: host_trace_buffer is not registered\n",
ioc->name, __func__);
return 0;
}
request_data = (struct DIAG_BUFFER_START *)
ioc->diag_buffer[MPI2_DIAG_BUF_TYPE_TRACE];
if ((le32_to_cpu(request_data->DiagVersion) == 0x00000000 ||
le32_to_cpu(request_data->DiagVersion) == 0x01000000 ||
le32_to_cpu(request_data->DiagVersion) == 0x01010000) &&
le32_to_cpu(request_data->Reserved3) == 0x4742444c)
size = le32_to_cpu(request_data->Size);
ioc->ring_buffer_sz = size;
return snprintf(buf, PAGE_SIZE, "%d\n", size);
}
static DEVICE_ATTR(host_trace_buffer_size, S_IRUGO,
_ctl_host_trace_buffer_size_show, NULL);
/**
* _ctl_host_trace_buffer_show - firmware ring buffer (trace only)
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*
* You will only be able to read 4k bytes of ring buffer at a time.
* In order to read beyond 4k bytes, you will have to write out the
* offset to the same attribute, it will move the pointer.
*/
static ssize_t
_ctl_host_trace_buffer_show(struct device *cdev, struct device_attribute *attr,
char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
void *request_data;
u32 size;
if (!ioc->diag_buffer[MPI2_DIAG_BUF_TYPE_TRACE]) {
pr_err(MPT3SAS_FMT
"%s: host_trace_buffer is not registered\n",
ioc->name, __func__);
return 0;
}
if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0) {
pr_err(MPT3SAS_FMT
"%s: host_trace_buffer is not registered\n",
ioc->name, __func__);
return 0;
}
if (ioc->ring_buffer_offset > ioc->ring_buffer_sz)
return 0;
size = ioc->ring_buffer_sz - ioc->ring_buffer_offset;
size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
request_data = ioc->diag_buffer[0] + ioc->ring_buffer_offset;
memcpy(buf, request_data, size);
return size;
}
static ssize_t
_ctl_host_trace_buffer_store(struct device *cdev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
int val = 0;
if (sscanf(buf, "%d", &val) != 1)
return -EINVAL;
ioc->ring_buffer_offset = val;
return strlen(buf);
}
static DEVICE_ATTR(host_trace_buffer, S_IRUGO | S_IWUSR,
_ctl_host_trace_buffer_show, _ctl_host_trace_buffer_store);
/*****************************************/
/**
* _ctl_host_trace_buffer_enable_show - firmware ring buffer (trace only)
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*
* This is a mechnism to post/release host_trace_buffers
*/
static ssize_t
_ctl_host_trace_buffer_enable_show(struct device *cdev,
struct device_attribute *attr, char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
if ((!ioc->diag_buffer[MPI2_DIAG_BUF_TYPE_TRACE]) ||
((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0))
return snprintf(buf, PAGE_SIZE, "off\n");
else if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_RELEASED))
return snprintf(buf, PAGE_SIZE, "release\n");
else
return snprintf(buf, PAGE_SIZE, "post\n");
}
static ssize_t
_ctl_host_trace_buffer_enable_store(struct device *cdev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
char str[10] = "";
struct mpt3_diag_register diag_register;
u8 issue_reset = 0;
/* don't allow post/release occurr while recovery is active */
if (ioc->shost_recovery || ioc->remove_host ||
ioc->pci_error_recovery || ioc->is_driver_loading)
return -EBUSY;
if (sscanf(buf, "%9s", str) != 1)
return -EINVAL;
if (!strcmp(str, "post")) {
/* exit out if host buffers are already posted */
if ((ioc->diag_buffer[MPI2_DIAG_BUF_TYPE_TRACE]) &&
(ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_REGISTERED) &&
((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_RELEASED) == 0))
goto out;
memset(&diag_register, 0, sizeof(struct mpt3_diag_register));
pr_info(MPT3SAS_FMT "posting host trace buffers\n",
ioc->name);
diag_register.buffer_type = MPI2_DIAG_BUF_TYPE_TRACE;
diag_register.requested_buffer_size = (1024 * 1024);
diag_register.unique_id = 0x7075900;
ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] = 0;
_ctl_diag_register_2(ioc, &diag_register);
} else if (!strcmp(str, "release")) {
/* exit out if host buffers are already released */
if (!ioc->diag_buffer[MPI2_DIAG_BUF_TYPE_TRACE])
goto out;
if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0)
goto out;
if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_RELEASED))
goto out;
pr_info(MPT3SAS_FMT "releasing host trace buffer\n",
ioc->name);
mpt3sas_send_diag_release(ioc, MPI2_DIAG_BUF_TYPE_TRACE,
&issue_reset);
}
out:
return strlen(buf);
}
static DEVICE_ATTR(host_trace_buffer_enable, S_IRUGO | S_IWUSR,
_ctl_host_trace_buffer_enable_show,
_ctl_host_trace_buffer_enable_store);
/*********** diagnostic trigger suppport *********************************/
/**
* _ctl_diag_trigger_master_show - show the diag_trigger_master attribute
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*/
static ssize_t
_ctl_diag_trigger_master_show(struct device *cdev,
struct device_attribute *attr, char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
unsigned long flags;
ssize_t rc;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
rc = sizeof(struct SL_WH_MASTER_TRIGGER_T);
memcpy(buf, &ioc->diag_trigger_master, rc);
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return rc;
}
/**
* _ctl_diag_trigger_master_store - store the diag_trigger_master attribute
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*/
static ssize_t
_ctl_diag_trigger_master_store(struct device *cdev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
unsigned long flags;
ssize_t rc;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
rc = min(sizeof(struct SL_WH_MASTER_TRIGGER_T), count);
memset(&ioc->diag_trigger_master, 0,
sizeof(struct SL_WH_MASTER_TRIGGER_T));
memcpy(&ioc->diag_trigger_master, buf, rc);
ioc->diag_trigger_master.MasterData |=
(MASTER_TRIGGER_FW_FAULT + MASTER_TRIGGER_ADAPTER_RESET);
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return rc;
}
static DEVICE_ATTR(diag_trigger_master, S_IRUGO | S_IWUSR,
_ctl_diag_trigger_master_show, _ctl_diag_trigger_master_store);
/**
* _ctl_diag_trigger_event_show - show the diag_trigger_event attribute
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*/
static ssize_t
_ctl_diag_trigger_event_show(struct device *cdev,
struct device_attribute *attr, char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
unsigned long flags;
ssize_t rc;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
rc = sizeof(struct SL_WH_EVENT_TRIGGERS_T);
memcpy(buf, &ioc->diag_trigger_event, rc);
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return rc;
}
/**
* _ctl_diag_trigger_event_store - store the diag_trigger_event attribute
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*/
static ssize_t
_ctl_diag_trigger_event_store(struct device *cdev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
unsigned long flags;
ssize_t sz;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
sz = min(sizeof(struct SL_WH_EVENT_TRIGGERS_T), count);
memset(&ioc->diag_trigger_event, 0,
sizeof(struct SL_WH_EVENT_TRIGGERS_T));
memcpy(&ioc->diag_trigger_event, buf, sz);
if (ioc->diag_trigger_event.ValidEntries > NUM_VALID_ENTRIES)
ioc->diag_trigger_event.ValidEntries = NUM_VALID_ENTRIES;
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return sz;
}
static DEVICE_ATTR(diag_trigger_event, S_IRUGO | S_IWUSR,
_ctl_diag_trigger_event_show, _ctl_diag_trigger_event_store);
/**
* _ctl_diag_trigger_scsi_show - show the diag_trigger_scsi attribute
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*/
static ssize_t
_ctl_diag_trigger_scsi_show(struct device *cdev,
struct device_attribute *attr, char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
unsigned long flags;
ssize_t rc;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
rc = sizeof(struct SL_WH_SCSI_TRIGGERS_T);
memcpy(buf, &ioc->diag_trigger_scsi, rc);
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return rc;
}
/**
* _ctl_diag_trigger_scsi_store - store the diag_trigger_scsi attribute
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*/
static ssize_t
_ctl_diag_trigger_scsi_store(struct device *cdev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
unsigned long flags;
ssize_t sz;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
sz = min(sizeof(struct SL_WH_SCSI_TRIGGERS_T), count);
memset(&ioc->diag_trigger_scsi, 0,
sizeof(struct SL_WH_EVENT_TRIGGERS_T));
memcpy(&ioc->diag_trigger_scsi, buf, sz);
if (ioc->diag_trigger_scsi.ValidEntries > NUM_VALID_ENTRIES)
ioc->diag_trigger_scsi.ValidEntries = NUM_VALID_ENTRIES;
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return sz;
}
static DEVICE_ATTR(diag_trigger_scsi, S_IRUGO | S_IWUSR,
_ctl_diag_trigger_scsi_show, _ctl_diag_trigger_scsi_store);
/**
* _ctl_diag_trigger_scsi_show - show the diag_trigger_mpi attribute
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*/
static ssize_t
_ctl_diag_trigger_mpi_show(struct device *cdev,
struct device_attribute *attr, char *buf)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
unsigned long flags;
ssize_t rc;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
rc = sizeof(struct SL_WH_MPI_TRIGGERS_T);
memcpy(buf, &ioc->diag_trigger_mpi, rc);
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return rc;
}
/**
* _ctl_diag_trigger_mpi_store - store the diag_trigger_mpi attribute
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* A sysfs 'read/write' shost attribute.
*/
static ssize_t
_ctl_diag_trigger_mpi_store(struct device *cdev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct Scsi_Host *shost = class_to_shost(cdev);
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
unsigned long flags;
ssize_t sz;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
sz = min(sizeof(struct SL_WH_MPI_TRIGGERS_T), count);
memset(&ioc->diag_trigger_mpi, 0,
sizeof(struct SL_WH_EVENT_TRIGGERS_T));
memcpy(&ioc->diag_trigger_mpi, buf, sz);
if (ioc->diag_trigger_mpi.ValidEntries > NUM_VALID_ENTRIES)
ioc->diag_trigger_mpi.ValidEntries = NUM_VALID_ENTRIES;
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return sz;
}
static DEVICE_ATTR(diag_trigger_mpi, S_IRUGO | S_IWUSR,
_ctl_diag_trigger_mpi_show, _ctl_diag_trigger_mpi_store);
/*********** diagnostic trigger suppport *** END ****************************/
/*****************************************/
struct device_attribute *mpt3sas_host_attrs[] = {
&dev_attr_version_fw,
&dev_attr_version_bios,
&dev_attr_version_mpi,
&dev_attr_version_product,
&dev_attr_version_nvdata_persistent,
&dev_attr_version_nvdata_default,
&dev_attr_board_name,
&dev_attr_board_assembly,
&dev_attr_board_tracer,
&dev_attr_io_delay,
&dev_attr_device_delay,
&dev_attr_logging_level,
&dev_attr_fwfault_debug,
&dev_attr_fw_queue_depth,
&dev_attr_host_sas_address,
&dev_attr_ioc_reset_count,
&dev_attr_host_trace_buffer_size,
&dev_attr_host_trace_buffer,
&dev_attr_host_trace_buffer_enable,
&dev_attr_reply_queue_count,
&dev_attr_diag_trigger_master,
&dev_attr_diag_trigger_event,
&dev_attr_diag_trigger_scsi,
&dev_attr_diag_trigger_mpi,
NULL,
};
/* device attributes */
/**
* _ctl_device_sas_address_show - sas address
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* This is the sas address for the target
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_device_sas_address_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct scsi_device *sdev = to_scsi_device(dev);
struct MPT3SAS_DEVICE *sas_device_priv_data = sdev->hostdata;
return snprintf(buf, PAGE_SIZE, "0x%016llx\n",
(unsigned long long)sas_device_priv_data->sas_target->sas_address);
}
static DEVICE_ATTR(sas_address, S_IRUGO, _ctl_device_sas_address_show, NULL);
/**
* _ctl_device_handle_show - device handle
* @cdev - pointer to embedded class device
* @buf - the buffer returned
*
* This is the firmware assigned device handle
*
* A sysfs 'read-only' shost attribute.
*/
static ssize_t
_ctl_device_handle_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct scsi_device *sdev = to_scsi_device(dev);
struct MPT3SAS_DEVICE *sas_device_priv_data = sdev->hostdata;
return snprintf(buf, PAGE_SIZE, "0x%04x\n",
sas_device_priv_data->sas_target->handle);
}
static DEVICE_ATTR(sas_device_handle, S_IRUGO, _ctl_device_handle_show, NULL);
struct device_attribute *mpt3sas_dev_attrs[] = {
&dev_attr_sas_address,
&dev_attr_sas_device_handle,
NULL,
};
static const struct file_operations ctl_fops = {
.owner = THIS_MODULE,
.unlocked_ioctl = _ctl_ioctl,
.release = _ctl_release,
.poll = _ctl_poll,
.fasync = _ctl_fasync,
#ifdef CONFIG_COMPAT
.compat_ioctl = _ctl_ioctl_compat,
#endif
};
static struct miscdevice ctl_dev = {
.minor = MPT3SAS_MINOR,
.name = MPT3SAS_DEV_NAME,
.fops = &ctl_fops,
};
/**
* mpt3sas_ctl_init - main entry point for ctl.
*
*/
void
mpt3sas_ctl_init(void)
{
async_queue = NULL;
if (misc_register(&ctl_dev) < 0)
pr_err("%s can't register misc device [minor=%d]\n",
MPT3SAS_DRIVER_NAME, MPT3SAS_MINOR);
init_waitqueue_head(&ctl_poll_wait);
}
/**
* mpt3sas_ctl_exit - exit point for ctl
*
*/
void
mpt3sas_ctl_exit(void)
{
struct MPT3SAS_ADAPTER *ioc;
int i;
list_for_each_entry(ioc, &mpt3sas_ioc_list, list) {
/* free memory associated to diag buffers */
for (i = 0; i < MPI2_DIAG_BUF_TYPE_COUNT; i++) {
if (!ioc->diag_buffer[i])
continue;
if (!(ioc->diag_buffer_status[i] &
MPT3_DIAG_BUFFER_IS_REGISTERED))
continue;
if ((ioc->diag_buffer_status[i] &
MPT3_DIAG_BUFFER_IS_RELEASED))
continue;
pci_free_consistent(ioc->pdev, ioc->diag_buffer_sz[i],
ioc->diag_buffer[i], ioc->diag_buffer_dma[i]);
ioc->diag_buffer[i] = NULL;
ioc->diag_buffer_status[i] = 0;
}
kfree(ioc->event_log);
}
misc_deregister(&ctl_dev);
}
drivers/scsi/mpt3sas/mpt3sas_ctl.h 0 → 100644
View file @ f92363d1
/*
* Management Module Support for MPT (Message Passing Technology) based
* controllers
*
* This code is based on drivers/scsi/mpt3sas/mpt3sas_ctl.h
* Copyright (C) 2012 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* NO WARRANTY
* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
* solely responsible for determining the appropriateness of using and
* distributing the Program and assumes all risks associated with its
* exercise of rights under this Agreement, including but not limited to
* the risks and costs of program errors, damage to or loss of data,
* programs or equipment, and unavailability or interruption of operations.
* DISCLAIMER OF LIABILITY
* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
* USA.
*/
#ifndef MPT3SAS_CTL_H_INCLUDED
#define MPT3SAS_CTL_H_INCLUDED
#ifdef __KERNEL__
#include <linux/miscdevice.h>
#endif
#ifndef MPT3SAS_MINOR
#define MPT3SAS_MINOR (MPT_MINOR + 2)
#endif
#define MPT3SAS_DEV_NAME "mpt3ctl"
#define MPT3_MAGIC_NUMBER 'L'
#define MPT3_IOCTL_DEFAULT_TIMEOUT (10) /* in seconds */
/**
* IOCTL opcodes
*/
#define MPT3IOCINFO _IOWR(MPT3_MAGIC_NUMBER, 17, \
struct mpt3_ioctl_iocinfo)
#define MPT3COMMAND _IOWR(MPT3_MAGIC_NUMBER, 20, \
struct mpt3_ioctl_command)
#ifdef CONFIG_COMPAT
#define MPT3COMMAND32 _IOWR(MPT3_MAGIC_NUMBER, 20, \
struct mpt3_ioctl_command32)
#endif
#define MPT3EVENTQUERY _IOWR(MPT3_MAGIC_NUMBER, 21, \
struct mpt3_ioctl_eventquery)
#define MPT3EVENTENABLE _IOWR(MPT3_MAGIC_NUMBER, 22, \
struct mpt3_ioctl_eventenable)
#define MPT3EVENTREPORT _IOWR(MPT3_MAGIC_NUMBER, 23, \
struct mpt3_ioctl_eventreport)
#define MPT3HARDRESET _IOWR(MPT3_MAGIC_NUMBER, 24, \
struct mpt3_ioctl_diag_reset)
#define MPT3BTDHMAPPING _IOWR(MPT3_MAGIC_NUMBER, 31, \
struct mpt3_ioctl_btdh_mapping)
/* diag buffer support */
#define MPT3DIAGREGISTER _IOWR(MPT3_MAGIC_NUMBER, 26, \
struct mpt3_diag_register)
#define MPT3DIAGRELEASE _IOWR(MPT3_MAGIC_NUMBER, 27, \
struct mpt3_diag_release)
#define MPT3DIAGUNREGISTER _IOWR(MPT3_MAGIC_NUMBER, 28, \
struct mpt3_diag_unregister)
#define MPT3DIAGQUERY _IOWR(MPT3_MAGIC_NUMBER, 29, \
struct mpt3_diag_query)
#define MPT3DIAGREADBUFFER _IOWR(MPT3_MAGIC_NUMBER, 30, \
struct mpt3_diag_read_buffer)
/**
* struct mpt3_ioctl_header - main header structure
* @ioc_number - IOC unit number
* @port_number - IOC port number
* @max_data_size - maximum number bytes to transfer on read
*/
struct mpt3_ioctl_header {
uint32_t ioc_number;
uint32_t port_number;
uint32_t max_data_size;
};
/**
* struct mpt3_ioctl_diag_reset - diagnostic reset
* @hdr - generic header
*/
struct mpt3_ioctl_diag_reset {
struct mpt3_ioctl_header hdr;
};
/**
* struct mpt3_ioctl_pci_info - pci device info
* @device - pci device id
* @function - pci function id
* @bus - pci bus id
* @segment_id - pci segment id
*/
struct mpt3_ioctl_pci_info {
union {
struct {
uint32_t device:5;
uint32_t function:3;
uint32_t bus:24;
} bits;
uint32_t word;
} u;
uint32_t segment_id;
};
#define MPT2_IOCTL_INTERFACE_SCSI (0x00)
#define MPT2_IOCTL_INTERFACE_FC (0x01)
#define MPT2_IOCTL_INTERFACE_FC_IP (0x02)
#define MPT2_IOCTL_INTERFACE_SAS (0x03)
#define MPT2_IOCTL_INTERFACE_SAS2 (0x04)
#define MPT3_IOCTL_INTERFACE_SAS3 (0x06)
#define MPT2_IOCTL_VERSION_LENGTH (32)
/**
* struct mpt3_ioctl_iocinfo - generic controller info
* @hdr - generic header
* @adapter_type - type of adapter (spi, fc, sas)
* @port_number - port number
* @pci_id - PCI Id
* @hw_rev - hardware revision
* @sub_system_device - PCI subsystem Device ID
* @sub_system_vendor - PCI subsystem Vendor ID
* @rsvd0 - reserved
* @firmware_version - firmware version
* @bios_version - BIOS version
* @driver_version - driver version - 32 ASCII characters
* @rsvd1 - reserved
* @scsi_id - scsi id of adapter 0
* @rsvd2 - reserved
* @pci_information - pci info (2nd revision)
*/
struct mpt3_ioctl_iocinfo {
struct mpt3_ioctl_header hdr;
uint32_t adapter_type;
uint32_t port_number;
uint32_t pci_id;
uint32_t hw_rev;
uint32_t subsystem_device;
uint32_t subsystem_vendor;
uint32_t rsvd0;
uint32_t firmware_version;
uint32_t bios_version;
uint8_t driver_version[MPT2_IOCTL_VERSION_LENGTH];
uint8_t rsvd1;
uint8_t scsi_id;
uint16_t rsvd2;
struct mpt3_ioctl_pci_info pci_information;
};
/* number of event log entries */
#define MPT3SAS_CTL_EVENT_LOG_SIZE (50)
/**
* struct mpt3_ioctl_eventquery - query event count and type
* @hdr - generic header
* @event_entries - number of events returned by get_event_report
* @rsvd - reserved
* @event_types - type of events currently being captured
*/
struct mpt3_ioctl_eventquery {
struct mpt3_ioctl_header hdr;
uint16_t event_entries;
uint16_t rsvd;
uint32_t event_types[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
};
/**
* struct mpt3_ioctl_eventenable - enable/disable event capturing
* @hdr - generic header
* @event_types - toggle off/on type of events to be captured
*/
struct mpt3_ioctl_eventenable {
struct mpt3_ioctl_header hdr;
uint32_t event_types[4];
};
#define MPT3_EVENT_DATA_SIZE (192)
/**
* struct MPT3_IOCTL_EVENTS -
* @event - the event that was reported
* @context - unique value for each event assigned by driver
* @data - event data returned in fw reply message
*/
struct MPT3_IOCTL_EVENTS {
uint32_t event;
uint32_t context;
uint8_t data[MPT3_EVENT_DATA_SIZE];
};
/**
* struct mpt3_ioctl_eventreport - returing event log
* @hdr - generic header
* @event_data - (see struct MPT3_IOCTL_EVENTS)
*/
struct mpt3_ioctl_eventreport {
struct mpt3_ioctl_header hdr;
struct MPT3_IOCTL_EVENTS event_data[1];
};
/**
* struct mpt3_ioctl_command - generic mpt firmware passthru ioctl
* @hdr - generic header
* @timeout - command timeout in seconds. (if zero then use driver default
* value).
* @reply_frame_buf_ptr - reply location
* @data_in_buf_ptr - destination for read
* @data_out_buf_ptr - data source for write
* @sense_data_ptr - sense data location
* @max_reply_bytes - maximum number of reply bytes to be sent to app.
* @data_in_size - number bytes for data transfer in (read)
* @data_out_size - number bytes for data transfer out (write)
* @max_sense_bytes - maximum number of bytes for auto sense buffers
* @data_sge_offset - offset in words from the start of the request message to
* the first SGL
* @mf[1];
*/
struct mpt3_ioctl_command {
struct mpt3_ioctl_header hdr;
uint32_t timeout;
void __user *reply_frame_buf_ptr;
void __user *data_in_buf_ptr;
void __user *data_out_buf_ptr;
void __user *sense_data_ptr;
uint32_t max_reply_bytes;
uint32_t data_in_size;
uint32_t data_out_size;
uint32_t max_sense_bytes;
uint32_t data_sge_offset;
uint8_t mf[1];
};
#ifdef CONFIG_COMPAT
struct mpt3_ioctl_command32 {
struct mpt3_ioctl_header hdr;
uint32_t timeout;
uint32_t reply_frame_buf_ptr;
uint32_t data_in_buf_ptr;
uint32_t data_out_buf_ptr;
uint32_t sense_data_ptr;
uint32_t max_reply_bytes;
uint32_t data_in_size;
uint32_t data_out_size;
uint32_t max_sense_bytes;
uint32_t data_sge_offset;
uint8_t mf[1];
};
#endif
/**
* struct mpt3_ioctl_btdh_mapping - mapping info
* @hdr - generic header
* @id - target device identification number
* @bus - SCSI bus number that the target device exists on
* @handle - device handle for the target device
* @rsvd - reserved
*
* To obtain a bus/id the application sets
* handle to valid handle, and bus/id to 0xFFFF.
*
* To obtain the device handle the application sets
* bus/id valid value, and the handle to 0xFFFF.
*/
struct mpt3_ioctl_btdh_mapping {
struct mpt3_ioctl_header hdr;
uint32_t id;
uint32_t bus;
uint16_t handle;
uint16_t rsvd;
};
/* application flags for mpt3_diag_register, mpt3_diag_query */
#define MPT3_APP_FLAGS_APP_OWNED (0x0001)
#define MPT3_APP_FLAGS_BUFFER_VALID (0x0002)
#define MPT3_APP_FLAGS_FW_BUFFER_ACCESS (0x0004)
/* flags for mpt3_diag_read_buffer */
#define MPT3_FLAGS_REREGISTER (0x0001)
#define MPT3_PRODUCT_SPECIFIC_DWORDS 23
/**
* struct mpt3_diag_register - application register with driver
* @hdr - generic header
* @reserved -
* @buffer_type - specifies either TRACE, SNAPSHOT, or EXTENDED
* @application_flags - misc flags
* @diagnostic_flags - specifies flags affecting command processing
* @product_specific - product specific information
* @requested_buffer_size - buffers size in bytes
* @unique_id - tag specified by application that is used to signal ownership
* of the buffer.
*
* This will allow the driver to setup any required buffers that will be
* needed by firmware to communicate with the driver.
*/
struct mpt3_diag_register {
struct mpt3_ioctl_header hdr;
uint8_t reserved;
uint8_t buffer_type;
uint16_t application_flags;
uint32_t diagnostic_flags;
uint32_t product_specific[MPT3_PRODUCT_SPECIFIC_DWORDS];
uint32_t requested_buffer_size;
uint32_t unique_id;
};
/**
* struct mpt3_diag_unregister - application unregister with driver
* @hdr - generic header
* @unique_id - tag uniquely identifies the buffer to be unregistered
*
* This will allow the driver to cleanup any memory allocated for diag
* messages and to free up any resources.
*/
struct mpt3_diag_unregister {
struct mpt3_ioctl_header hdr;
uint32_t unique_id;
};
/**
* struct mpt3_diag_query - query relevant info associated with diag buffers
* @hdr - generic header
* @reserved -
* @buffer_type - specifies either TRACE, SNAPSHOT, or EXTENDED
* @application_flags - misc flags
* @diagnostic_flags - specifies flags affecting command processing
* @product_specific - product specific information
* @total_buffer_size - diag buffer size in bytes
* @driver_added_buffer_size - size of extra space appended to end of buffer
* @unique_id - unique id associated with this buffer.
*
* The application will send only buffer_type and unique_id. Driver will
* inspect unique_id first, if valid, fill in all the info. If unique_id is
* 0x00, the driver will return info specified by Buffer Type.
*/
struct mpt3_diag_query {
struct mpt3_ioctl_header hdr;
uint8_t reserved;
uint8_t buffer_type;
uint16_t application_flags;
uint32_t diagnostic_flags;
uint32_t product_specific[MPT3_PRODUCT_SPECIFIC_DWORDS];
uint32_t total_buffer_size;
uint32_t driver_added_buffer_size;
uint32_t unique_id;
};
/**
* struct mpt3_diag_release - request to send Diag Release Message to firmware
* @hdr - generic header
* @unique_id - tag uniquely identifies the buffer to be released
*
* This allows ownership of the specified buffer to returned to the driver,
* allowing an application to read the buffer without fear that firmware is
* overwritting information in the buffer.
*/
struct mpt3_diag_release {
struct mpt3_ioctl_header hdr;
uint32_t unique_id;
};
/**
* struct mpt3_diag_read_buffer - request for copy of the diag buffer
* @hdr - generic header
* @status -
* @reserved -
* @flags - misc flags
* @starting_offset - starting offset within drivers buffer where to start
* reading data at into the specified application buffer
* @bytes_to_read - number of bytes to copy from the drivers buffer into the
* application buffer starting at starting_offset.
* @unique_id - unique id associated with this buffer.
* @diagnostic_data - data payload
*/
struct mpt3_diag_read_buffer {
struct mpt3_ioctl_header hdr;
uint8_t status;
uint8_t reserved;
uint16_t flags;
uint32_t starting_offset;
uint32_t bytes_to_read;
uint32_t unique_id;
uint32_t diagnostic_data[1];
};
#endif /* MPT3SAS_CTL_H_INCLUDED */
drivers/scsi/mpt3sas/mpt3sas_debug.h 0 → 100644
View file @ f92363d1
/*
* Logging Support for MPT (Message Passing Technology) based controllers
*
* This code is based on drivers/scsi/mpt3sas/mpt3sas_debug.c
* Copyright (C) 2012 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* NO WARRANTY
* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
* solely responsible for determining the appropriateness of using and
* distributing the Program and assumes all risks associated with its
* exercise of rights under this Agreement, including but not limited to
* the risks and costs of program errors, damage to or loss of data,
* programs or equipment, and unavailability or interruption of operations.
* DISCLAIMER OF LIABILITY
* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
* USA.
*/
#ifndef MPT3SAS_DEBUG_H_INCLUDED
#define MPT3SAS_DEBUG_H_INCLUDED
#define MPT_DEBUG 0x00000001
#define MPT_DEBUG_MSG_FRAME 0x00000002
#define MPT_DEBUG_SG 0x00000004
#define MPT_DEBUG_EVENTS 0x00000008
#define MPT_DEBUG_EVENT_WORK_TASK 0x00000010
#define MPT_DEBUG_INIT 0x00000020
#define MPT_DEBUG_EXIT 0x00000040
#define MPT_DEBUG_FAIL 0x00000080
#define MPT_DEBUG_TM 0x00000100
#define MPT_DEBUG_REPLY 0x00000200
#define MPT_DEBUG_HANDSHAKE 0x00000400
#define MPT_DEBUG_CONFIG 0x00000800
#define MPT_DEBUG_DL 0x00001000
#define MPT_DEBUG_RESET 0x00002000
#define MPT_DEBUG_SCSI 0x00004000
#define MPT_DEBUG_IOCTL 0x00008000
#define MPT_DEBUG_SAS 0x00020000
#define MPT_DEBUG_TRANSPORT 0x00040000
#define MPT_DEBUG_TASK_SET_FULL 0x00080000
#define MPT_DEBUG_TRIGGER_DIAG 0x00200000
/*
* CONFIG_SCSI_MPT3SAS_LOGGING - enabled in Kconfig
*/
#ifdef CONFIG_SCSI_MPT3SAS_LOGGING
#define MPT_CHECK_LOGGING(IOC, CMD, BITS) \
{ \
if (IOC->logging_level & BITS) \
CMD; \
}
#else
#define MPT_CHECK_LOGGING(IOC, CMD, BITS)
#endif /* CONFIG_SCSI_MPT3SAS_LOGGING */
/*
* debug macros
*/
#define dprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG)
#define dsgprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SG)
#define devtprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EVENTS)
#define dewtprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EVENT_WORK_TASK)
#define dinitprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_INIT)
#define dexitprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EXIT)
#define dfailprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_FAIL)
#define dtmprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_TM)
#define dreplyprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_REPLY)
#define dhsprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_HANDSHAKE)
#define dcprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_CONFIG)
#define ddlprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_DL)
#define drsprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_RESET)
#define dsprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SCSI)
#define dctlprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_IOCTL)
#define dsasprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SAS)
#define dsastransport(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SAS_WIDE)
#define dmfprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_MSG_FRAME)
#define dtsfprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_TASK_SET_FULL)
#define dtransportprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_TRANSPORT)
#define dTriggerDiagPrintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_TRIGGER_DIAG)
/* inline functions for dumping debug data*/
#ifdef CONFIG_SCSI_MPT3SAS_LOGGING
/**
* _debug_dump_mf - print message frame contents
* @mpi_request: pointer to message frame
* @sz: number of dwords
*/
static inline void
_debug_dump_mf(void *mpi_request, int sz)
{
int i;
__le32 *mfp = (__le32 *)mpi_request;
pr_info("mf:\n\t");
for (i = 0; i < sz; i++) {
if (i && ((i % 8) == 0))
pr_info("\n\t");
pr_info("%08x ", le32_to_cpu(mfp[i]));
}
pr_info("\n");
}
/**
* _debug_dump_reply - print message frame contents
* @mpi_request: pointer to message frame
* @sz: number of dwords
*/
static inline void
_debug_dump_reply(void *mpi_request, int sz)
{
int i;
__le32 *mfp = (__le32 *)mpi_request;
pr_info("reply:\n\t");
for (i = 0; i < sz; i++) {
if (i && ((i % 8) == 0))
pr_info("\n\t");
pr_info("%08x ", le32_to_cpu(mfp[i]));
}
pr_info("\n");
}
/**
* _debug_dump_config - print config page contents
* @mpi_request: pointer to message frame
* @sz: number of dwords
*/
static inline void
_debug_dump_config(void *mpi_request, int sz)
{
int i;
__le32 *mfp = (__le32 *)mpi_request;
pr_info("config:\n\t");
for (i = 0; i < sz; i++) {
if (i && ((i % 8) == 0))
pr_info("\n\t");
pr_info("%08x ", le32_to_cpu(mfp[i]));
}
pr_info("\n");
}
#else
#define _debug_dump_mf(mpi_request, sz)
#define _debug_dump_reply(mpi_request, sz)
#define _debug_dump_config(mpi_request, sz)
#endif /* CONFIG_SCSI_MPT3SAS_LOGGING */
#endif /* MPT3SAS_DEBUG_H_INCLUDED */
drivers/scsi/mpt3sas/mpt3sas_scsih.c 0 → 100644
View file @ f92363d1
This source diff could not be displayed because it is too large. You can view the blob instead.
drivers/scsi/mpt3sas/mpt3sas_transport.c 0 → 100644
View file @ f92363d1
/*
* SAS Transport Layer for MPT (Message Passing Technology) based controllers
*
* This code is based on drivers/scsi/mpt3sas/mpt3sas_transport.c
* Copyright (C) 2012 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* NO WARRANTY
* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
* solely responsible for determining the appropriateness of using and
* distributing the Program and assumes all risks associated with its
* exercise of rights under this Agreement, including but not limited to
* the risks and costs of program errors, damage to or loss of data,
* programs or equipment, and unavailability or interruption of operations.
* DISCLAIMER OF LIABILITY
* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
* USA.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/workqueue.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi_transport_sas.h>
#include <scsi/scsi_dbg.h>
#include "mpt3sas_base.h"
/**
* _transport_sas_node_find_by_sas_address - sas node search
* @ioc: per adapter object
* @sas_address: sas address of expander or sas host
* Context: Calling function should acquire ioc->sas_node_lock.
*
* Search for either hba phys or expander device based on handle, then returns
* the sas_node object.
*/
static struct _sas_node *
_transport_sas_node_find_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
u64 sas_address)
{
if (ioc->sas_hba.sas_address == sas_address)
return &ioc->sas_hba;
else
return mpt3sas_scsih_expander_find_by_sas_address(ioc,
sas_address);
}
/**
* _transport_convert_phy_link_rate -
* @link_rate: link rate returned from mpt firmware
*
* Convert link_rate from mpi fusion into sas_transport form.
*/
static enum sas_linkrate
_transport_convert_phy_link_rate(u8 link_rate)
{
enum sas_linkrate rc;
switch (link_rate) {
case MPI2_SAS_NEG_LINK_RATE_1_5:
rc = SAS_LINK_RATE_1_5_GBPS;
break;
case MPI2_SAS_NEG_LINK_RATE_3_0:
rc = SAS_LINK_RATE_3_0_GBPS;
break;
case MPI2_SAS_NEG_LINK_RATE_6_0:
rc = SAS_LINK_RATE_6_0_GBPS;
break;
case MPI25_SAS_NEG_LINK_RATE_12_0:
rc = SAS_LINK_RATE_12_0_GBPS;
break;
case MPI2_SAS_NEG_LINK_RATE_PHY_DISABLED:
rc = SAS_PHY_DISABLED;
break;
case MPI2_SAS_NEG_LINK_RATE_NEGOTIATION_FAILED:
rc = SAS_LINK_RATE_FAILED;
break;
case MPI2_SAS_NEG_LINK_RATE_PORT_SELECTOR:
rc = SAS_SATA_PORT_SELECTOR;
break;
case MPI2_SAS_NEG_LINK_RATE_SMP_RESET_IN_PROGRESS:
rc = SAS_PHY_RESET_IN_PROGRESS;
break;
default:
case MPI2_SAS_NEG_LINK_RATE_SATA_OOB_COMPLETE:
case MPI2_SAS_NEG_LINK_RATE_UNKNOWN_LINK_RATE:
rc = SAS_LINK_RATE_UNKNOWN;
break;
}
return rc;
}
/**
* _transport_set_identify - set identify for phys and end devices
* @ioc: per adapter object
* @handle: device handle
* @identify: sas identify info
*
* Populates sas identify info.
*
* Returns 0 for success, non-zero for failure.
*/
static int
_transport_set_identify(struct MPT3SAS_ADAPTER *ioc, u16 handle,
struct sas_identify *identify)
{
Mpi2SasDevicePage0_t sas_device_pg0;
Mpi2ConfigReply_t mpi_reply;
u32 device_info;
u32 ioc_status;
if (ioc->shost_recovery || ioc->pci_error_recovery) {
pr_info(MPT3SAS_FMT "%s: host reset in progress!\n",
__func__, ioc->name);
return -EFAULT;
}
if ((mpt3sas_config_get_sas_device_pg0(ioc, &mpi_reply, &sas_device_pg0,
MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, handle))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
return -ENXIO;
}
ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
MPI2_IOCSTATUS_MASK;
if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
pr_err(MPT3SAS_FMT
"handle(0x%04x), ioc_status(0x%04x)\nfailure at %s:%d/%s()!\n",
ioc->name, handle, ioc_status,
__FILE__, __LINE__, __func__);
return -EIO;
}
memset(identify, 0, sizeof(struct sas_identify));
device_info = le32_to_cpu(sas_device_pg0.DeviceInfo);
/* sas_address */
identify->sas_address = le64_to_cpu(sas_device_pg0.SASAddress);
/* phy number of the parent device this device is linked to */
identify->phy_identifier = sas_device_pg0.PhyNum;
/* device_type */
switch (device_info & MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE) {
case MPI2_SAS_DEVICE_INFO_NO_DEVICE:
identify->device_type = SAS_PHY_UNUSED;
break;
case MPI2_SAS_DEVICE_INFO_END_DEVICE:
identify->device_type = SAS_END_DEVICE;
break;
case MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER:
identify->device_type = SAS_EDGE_EXPANDER_DEVICE;
break;
case MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER:
identify->device_type = SAS_FANOUT_EXPANDER_DEVICE;
break;
}
/* initiator_port_protocols */
if (device_info & MPI2_SAS_DEVICE_INFO_SSP_INITIATOR)
identify->initiator_port_protocols |= SAS_PROTOCOL_SSP;
if (device_info & MPI2_SAS_DEVICE_INFO_STP_INITIATOR)
identify->initiator_port_protocols |= SAS_PROTOCOL_STP;
if (device_info & MPI2_SAS_DEVICE_INFO_SMP_INITIATOR)
identify->initiator_port_protocols |= SAS_PROTOCOL_SMP;
if (device_info & MPI2_SAS_DEVICE_INFO_SATA_HOST)
identify->initiator_port_protocols |= SAS_PROTOCOL_SATA;
/* target_port_protocols */
if (device_info & MPI2_SAS_DEVICE_INFO_SSP_TARGET)
identify->target_port_protocols |= SAS_PROTOCOL_SSP;
if (device_info & MPI2_SAS_DEVICE_INFO_STP_TARGET)
identify->target_port_protocols |= SAS_PROTOCOL_STP;
if (device_info & MPI2_SAS_DEVICE_INFO_SMP_TARGET)
identify->target_port_protocols |= SAS_PROTOCOL_SMP;
if (device_info & MPI2_SAS_DEVICE_INFO_SATA_DEVICE)
identify->target_port_protocols |= SAS_PROTOCOL_SATA;
return 0;
}
/**
* mpt3sas_transport_done - internal transport layer callback handler.
* @ioc: per adapter object
* @smid: system request message index
* @msix_index: MSIX table index supplied by the OS
* @reply: reply message frame(lower 32bit addr)
*
* Callback handler when sending internal generated transport cmds.
* The callback index passed is `ioc->transport_cb_idx`
*
* Return 1 meaning mf should be freed from _base_interrupt
* 0 means the mf is freed from this function.
*/
u8
mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
u32 reply)
{
MPI2DefaultReply_t *mpi_reply;
mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
if (ioc->transport_cmds.status == MPT3_CMD_NOT_USED)
return 1;
if (ioc->transport_cmds.smid != smid)
return 1;
ioc->transport_cmds.status |= MPT3_CMD_COMPLETE;
if (mpi_reply) {
memcpy(ioc->transport_cmds.reply, mpi_reply,
mpi_reply->MsgLength*4);
ioc->transport_cmds.status |= MPT3_CMD_REPLY_VALID;
}
ioc->transport_cmds.status &= ~MPT3_CMD_PENDING;
complete(&ioc->transport_cmds.done);
return 1;
}
/* report manufacture request structure */
struct rep_manu_request {
u8 smp_frame_type;
u8 function;
u8 reserved;
u8 request_length;
};
/* report manufacture reply structure */
struct rep_manu_reply {
u8 smp_frame_type; /* 0x41 */
u8 function; /* 0x01 */
u8 function_result;
u8 response_length;
u16 expander_change_count;
u8 reserved0[2];
u8 sas_format;
u8 reserved2[3];
u8 vendor_id[SAS_EXPANDER_VENDOR_ID_LEN];
u8 product_id[SAS_EXPANDER_PRODUCT_ID_LEN];
u8 product_rev[SAS_EXPANDER_PRODUCT_REV_LEN];
u8 component_vendor_id[SAS_EXPANDER_COMPONENT_VENDOR_ID_LEN];
u16 component_id;
u8 component_revision_id;
u8 reserved3;
u8 vendor_specific[8];
};
/**
* transport_expander_report_manufacture - obtain SMP report_manufacture
* @ioc: per adapter object
* @sas_address: expander sas address
* @edev: the sas_expander_device object
*
* Fills in the sas_expander_device object when SMP port is created.
*
* Returns 0 for success, non-zero for failure.
*/
static int
_transport_expander_report_manufacture(struct MPT3SAS_ADAPTER *ioc,
u64 sas_address, struct sas_expander_device *edev)
{
Mpi2SmpPassthroughRequest_t *mpi_request;
Mpi2SmpPassthroughReply_t *mpi_reply;
struct rep_manu_reply *manufacture_reply;
struct rep_manu_request *manufacture_request;
int rc;
u16 smid;
u32 ioc_state;
unsigned long timeleft;
void *psge;
u8 issue_reset = 0;
void *data_out = NULL;
dma_addr_t data_out_dma;
dma_addr_t data_in_dma;
size_t data_in_sz;
size_t data_out_sz;
u16 wait_state_count;
if (ioc->shost_recovery || ioc->pci_error_recovery) {
pr_info(MPT3SAS_FMT "%s: host reset in progress!\n",
__func__, ioc->name);
return -EFAULT;
}
mutex_lock(&ioc->transport_cmds.mutex);
if (ioc->transport_cmds.status != MPT3_CMD_NOT_USED) {
pr_err(MPT3SAS_FMT "%s: transport_cmds in use\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
ioc->transport_cmds.status = MPT3_CMD_PENDING;
wait_state_count = 0;
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
if (wait_state_count++ == 10) {
pr_err(MPT3SAS_FMT
"%s: failed due to ioc not operational\n",
ioc->name, __func__);
rc = -EFAULT;
goto out;
}
ssleep(1);
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
pr_info(MPT3SAS_FMT
"%s: waiting for operational state(count=%d)\n",
ioc->name, __func__, wait_state_count);
}
if (wait_state_count)
pr_info(MPT3SAS_FMT "%s: ioc is operational\n",
ioc->name, __func__);
smid = mpt3sas_base_get_smid(ioc, ioc->transport_cb_idx);
if (!smid) {
pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
rc = 0;
mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
ioc->transport_cmds.smid = smid;
data_out_sz = sizeof(struct rep_manu_request);
data_in_sz = sizeof(struct rep_manu_reply);
data_out = pci_alloc_consistent(ioc->pdev, data_out_sz + data_in_sz,
&data_out_dma);
if (!data_out) {
pr_err("failure at %s:%d/%s()!\n", __FILE__,
__LINE__, __func__);
rc = -ENOMEM;
mpt3sas_base_free_smid(ioc, smid);
goto out;
}
data_in_dma = data_out_dma + sizeof(struct rep_manu_request);
manufacture_request = data_out;
manufacture_request->smp_frame_type = 0x40;
manufacture_request->function = 1;
manufacture_request->reserved = 0;
manufacture_request->request_length = 0;
memset(mpi_request, 0, sizeof(Mpi2SmpPassthroughRequest_t));
mpi_request->Function = MPI2_FUNCTION_SMP_PASSTHROUGH;
mpi_request->PhysicalPort = 0xFF;
mpi_request->SASAddress = cpu_to_le64(sas_address);
mpi_request->RequestDataLength = cpu_to_le16(data_out_sz);
psge = &mpi_request->SGL;
ioc->build_sg(ioc, psge, data_out_dma, data_out_sz, data_in_dma,
data_in_sz);
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"report_manufacture - send to sas_addr(0x%016llx)\n",
ioc->name, (unsigned long long)sas_address));
init_completion(&ioc->transport_cmds.done);
mpt3sas_base_put_smid_default(ioc, smid);
timeleft = wait_for_completion_timeout(&ioc->transport_cmds.done,
10*HZ);
if (!(ioc->transport_cmds.status & MPT3_CMD_COMPLETE)) {
pr_err(MPT3SAS_FMT "%s: timeout\n",
ioc->name, __func__);
_debug_dump_mf(mpi_request,
sizeof(Mpi2SmpPassthroughRequest_t)/4);
if (!(ioc->transport_cmds.status & MPT3_CMD_RESET))
issue_reset = 1;
goto issue_host_reset;
}
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"report_manufacture - complete\n", ioc->name));
if (ioc->transport_cmds.status & MPT3_CMD_REPLY_VALID) {
u8 *tmp;
mpi_reply = ioc->transport_cmds.reply;
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"report_manufacture - reply data transfer size(%d)\n",
ioc->name, le16_to_cpu(mpi_reply->ResponseDataLength)));
if (le16_to_cpu(mpi_reply->ResponseDataLength) !=
sizeof(struct rep_manu_reply))
goto out;
manufacture_reply = data_out + sizeof(struct rep_manu_request);
strncpy(edev->vendor_id, manufacture_reply->vendor_id,
SAS_EXPANDER_VENDOR_ID_LEN);
strncpy(edev->product_id, manufacture_reply->product_id,
SAS_EXPANDER_PRODUCT_ID_LEN);
strncpy(edev->product_rev, manufacture_reply->product_rev,
SAS_EXPANDER_PRODUCT_REV_LEN);
edev->level = manufacture_reply->sas_format & 1;
if (edev->level) {
strncpy(edev->component_vendor_id,
manufacture_reply->component_vendor_id,
SAS_EXPANDER_COMPONENT_VENDOR_ID_LEN);
tmp = (u8 *)&manufacture_reply->component_id;
edev->component_id = tmp[0] << 8 | tmp[1];
edev->component_revision_id =
manufacture_reply->component_revision_id;
}
} else
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"report_manufacture - no reply\n", ioc->name));
issue_host_reset:
if (issue_reset)
mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
FORCE_BIG_HAMMER);
out:
ioc->transport_cmds.status = MPT3_CMD_NOT_USED;
if (data_out)
pci_free_consistent(ioc->pdev, data_out_sz + data_in_sz,
data_out, data_out_dma);
mutex_unlock(&ioc->transport_cmds.mutex);
return rc;
}
/**
* _transport_delete_port - helper function to removing a port
* @ioc: per adapter object
* @mpt3sas_port: mpt3sas per port object
*
* Returns nothing.
*/
static void
_transport_delete_port(struct MPT3SAS_ADAPTER *ioc,
struct _sas_port *mpt3sas_port)
{
u64 sas_address = mpt3sas_port->remote_identify.sas_address;
enum sas_device_type device_type =
mpt3sas_port->remote_identify.device_type;
dev_printk(KERN_INFO, &mpt3sas_port->port->dev,
"remove: sas_addr(0x%016llx)\n",
(unsigned long long) sas_address);
ioc->logging_level |= MPT_DEBUG_TRANSPORT;
if (device_type == SAS_END_DEVICE)
mpt3sas_device_remove_by_sas_address(ioc, sas_address);
else if (device_type == SAS_EDGE_EXPANDER_DEVICE ||
device_type == SAS_FANOUT_EXPANDER_DEVICE)
mpt3sas_expander_remove(ioc, sas_address);
ioc->logging_level &= ~MPT_DEBUG_TRANSPORT;
}
/**
* _transport_delete_phy - helper function to removing single phy from port
* @ioc: per adapter object
* @mpt3sas_port: mpt3sas per port object
* @mpt3sas_phy: mpt3sas per phy object
*
* Returns nothing.
*/
static void
_transport_delete_phy(struct MPT3SAS_ADAPTER *ioc,
struct _sas_port *mpt3sas_port, struct _sas_phy *mpt3sas_phy)
{
u64 sas_address = mpt3sas_port->remote_identify.sas_address;
dev_printk(KERN_INFO, &mpt3sas_phy->phy->dev,
"remove: sas_addr(0x%016llx), phy(%d)\n",
(unsigned long long) sas_address, mpt3sas_phy->phy_id);
list_del(&mpt3sas_phy->port_siblings);
mpt3sas_port->num_phys--;
sas_port_delete_phy(mpt3sas_port->port, mpt3sas_phy->phy);
mpt3sas_phy->phy_belongs_to_port = 0;
}
/**
* _transport_add_phy - helper function to adding single phy to port
* @ioc: per adapter object
* @mpt3sas_port: mpt3sas per port object
* @mpt3sas_phy: mpt3sas per phy object
*
* Returns nothing.
*/
static void
_transport_add_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_port *mpt3sas_port,
struct _sas_phy *mpt3sas_phy)
{
u64 sas_address = mpt3sas_port->remote_identify.sas_address;
dev_printk(KERN_INFO, &mpt3sas_phy->phy->dev,
"add: sas_addr(0x%016llx), phy(%d)\n", (unsigned long long)
sas_address, mpt3sas_phy->phy_id);
list_add_tail(&mpt3sas_phy->port_siblings, &mpt3sas_port->phy_list);
mpt3sas_port->num_phys++;
sas_port_add_phy(mpt3sas_port->port, mpt3sas_phy->phy);
mpt3sas_phy->phy_belongs_to_port = 1;
}
/**
* _transport_add_phy_to_an_existing_port - adding new phy to existing port
* @ioc: per adapter object
* @sas_node: sas node object (either expander or sas host)
* @mpt3sas_phy: mpt3sas per phy object
* @sas_address: sas address of device/expander were phy needs to be added to
*
* Returns nothing.
*/
static void
_transport_add_phy_to_an_existing_port(struct MPT3SAS_ADAPTER *ioc,
struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy,
u64 sas_address)
{
struct _sas_port *mpt3sas_port;
struct _sas_phy *phy_srch;
if (mpt3sas_phy->phy_belongs_to_port == 1)
return;
list_for_each_entry(mpt3sas_port, &sas_node->sas_port_list,
port_list) {
if (mpt3sas_port->remote_identify.sas_address !=
sas_address)
continue;
list_for_each_entry(phy_srch, &mpt3sas_port->phy_list,
port_siblings) {
if (phy_srch == mpt3sas_phy)
return;
}
_transport_add_phy(ioc, mpt3sas_port, mpt3sas_phy);
return;
}
}
/**
* _transport_del_phy_from_an_existing_port - delete phy from existing port
* @ioc: per adapter object
* @sas_node: sas node object (either expander or sas host)
* @mpt3sas_phy: mpt3sas per phy object
*
* Returns nothing.
*/
static void
_transport_del_phy_from_an_existing_port(struct MPT3SAS_ADAPTER *ioc,
struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy)
{
struct _sas_port *mpt3sas_port, *next;
struct _sas_phy *phy_srch;
if (mpt3sas_phy->phy_belongs_to_port == 0)
return;
list_for_each_entry_safe(mpt3sas_port, next, &sas_node->sas_port_list,
port_list) {
list_for_each_entry(phy_srch, &mpt3sas_port->phy_list,
port_siblings) {
if (phy_srch != mpt3sas_phy)
continue;
if (mpt3sas_port->num_phys == 1)
_transport_delete_port(ioc, mpt3sas_port);
else
_transport_delete_phy(ioc, mpt3sas_port,
mpt3sas_phy);
return;
}
}
}
/**
* _transport_sanity_check - sanity check when adding a new port
* @ioc: per adapter object
* @sas_node: sas node object (either expander or sas host)
* @sas_address: sas address of device being added
*
* See the explanation above from _transport_delete_duplicate_port
*/
static void
_transport_sanity_check(struct MPT3SAS_ADAPTER *ioc, struct _sas_node *sas_node,
u64 sas_address)
{
int i;
for (i = 0; i < sas_node->num_phys; i++) {
if (sas_node->phy[i].remote_identify.sas_address != sas_address)
continue;
if (sas_node->phy[i].phy_belongs_to_port == 1)
_transport_del_phy_from_an_existing_port(ioc, sas_node,
&sas_node->phy[i]);
}
}
/**
* mpt3sas_transport_port_add - insert port to the list
* @ioc: per adapter object
* @handle: handle of attached device
* @sas_address: sas address of parent expander or sas host
* Context: This function will acquire ioc->sas_node_lock.
*
* Adding new port object to the sas_node->sas_port_list.
*
* Returns mpt3sas_port.
*/
struct _sas_port *
mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc, u16 handle,
u64 sas_address)
{
struct _sas_phy *mpt3sas_phy, *next;
struct _sas_port *mpt3sas_port;
unsigned long flags;
struct _sas_node *sas_node;
struct sas_rphy *rphy;
int i;
struct sas_port *port;
mpt3sas_port = kzalloc(sizeof(struct _sas_port),
GFP_KERNEL);
if (!mpt3sas_port) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
return NULL;
}
INIT_LIST_HEAD(&mpt3sas_port->port_list);
INIT_LIST_HEAD(&mpt3sas_port->phy_list);
spin_lock_irqsave(&ioc->sas_node_lock, flags);
sas_node = _transport_sas_node_find_by_sas_address(ioc, sas_address);
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
if (!sas_node) {
pr_err(MPT3SAS_FMT
"%s: Could not find parent sas_address(0x%016llx)!\n",
ioc->name, __func__, (unsigned long long)sas_address);
goto out_fail;
}
if ((_transport_set_identify(ioc, handle,
&mpt3sas_port->remote_identify))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
goto out_fail;
}
if (mpt3sas_port->remote_identify.device_type == SAS_PHY_UNUSED) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
goto out_fail;
}
_transport_sanity_check(ioc, sas_node,
mpt3sas_port->remote_identify.sas_address);
for (i = 0; i < sas_node->num_phys; i++) {
if (sas_node->phy[i].remote_identify.sas_address !=
mpt3sas_port->remote_identify.sas_address)
continue;
list_add_tail(&sas_node->phy[i].port_siblings,
&mpt3sas_port->phy_list);
mpt3sas_port->num_phys++;
}
if (!mpt3sas_port->num_phys) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
goto out_fail;
}
port = sas_port_alloc_num(sas_node->parent_dev);
if ((sas_port_add(port))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
goto out_fail;
}
list_for_each_entry(mpt3sas_phy, &mpt3sas_port->phy_list,
port_siblings) {
if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
dev_printk(KERN_INFO, &port->dev,
"add: handle(0x%04x), sas_addr(0x%016llx), phy(%d)\n",
handle, (unsigned long long)
mpt3sas_port->remote_identify.sas_address,
mpt3sas_phy->phy_id);
sas_port_add_phy(port, mpt3sas_phy->phy);
mpt3sas_phy->phy_belongs_to_port = 1;
}
mpt3sas_port->port = port;
if (mpt3sas_port->remote_identify.device_type == SAS_END_DEVICE)
rphy = sas_end_device_alloc(port);
else
rphy = sas_expander_alloc(port,
mpt3sas_port->remote_identify.device_type);
rphy->identify = mpt3sas_port->remote_identify;
if ((sas_rphy_add(rphy))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
}
if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
dev_printk(KERN_INFO, &rphy->dev,
"add: handle(0x%04x), sas_addr(0x%016llx)\n",
handle, (unsigned long long)
mpt3sas_port->remote_identify.sas_address);
mpt3sas_port->rphy = rphy;
spin_lock_irqsave(&ioc->sas_node_lock, flags);
list_add_tail(&mpt3sas_port->port_list, &sas_node->sas_port_list);
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
/* fill in report manufacture */
if (mpt3sas_port->remote_identify.device_type ==
MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER ||
mpt3sas_port->remote_identify.device_type ==
MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER)
_transport_expander_report_manufacture(ioc,
mpt3sas_port->remote_identify.sas_address,
rphy_to_expander_device(rphy));
return mpt3sas_port;
out_fail:
list_for_each_entry_safe(mpt3sas_phy, next, &mpt3sas_port->phy_list,
port_siblings)
list_del(&mpt3sas_phy->port_siblings);
kfree(mpt3sas_port);
return NULL;
}
/**
* mpt3sas_transport_port_remove - remove port from the list
* @ioc: per adapter object
* @sas_address: sas address of attached device
* @sas_address_parent: sas address of parent expander or sas host
* Context: This function will acquire ioc->sas_node_lock.
*
* Removing object and freeing associated memory from the
* ioc->sas_port_list.
*
* Return nothing.
*/
void
mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
u64 sas_address_parent)
{
int i;
unsigned long flags;
struct _sas_port *mpt3sas_port, *next;
struct _sas_node *sas_node;
u8 found = 0;
struct _sas_phy *mpt3sas_phy, *next_phy;
spin_lock_irqsave(&ioc->sas_node_lock, flags);
sas_node = _transport_sas_node_find_by_sas_address(ioc,
sas_address_parent);
if (!sas_node) {
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
return;
}
list_for_each_entry_safe(mpt3sas_port, next, &sas_node->sas_port_list,
port_list) {
if (mpt3sas_port->remote_identify.sas_address != sas_address)
continue;
found = 1;
list_del(&mpt3sas_port->port_list);
goto out;
}
out:
if (!found) {
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
return;
}
for (i = 0; i < sas_node->num_phys; i++) {
if (sas_node->phy[i].remote_identify.sas_address == sas_address)
memset(&sas_node->phy[i].remote_identify, 0 ,
sizeof(struct sas_identify));
}
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
list_for_each_entry_safe(mpt3sas_phy, next_phy,
&mpt3sas_port->phy_list, port_siblings) {
if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
dev_printk(KERN_INFO, &mpt3sas_port->port->dev,
"remove: sas_addr(0x%016llx), phy(%d)\n",
(unsigned long long)
mpt3sas_port->remote_identify.sas_address,
mpt3sas_phy->phy_id);
mpt3sas_phy->phy_belongs_to_port = 0;
sas_port_delete_phy(mpt3sas_port->port, mpt3sas_phy->phy);
list_del(&mpt3sas_phy->port_siblings);
}
sas_port_delete(mpt3sas_port->port);
kfree(mpt3sas_port);
}
/**
* mpt3sas_transport_add_host_phy - report sas_host phy to transport
* @ioc: per adapter object
* @mpt3sas_phy: mpt3sas per phy object
* @phy_pg0: sas phy page 0
* @parent_dev: parent device class object
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
*mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev)
{
struct sas_phy *phy;
int phy_index = mpt3sas_phy->phy_id;
INIT_LIST_HEAD(&mpt3sas_phy->port_siblings);
phy = sas_phy_alloc(parent_dev, phy_index);
if (!phy) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
return -1;
}
if ((_transport_set_identify(ioc, mpt3sas_phy->handle,
&mpt3sas_phy->identify))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
sas_phy_free(phy);
return -1;
}
phy->identify = mpt3sas_phy->identify;
mpt3sas_phy->attached_handle = le16_to_cpu(phy_pg0.AttachedDevHandle);
if (mpt3sas_phy->attached_handle)
_transport_set_identify(ioc, mpt3sas_phy->attached_handle,
&mpt3sas_phy->remote_identify);
phy->identify.phy_identifier = mpt3sas_phy->phy_id;
phy->negotiated_linkrate = _transport_convert_phy_link_rate(
phy_pg0.NegotiatedLinkRate & MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL);
phy->minimum_linkrate_hw = _transport_convert_phy_link_rate(
phy_pg0.HwLinkRate & MPI2_SAS_HWRATE_MIN_RATE_MASK);
phy->maximum_linkrate_hw = _transport_convert_phy_link_rate(
phy_pg0.HwLinkRate >> 4);
phy->minimum_linkrate = _transport_convert_phy_link_rate(
phy_pg0.ProgrammedLinkRate & MPI2_SAS_PRATE_MIN_RATE_MASK);
phy->maximum_linkrate = _transport_convert_phy_link_rate(
phy_pg0.ProgrammedLinkRate >> 4);
if ((sas_phy_add(phy))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
sas_phy_free(phy);
return -1;
}
if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
dev_printk(KERN_INFO, &phy->dev,
"add: handle(0x%04x), sas_addr(0x%016llx)\n"
"\tattached_handle(0x%04x), sas_addr(0x%016llx)\n",
mpt3sas_phy->handle, (unsigned long long)
mpt3sas_phy->identify.sas_address,
mpt3sas_phy->attached_handle,
(unsigned long long)
mpt3sas_phy->remote_identify.sas_address);
mpt3sas_phy->phy = phy;
return 0;
}
/**
* mpt3sas_transport_add_expander_phy - report expander phy to transport
* @ioc: per adapter object
* @mpt3sas_phy: mpt3sas per phy object
* @expander_pg1: expander page 1
* @parent_dev: parent device class object
*
* Returns 0 for success, non-zero for failure.
*/
int
mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
*mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
struct device *parent_dev)
{
struct sas_phy *phy;
int phy_index = mpt3sas_phy->phy_id;
INIT_LIST_HEAD(&mpt3sas_phy->port_siblings);
phy = sas_phy_alloc(parent_dev, phy_index);
if (!phy) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
return -1;
}
if ((_transport_set_identify(ioc, mpt3sas_phy->handle,
&mpt3sas_phy->identify))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
sas_phy_free(phy);
return -1;
}
phy->identify = mpt3sas_phy->identify;
mpt3sas_phy->attached_handle =
le16_to_cpu(expander_pg1.AttachedDevHandle);
if (mpt3sas_phy->attached_handle)
_transport_set_identify(ioc, mpt3sas_phy->attached_handle,
&mpt3sas_phy->remote_identify);
phy->identify.phy_identifier = mpt3sas_phy->phy_id;
phy->negotiated_linkrate = _transport_convert_phy_link_rate(
expander_pg1.NegotiatedLinkRate &
MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL);
phy->minimum_linkrate_hw = _transport_convert_phy_link_rate(
expander_pg1.HwLinkRate & MPI2_SAS_HWRATE_MIN_RATE_MASK);
phy->maximum_linkrate_hw = _transport_convert_phy_link_rate(
expander_pg1.HwLinkRate >> 4);
phy->minimum_linkrate = _transport_convert_phy_link_rate(
expander_pg1.ProgrammedLinkRate & MPI2_SAS_PRATE_MIN_RATE_MASK);
phy->maximum_linkrate = _transport_convert_phy_link_rate(
expander_pg1.ProgrammedLinkRate >> 4);
if ((sas_phy_add(phy))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
sas_phy_free(phy);
return -1;
}
if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
dev_printk(KERN_INFO, &phy->dev,
"add: handle(0x%04x), sas_addr(0x%016llx)\n"
"\tattached_handle(0x%04x), sas_addr(0x%016llx)\n",
mpt3sas_phy->handle, (unsigned long long)
mpt3sas_phy->identify.sas_address,
mpt3sas_phy->attached_handle,
(unsigned long long)
mpt3sas_phy->remote_identify.sas_address);
mpt3sas_phy->phy = phy;
return 0;
}
/**
* mpt3sas_transport_update_links - refreshing phy link changes
* @ioc: per adapter object
* @sas_address: sas address of parent expander or sas host
* @handle: attached device handle
* @phy_numberv: phy number
* @link_rate: new link rate
*
* Returns nothing.
*/
void
mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
u64 sas_address, u16 handle, u8 phy_number, u8 link_rate)
{
unsigned long flags;
struct _sas_node *sas_node;
struct _sas_phy *mpt3sas_phy;
if (ioc->shost_recovery || ioc->pci_error_recovery)
return;
spin_lock_irqsave(&ioc->sas_node_lock, flags);
sas_node = _transport_sas_node_find_by_sas_address(ioc, sas_address);
if (!sas_node) {
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
return;
}
mpt3sas_phy = &sas_node->phy[phy_number];
mpt3sas_phy->attached_handle = handle;
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
if (handle && (link_rate >= MPI2_SAS_NEG_LINK_RATE_1_5)) {
_transport_set_identify(ioc, handle,
&mpt3sas_phy->remote_identify);
_transport_add_phy_to_an_existing_port(ioc, sas_node,
mpt3sas_phy, mpt3sas_phy->remote_identify.sas_address);
} else
memset(&mpt3sas_phy->remote_identify, 0 , sizeof(struct
sas_identify));
if (mpt3sas_phy->phy)
mpt3sas_phy->phy->negotiated_linkrate =
_transport_convert_phy_link_rate(link_rate);
if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
dev_printk(KERN_INFO, &mpt3sas_phy->phy->dev,
"refresh: parent sas_addr(0x%016llx),\n"
"\tlink_rate(0x%02x), phy(%d)\n"
"\tattached_handle(0x%04x), sas_addr(0x%016llx)\n",
(unsigned long long)sas_address,
link_rate, phy_number, handle, (unsigned long long)
mpt3sas_phy->remote_identify.sas_address);
}
static inline void *
phy_to_ioc(struct sas_phy *phy)
{
struct Scsi_Host *shost = dev_to_shost(phy->dev.parent);
return shost_priv(shost);
}
static inline void *
rphy_to_ioc(struct sas_rphy *rphy)
{
struct Scsi_Host *shost = dev_to_shost(rphy->dev.parent->parent);
return shost_priv(shost);
}
/* report phy error log structure */
struct phy_error_log_request {
u8 smp_frame_type; /* 0x40 */
u8 function; /* 0x11 */
u8 allocated_response_length;
u8 request_length; /* 02 */
u8 reserved_1[5];
u8 phy_identifier;
u8 reserved_2[2];
};
/* report phy error log reply structure */
struct phy_error_log_reply {
u8 smp_frame_type; /* 0x41 */
u8 function; /* 0x11 */
u8 function_result;
u8 response_length;
__be16 expander_change_count;
u8 reserved_1[3];
u8 phy_identifier;
u8 reserved_2[2];
__be32 invalid_dword;
__be32 running_disparity_error;
__be32 loss_of_dword_sync;
__be32 phy_reset_problem;
};
/**
* _transport_get_expander_phy_error_log - return expander counters
* @ioc: per adapter object
* @phy: The sas phy object
*
* Returns 0 for success, non-zero for failure.
*
*/
static int
_transport_get_expander_phy_error_log(struct MPT3SAS_ADAPTER *ioc,
struct sas_phy *phy)
{
Mpi2SmpPassthroughRequest_t *mpi_request;
Mpi2SmpPassthroughReply_t *mpi_reply;
struct phy_error_log_request *phy_error_log_request;
struct phy_error_log_reply *phy_error_log_reply;
int rc;
u16 smid;
u32 ioc_state;
unsigned long timeleft;
void *psge;
u8 issue_reset = 0;
void *data_out = NULL;
dma_addr_t data_out_dma;
u32 sz;
u16 wait_state_count;
if (ioc->shost_recovery || ioc->pci_error_recovery) {
pr_info(MPT3SAS_FMT "%s: host reset in progress!\n",
__func__, ioc->name);
return -EFAULT;
}
mutex_lock(&ioc->transport_cmds.mutex);
if (ioc->transport_cmds.status != MPT3_CMD_NOT_USED) {
pr_err(MPT3SAS_FMT "%s: transport_cmds in use\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
ioc->transport_cmds.status = MPT3_CMD_PENDING;
wait_state_count = 0;
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
if (wait_state_count++ == 10) {
pr_err(MPT3SAS_FMT
"%s: failed due to ioc not operational\n",
ioc->name, __func__);
rc = -EFAULT;
goto out;
}
ssleep(1);
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
pr_info(MPT3SAS_FMT
"%s: waiting for operational state(count=%d)\n",
ioc->name, __func__, wait_state_count);
}
if (wait_state_count)
pr_info(MPT3SAS_FMT "%s: ioc is operational\n",
ioc->name, __func__);
smid = mpt3sas_base_get_smid(ioc, ioc->transport_cb_idx);
if (!smid) {
pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
ioc->transport_cmds.smid = smid;
sz = sizeof(struct phy_error_log_request) +
sizeof(struct phy_error_log_reply);
data_out = pci_alloc_consistent(ioc->pdev, sz, &data_out_dma);
if (!data_out) {
pr_err("failure at %s:%d/%s()!\n", __FILE__,
__LINE__, __func__);
rc = -ENOMEM;
mpt3sas_base_free_smid(ioc, smid);
goto out;
}
rc = -EINVAL;
memset(data_out, 0, sz);
phy_error_log_request = data_out;
phy_error_log_request->smp_frame_type = 0x40;
phy_error_log_request->function = 0x11;
phy_error_log_request->request_length = 2;
phy_error_log_request->allocated_response_length = 0;
phy_error_log_request->phy_identifier = phy->number;
memset(mpi_request, 0, sizeof(Mpi2SmpPassthroughRequest_t));
mpi_request->Function = MPI2_FUNCTION_SMP_PASSTHROUGH;
mpi_request->PhysicalPort = 0xFF;
mpi_request->VF_ID = 0; /* TODO */
mpi_request->VP_ID = 0;
mpi_request->SASAddress = cpu_to_le64(phy->identify.sas_address);
mpi_request->RequestDataLength =
cpu_to_le16(sizeof(struct phy_error_log_request));
psge = &mpi_request->SGL;
ioc->build_sg(ioc, psge, data_out_dma,
sizeof(struct phy_error_log_request),
data_out_dma + sizeof(struct phy_error_log_request),
sizeof(struct phy_error_log_reply));
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"phy_error_log - send to sas_addr(0x%016llx), phy(%d)\n",
ioc->name, (unsigned long long)phy->identify.sas_address,
phy->number));
init_completion(&ioc->transport_cmds.done);
mpt3sas_base_put_smid_default(ioc, smid);
timeleft = wait_for_completion_timeout(&ioc->transport_cmds.done,
10*HZ);
if (!(ioc->transport_cmds.status & MPT3_CMD_COMPLETE)) {
pr_err(MPT3SAS_FMT "%s: timeout\n",
ioc->name, __func__);
_debug_dump_mf(mpi_request,
sizeof(Mpi2SmpPassthroughRequest_t)/4);
if (!(ioc->transport_cmds.status & MPT3_CMD_RESET))
issue_reset = 1;
goto issue_host_reset;
}
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"phy_error_log - complete\n", ioc->name));
if (ioc->transport_cmds.status & MPT3_CMD_REPLY_VALID) {
mpi_reply = ioc->transport_cmds.reply;
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"phy_error_log - reply data transfer size(%d)\n",
ioc->name, le16_to_cpu(mpi_reply->ResponseDataLength)));
if (le16_to_cpu(mpi_reply->ResponseDataLength) !=
sizeof(struct phy_error_log_reply))
goto out;
phy_error_log_reply = data_out +
sizeof(struct phy_error_log_request);
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"phy_error_log - function_result(%d)\n",
ioc->name, phy_error_log_reply->function_result));
phy->invalid_dword_count =
be32_to_cpu(phy_error_log_reply->invalid_dword);
phy->running_disparity_error_count =
be32_to_cpu(phy_error_log_reply->running_disparity_error);
phy->loss_of_dword_sync_count =
be32_to_cpu(phy_error_log_reply->loss_of_dword_sync);
phy->phy_reset_problem_count =
be32_to_cpu(phy_error_log_reply->phy_reset_problem);
rc = 0;
} else
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"phy_error_log - no reply\n", ioc->name));
issue_host_reset:
if (issue_reset)
mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
FORCE_BIG_HAMMER);
out:
ioc->transport_cmds.status = MPT3_CMD_NOT_USED;
if (data_out)
pci_free_consistent(ioc->pdev, sz, data_out, data_out_dma);
mutex_unlock(&ioc->transport_cmds.mutex);
return rc;
}
/**
* _transport_get_linkerrors - return phy counters for both hba and expanders
* @phy: The sas phy object
*
* Returns 0 for success, non-zero for failure.
*
*/
static int
_transport_get_linkerrors(struct sas_phy *phy)
{
struct MPT3SAS_ADAPTER *ioc = phy_to_ioc(phy);
unsigned long flags;
Mpi2ConfigReply_t mpi_reply;
Mpi2SasPhyPage1_t phy_pg1;
spin_lock_irqsave(&ioc->sas_node_lock, flags);
if (_transport_sas_node_find_by_sas_address(ioc,
phy->identify.sas_address) == NULL) {
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
return -EINVAL;
}
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
if (phy->identify.sas_address != ioc->sas_hba.sas_address)
return _transport_get_expander_phy_error_log(ioc, phy);
/* get hba phy error logs */
if ((mpt3sas_config_get_phy_pg1(ioc, &mpi_reply, &phy_pg1,
phy->number))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
return -ENXIO;
}
if (mpi_reply.IOCStatus || mpi_reply.IOCLogInfo)
pr_info(MPT3SAS_FMT
"phy(%d), ioc_status (0x%04x), loginfo(0x%08x)\n",
ioc->name, phy->number,
le16_to_cpu(mpi_reply.IOCStatus),
le32_to_cpu(mpi_reply.IOCLogInfo));
phy->invalid_dword_count = le32_to_cpu(phy_pg1.InvalidDwordCount);
phy->running_disparity_error_count =
le32_to_cpu(phy_pg1.RunningDisparityErrorCount);
phy->loss_of_dword_sync_count =
le32_to_cpu(phy_pg1.LossDwordSynchCount);
phy->phy_reset_problem_count =
le32_to_cpu(phy_pg1.PhyResetProblemCount);
return 0;
}
/**
* _transport_get_enclosure_identifier -
* @phy: The sas phy object
*
* Obtain the enclosure logical id for an expander.
* Returns 0 for success, non-zero for failure.
*/
static int
_transport_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
{
struct MPT3SAS_ADAPTER *ioc = rphy_to_ioc(rphy);
struct _sas_device *sas_device;
unsigned long flags;
int rc;
spin_lock_irqsave(&ioc->sas_device_lock, flags);
sas_device = mpt3sas_scsih_sas_device_find_by_sas_address(ioc,
rphy->identify.sas_address);
if (sas_device) {
*identifier = sas_device->enclosure_logical_id;
rc = 0;
} else {
*identifier = 0;
rc = -ENXIO;
}
spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
return rc;
}
/**
* _transport_get_bay_identifier -
* @phy: The sas phy object
*
* Returns the slot id for a device that resides inside an enclosure.
*/
static int
_transport_get_bay_identifier(struct sas_rphy *rphy)
{
struct MPT3SAS_ADAPTER *ioc = rphy_to_ioc(rphy);
struct _sas_device *sas_device;
unsigned long flags;
int rc;
spin_lock_irqsave(&ioc->sas_device_lock, flags);
sas_device = mpt3sas_scsih_sas_device_find_by_sas_address(ioc,
rphy->identify.sas_address);
if (sas_device)
rc = sas_device->slot;
else
rc = -ENXIO;
spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
return rc;
}
/* phy control request structure */
struct phy_control_request {
u8 smp_frame_type; /* 0x40 */
u8 function; /* 0x91 */
u8 allocated_response_length;
u8 request_length; /* 0x09 */
u16 expander_change_count;
u8 reserved_1[3];
u8 phy_identifier;
u8 phy_operation;
u8 reserved_2[13];
u64 attached_device_name;
u8 programmed_min_physical_link_rate;
u8 programmed_max_physical_link_rate;
u8 reserved_3[6];
};
/* phy control reply structure */
struct phy_control_reply {
u8 smp_frame_type; /* 0x41 */
u8 function; /* 0x11 */
u8 function_result;
u8 response_length;
};
#define SMP_PHY_CONTROL_LINK_RESET (0x01)
#define SMP_PHY_CONTROL_HARD_RESET (0x02)
#define SMP_PHY_CONTROL_DISABLE (0x03)
/**
* _transport_expander_phy_control - expander phy control
* @ioc: per adapter object
* @phy: The sas phy object
*
* Returns 0 for success, non-zero for failure.
*
*/
static int
_transport_expander_phy_control(struct MPT3SAS_ADAPTER *ioc,
struct sas_phy *phy, u8 phy_operation)
{
Mpi2SmpPassthroughRequest_t *mpi_request;
Mpi2SmpPassthroughReply_t *mpi_reply;
struct phy_control_request *phy_control_request;
struct phy_control_reply *phy_control_reply;
int rc;
u16 smid;
u32 ioc_state;
unsigned long timeleft;
void *psge;
u32 sgl_flags;
u8 issue_reset = 0;
void *data_out = NULL;
dma_addr_t data_out_dma;
u32 sz;
u16 wait_state_count;
if (ioc->shost_recovery || ioc->pci_error_recovery) {
pr_info(MPT3SAS_FMT "%s: host reset in progress!\n",
__func__, ioc->name);
return -EFAULT;
}
mutex_lock(&ioc->transport_cmds.mutex);
if (ioc->transport_cmds.status != MPT3_CMD_NOT_USED) {
pr_err(MPT3SAS_FMT "%s: transport_cmds in use\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
ioc->transport_cmds.status = MPT3_CMD_PENDING;
wait_state_count = 0;
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
if (wait_state_count++ == 10) {
pr_err(MPT3SAS_FMT
"%s: failed due to ioc not operational\n",
ioc->name, __func__);
rc = -EFAULT;
goto out;
}
ssleep(1);
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
pr_info(MPT3SAS_FMT
"%s: waiting for operational state(count=%d)\n",
ioc->name, __func__, wait_state_count);
}
if (wait_state_count)
pr_info(MPT3SAS_FMT "%s: ioc is operational\n",
ioc->name, __func__);
smid = mpt3sas_base_get_smid(ioc, ioc->transport_cb_idx);
if (!smid) {
pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
ioc->name, __func__);
rc = -EAGAIN;
goto out;
}
mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
ioc->transport_cmds.smid = smid;
sz = sizeof(struct phy_control_request) +
sizeof(struct phy_control_reply);
data_out = pci_alloc_consistent(ioc->pdev, sz, &data_out_dma);
if (!data_out) {
pr_err("failure at %s:%d/%s()!\n", __FILE__,
__LINE__, __func__);
rc = -ENOMEM;
mpt3sas_base_free_smid(ioc, smid);
goto out;
}
rc = -EINVAL;
memset(data_out, 0, sz);
phy_control_request = data_out;
phy_control_request->smp_frame_type = 0x40;
phy_control_request->function = 0x91;
phy_control_request->request_length = 9;
phy_control_request->allocated_response_length = 0;
phy_control_request->phy_identifier = phy->number;
phy_control_request->phy_operation = phy_operation;
phy_control_request->programmed_min_physical_link_rate =
phy->minimum_linkrate << 4;
phy_control_request->programmed_max_physical_link_rate =
phy->maximum_linkrate << 4;
memset(mpi_request, 0, sizeof(Mpi2SmpPassthroughRequest_t));
mpi_request->Function = MPI2_FUNCTION_SMP_PASSTHROUGH;
mpi_request->PhysicalPort = 0xFF;
mpi_request->VF_ID = 0; /* TODO */
mpi_request->VP_ID = 0;
mpi_request->SASAddress = cpu_to_le64(phy->identify.sas_address);
mpi_request->RequestDataLength =
cpu_to_le16(sizeof(struct phy_error_log_request));
psge = &mpi_request->SGL;
/* WRITE sgel first */
sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC);
sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
ioc->base_add_sg_single(psge, sgl_flags |
sizeof(struct phy_control_request), data_out_dma);
/* incr sgel */
psge += ioc->sge_size;
/* READ sgel last */
sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
MPI2_SGE_FLAGS_END_OF_LIST);
sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
ioc->base_add_sg_single(psge, sgl_flags |
sizeof(struct phy_control_reply), data_out_dma +
sizeof(struct phy_control_request));
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"phy_control - send to sas_addr(0x%016llx), phy(%d), opcode(%d)\n",
ioc->name, (unsigned long long)phy->identify.sas_address,
phy->number, phy_operation));
init_completion(&ioc->transport_cmds.done);
mpt3sas_base_put_smid_default(ioc, smid);
timeleft = wait_for_completion_timeout(&ioc->transport_cmds.done,
10*HZ);
if (!(ioc->transport_cmds.status & MPT3_CMD_COMPLETE)) {
pr_err(MPT3SAS_FMT "%s: timeout\n",
ioc->name, __func__);
_debug_dump_mf(mpi_request,
sizeof(Mpi2SmpPassthroughRequest_t)/4);
if (!(ioc->transport_cmds.status & MPT3_CMD_RESET))
issue_reset = 1;
goto issue_host_reset;
}
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"phy_control - complete\n", ioc->name));
if (ioc->transport_cmds.status & MPT3_CMD_REPLY_VALID) {
mpi_reply = ioc->transport_cmds.reply;
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"phy_control - reply data transfer size(%d)\n",
ioc->name, le16_to_cpu(mpi_reply->ResponseDataLength)));
if (le16_to_cpu(mpi_reply->ResponseDataLength) !=
sizeof(struct phy_control_reply))
goto out;
phy_control_reply = data_out +
sizeof(struct phy_control_request);
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"phy_control - function_result(%d)\n",
ioc->name, phy_control_reply->function_result));
rc = 0;
} else
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"phy_control - no reply\n", ioc->name));
issue_host_reset:
if (issue_reset)
mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
FORCE_BIG_HAMMER);
out:
ioc->transport_cmds.status = MPT3_CMD_NOT_USED;
if (data_out)
pci_free_consistent(ioc->pdev, sz, data_out, data_out_dma);
mutex_unlock(&ioc->transport_cmds.mutex);
return rc;
}
/**
* _transport_phy_reset -
* @phy: The sas phy object
* @hard_reset:
*
* Returns 0 for success, non-zero for failure.
*/
static int
_transport_phy_reset(struct sas_phy *phy, int hard_reset)
{
struct MPT3SAS_ADAPTER *ioc = phy_to_ioc(phy);
Mpi2SasIoUnitControlReply_t mpi_reply;
Mpi2SasIoUnitControlRequest_t mpi_request;
unsigned long flags;
spin_lock_irqsave(&ioc->sas_node_lock, flags);
if (_transport_sas_node_find_by_sas_address(ioc,
phy->identify.sas_address) == NULL) {
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
return -EINVAL;
}
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
/* handle expander phys */
if (phy->identify.sas_address != ioc->sas_hba.sas_address)
return _transport_expander_phy_control(ioc, phy,
(hard_reset == 1) ? SMP_PHY_CONTROL_HARD_RESET :
SMP_PHY_CONTROL_LINK_RESET);
/* handle hba phys */
memset(&mpi_request, 0, sizeof(Mpi2SasIoUnitControlReply_t));
mpi_request.Function = MPI2_FUNCTION_SAS_IO_UNIT_CONTROL;
mpi_request.Operation = hard_reset ?
MPI2_SAS_OP_PHY_HARD_RESET : MPI2_SAS_OP_PHY_LINK_RESET;
mpi_request.PhyNum = phy->number;
if ((mpt3sas_base_sas_iounit_control(ioc, &mpi_reply, &mpi_request))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
return -ENXIO;
}
if (mpi_reply.IOCStatus || mpi_reply.IOCLogInfo)
pr_info(MPT3SAS_FMT
"phy(%d), ioc_status(0x%04x), loginfo(0x%08x)\n",
ioc->name, phy->number, le16_to_cpu(mpi_reply.IOCStatus),
le32_to_cpu(mpi_reply.IOCLogInfo));
return 0;
}
/**
* _transport_phy_enable - enable/disable phys
* @phy: The sas phy object
* @enable: enable phy when true
*
* Only support sas_host direct attached phys.
* Returns 0 for success, non-zero for failure.
*/
static int
_transport_phy_enable(struct sas_phy *phy, int enable)
{
struct MPT3SAS_ADAPTER *ioc = phy_to_ioc(phy);
Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
Mpi2SasIOUnitPage0_t *sas_iounit_pg0 = NULL;
Mpi2ConfigReply_t mpi_reply;
u16 ioc_status;
u16 sz;
int rc = 0;
unsigned long flags;
int i, discovery_active;
spin_lock_irqsave(&ioc->sas_node_lock, flags);
if (_transport_sas_node_find_by_sas_address(ioc,
phy->identify.sas_address) == NULL) {
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
return -EINVAL;
}
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
/* handle expander phys */
if (phy->identify.sas_address != ioc->sas_hba.sas_address)
return _transport_expander_phy_control(ioc, phy,
(enable == 1) ? SMP_PHY_CONTROL_LINK_RESET :
SMP_PHY_CONTROL_DISABLE);
/* handle hba phys */
/* read sas_iounit page 0 */
sz = offsetof(Mpi2SasIOUnitPage0_t, PhyData) + (ioc->sas_hba.num_phys *
sizeof(Mpi2SasIOUnit0PhyData_t));
sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg0) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
rc = -ENOMEM;
goto out;
}
if ((mpt3sas_config_get_sas_iounit_pg0(ioc, &mpi_reply,
sas_iounit_pg0, sz))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
rc = -ENXIO;
goto out;
}
ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
MPI2_IOCSTATUS_MASK;
if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
rc = -EIO;
goto out;
}
/* unable to enable/disable phys when when discovery is active */
for (i = 0, discovery_active = 0; i < ioc->sas_hba.num_phys ; i++) {
if (sas_iounit_pg0->PhyData[i].PortFlags &
MPI2_SASIOUNIT0_PORTFLAGS_DISCOVERY_IN_PROGRESS) {
pr_err(MPT3SAS_FMT "discovery is active on " \
"port = %d, phy = %d: unable to enable/disable "
"phys, try again later!\n", ioc->name,
sas_iounit_pg0->PhyData[i].Port, i);
discovery_active = 1;
}
}
if (discovery_active) {
rc = -EAGAIN;
goto out;
}
/* read sas_iounit page 1 */
sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (ioc->sas_hba.num_phys *
sizeof(Mpi2SasIOUnit1PhyData_t));
sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg1) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
rc = -ENOMEM;
goto out;
}
if ((mpt3sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
sas_iounit_pg1, sz))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
rc = -ENXIO;
goto out;
}
ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
MPI2_IOCSTATUS_MASK;
if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
rc = -EIO;
goto out;
}
/* copy Port/PortFlags/PhyFlags from page 0 */
for (i = 0; i < ioc->sas_hba.num_phys ; i++) {
sas_iounit_pg1->PhyData[i].Port =
sas_iounit_pg0->PhyData[i].Port;
sas_iounit_pg1->PhyData[i].PortFlags =
(sas_iounit_pg0->PhyData[i].PortFlags &
MPI2_SASIOUNIT0_PORTFLAGS_AUTO_PORT_CONFIG);
sas_iounit_pg1->PhyData[i].PhyFlags =
(sas_iounit_pg0->PhyData[i].PhyFlags &
(MPI2_SASIOUNIT0_PHYFLAGS_ZONING_ENABLED +
MPI2_SASIOUNIT0_PHYFLAGS_PHY_DISABLED));
}
if (enable)
sas_iounit_pg1->PhyData[phy->number].PhyFlags
&= ~MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE;
else
sas_iounit_pg1->PhyData[phy->number].PhyFlags
|= MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE;
mpt3sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1, sz);
/* link reset */
if (enable)
_transport_phy_reset(phy, 0);
out:
kfree(sas_iounit_pg1);
kfree(sas_iounit_pg0);
return rc;
}
/**
* _transport_phy_speed - set phy min/max link rates
* @phy: The sas phy object
* @rates: rates defined in sas_phy_linkrates
*
* Only support sas_host direct attached phys.
* Returns 0 for success, non-zero for failure.
*/
static int
_transport_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
{
struct MPT3SAS_ADAPTER *ioc = phy_to_ioc(phy);
Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
Mpi2SasPhyPage0_t phy_pg0;
Mpi2ConfigReply_t mpi_reply;
u16 ioc_status;
u16 sz;
int i;
int rc = 0;
unsigned long flags;
spin_lock_irqsave(&ioc->sas_node_lock, flags);
if (_transport_sas_node_find_by_sas_address(ioc,
phy->identify.sas_address) == NULL) {
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
return -EINVAL;
}
spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
if (!rates->minimum_linkrate)
rates->minimum_linkrate = phy->minimum_linkrate;
else if (rates->minimum_linkrate < phy->minimum_linkrate_hw)
rates->minimum_linkrate = phy->minimum_linkrate_hw;
if (!rates->maximum_linkrate)
rates->maximum_linkrate = phy->maximum_linkrate;
else if (rates->maximum_linkrate > phy->maximum_linkrate_hw)
rates->maximum_linkrate = phy->maximum_linkrate_hw;
/* handle expander phys */
if (phy->identify.sas_address != ioc->sas_hba.sas_address) {
phy->minimum_linkrate = rates->minimum_linkrate;
phy->maximum_linkrate = rates->maximum_linkrate;
return _transport_expander_phy_control(ioc, phy,
SMP_PHY_CONTROL_LINK_RESET);
}
/* handle hba phys */
/* sas_iounit page 1 */
sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (ioc->sas_hba.num_phys *
sizeof(Mpi2SasIOUnit1PhyData_t));
sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg1) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
rc = -ENOMEM;
goto out;
}
if ((mpt3sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
sas_iounit_pg1, sz))) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
rc = -ENXIO;
goto out;
}
ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
MPI2_IOCSTATUS_MASK;
if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
rc = -EIO;
goto out;
}
for (i = 0; i < ioc->sas_hba.num_phys; i++) {
if (phy->number != i) {
sas_iounit_pg1->PhyData[i].MaxMinLinkRate =
(ioc->sas_hba.phy[i].phy->minimum_linkrate +
(ioc->sas_hba.phy[i].phy->maximum_linkrate << 4));
} else {
sas_iounit_pg1->PhyData[i].MaxMinLinkRate =
(rates->minimum_linkrate +
(rates->maximum_linkrate << 4));
}
}
if (mpt3sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
sz)) {
pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
rc = -ENXIO;
goto out;
}
/* link reset */
_transport_phy_reset(phy, 0);
/* read phy page 0, then update the rates in the sas transport phy */
if (!mpt3sas_config_get_phy_pg0(ioc, &mpi_reply, &phy_pg0,
phy->number)) {
phy->minimum_linkrate = _transport_convert_phy_link_rate(
phy_pg0.ProgrammedLinkRate & MPI2_SAS_PRATE_MIN_RATE_MASK);
phy->maximum_linkrate = _transport_convert_phy_link_rate(
phy_pg0.ProgrammedLinkRate >> 4);
phy->negotiated_linkrate = _transport_convert_phy_link_rate(
phy_pg0.NegotiatedLinkRate &
MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL);
}
out:
kfree(sas_iounit_pg1);
return rc;
}
/**
* _transport_smp_handler - transport portal for smp passthru
* @shost: shost object
* @rphy: sas transport rphy object
* @req:
*
* This used primarily for smp_utils.
* Example:
* smp_rep_general /sys/class/bsg/expander-5:0
*/
static int
_transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
struct request *req)
{
struct MPT3SAS_ADAPTER *ioc = shost_priv(shost);
Mpi2SmpPassthroughRequest_t *mpi_request;
Mpi2SmpPassthroughReply_t *mpi_reply;
int rc, i;
u16 smid;
u32 ioc_state;
unsigned long timeleft;
void *psge;
u8 issue_reset = 0;
dma_addr_t dma_addr_in = 0;
dma_addr_t dma_addr_out = 0;
dma_addr_t pci_dma_in = 0;
dma_addr_t pci_dma_out = 0;
void *pci_addr_in = NULL;
void *pci_addr_out = NULL;
u16 wait_state_count;
struct request *rsp = req->next_rq;
struct bio_vec *bvec = NULL;
if (!rsp) {
pr_err(MPT3SAS_FMT "%s: the smp response space is missing\n",
ioc->name, __func__);
return -EINVAL;
}
if (ioc->shost_recovery || ioc->pci_error_recovery) {
pr_info(MPT3SAS_FMT "%s: host reset in progress!\n",
__func__, ioc->name);
return -EFAULT;
}
rc = mutex_lock_interruptible(&ioc->transport_cmds.mutex);
if (rc)
return rc;
if (ioc->transport_cmds.status != MPT3_CMD_NOT_USED) {
pr_err(MPT3SAS_FMT "%s: transport_cmds in use\n", ioc->name,
__func__);
rc = -EAGAIN;
goto out;
}
ioc->transport_cmds.status = MPT3_CMD_PENDING;
/* Check if the request is split across multiple segments */
if (req->bio->bi_vcnt > 1) {
u32 offset = 0;
/* Allocate memory and copy the request */
pci_addr_out = pci_alloc_consistent(ioc->pdev,
blk_rq_bytes(req), &pci_dma_out);
if (!pci_addr_out) {
pr_info(MPT3SAS_FMT "%s(): PCI Addr out = NULL\n",
ioc->name, __func__);
rc = -ENOMEM;
goto out;
}
bio_for_each_segment(bvec, req->bio, i) {
memcpy(pci_addr_out + offset,
page_address(bvec->bv_page) + bvec->bv_offset,
bvec->bv_len);
offset += bvec->bv_len;
}
} else {
dma_addr_out = pci_map_single(ioc->pdev, bio_data(req->bio),
blk_rq_bytes(req), PCI_DMA_BIDIRECTIONAL);
if (!dma_addr_out) {
pr_info(MPT3SAS_FMT "%s(): DMA Addr out = NULL\n",
ioc->name, __func__);
rc = -ENOMEM;
goto free_pci;
}
}
/* Check if the response needs to be populated across
* multiple segments */
if (rsp->bio->bi_vcnt > 1) {
pci_addr_in = pci_alloc_consistent(ioc->pdev, blk_rq_bytes(rsp),
&pci_dma_in);
if (!pci_addr_in) {
pr_info(MPT3SAS_FMT "%s(): PCI Addr in = NULL\n",
ioc->name, __func__);
rc = -ENOMEM;
goto unmap;
}
} else {
dma_addr_in = pci_map_single(ioc->pdev, bio_data(rsp->bio),
blk_rq_bytes(rsp), PCI_DMA_BIDIRECTIONAL);
if (!dma_addr_in) {
pr_info(MPT3SAS_FMT "%s(): DMA Addr in = NULL\n",
ioc->name, __func__);
rc = -ENOMEM;
goto unmap;
}
}
wait_state_count = 0;
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
if (wait_state_count++ == 10) {
pr_err(MPT3SAS_FMT
"%s: failed due to ioc not operational\n",
ioc->name, __func__);
rc = -EFAULT;
goto unmap;
}
ssleep(1);
ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
pr_info(MPT3SAS_FMT
"%s: waiting for operational state(count=%d)\n",
ioc->name, __func__, wait_state_count);
}
if (wait_state_count)
pr_info(MPT3SAS_FMT "%s: ioc is operational\n",
ioc->name, __func__);
smid = mpt3sas_base_get_smid(ioc, ioc->transport_cb_idx);
if (!smid) {
pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
ioc->name, __func__);
rc = -EAGAIN;
goto unmap;
}
rc = 0;
mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
ioc->transport_cmds.smid = smid;
memset(mpi_request, 0, sizeof(Mpi2SmpPassthroughRequest_t));
mpi_request->Function = MPI2_FUNCTION_SMP_PASSTHROUGH;
mpi_request->PhysicalPort = 0xFF;
mpi_request->SASAddress = (rphy) ?
cpu_to_le64(rphy->identify.sas_address) :
cpu_to_le64(ioc->sas_hba.sas_address);
mpi_request->RequestDataLength = cpu_to_le16(blk_rq_bytes(req) - 4);
psge = &mpi_request->SGL;
if (req->bio->bi_vcnt > 1)
ioc->build_sg(ioc, psge, pci_dma_out, (blk_rq_bytes(req) - 4),
pci_dma_in, (blk_rq_bytes(rsp) + 4));
else
ioc->build_sg(ioc, psge, dma_addr_out, (blk_rq_bytes(req) - 4),
dma_addr_in, (blk_rq_bytes(rsp) + 4));
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"%s - sending smp request\n", ioc->name, __func__));
init_completion(&ioc->transport_cmds.done);
mpt3sas_base_put_smid_default(ioc, smid);
timeleft = wait_for_completion_timeout(&ioc->transport_cmds.done,
10*HZ);
if (!(ioc->transport_cmds.status & MPT3_CMD_COMPLETE)) {
pr_err(MPT3SAS_FMT "%s : timeout\n",
__func__, ioc->name);
_debug_dump_mf(mpi_request,
sizeof(Mpi2SmpPassthroughRequest_t)/4);
if (!(ioc->transport_cmds.status & MPT3_CMD_RESET))
issue_reset = 1;
goto issue_host_reset;
}
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"%s - complete\n", ioc->name, __func__));
if (ioc->transport_cmds.status & MPT3_CMD_REPLY_VALID) {
mpi_reply = ioc->transport_cmds.reply;
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"%s - reply data transfer size(%d)\n",
ioc->name, __func__,
le16_to_cpu(mpi_reply->ResponseDataLength)));
memcpy(req->sense, mpi_reply, sizeof(*mpi_reply));
req->sense_len = sizeof(*mpi_reply);
req->resid_len = 0;
rsp->resid_len -=
le16_to_cpu(mpi_reply->ResponseDataLength);
/* check if the resp needs to be copied from the allocated
* pci mem */
if (rsp->bio->bi_vcnt > 1) {
u32 offset = 0;
u32 bytes_to_copy =
le16_to_cpu(mpi_reply->ResponseDataLength);
bio_for_each_segment(bvec, rsp->bio, i) {
if (bytes_to_copy <= bvec->bv_len) {
memcpy(page_address(bvec->bv_page) +
bvec->bv_offset, pci_addr_in +
offset, bytes_to_copy);
break;
} else {
memcpy(page_address(bvec->bv_page) +
bvec->bv_offset, pci_addr_in +
offset, bvec->bv_len);
bytes_to_copy -= bvec->bv_len;
}
offset += bvec->bv_len;
}
}
} else {
dtransportprintk(ioc, pr_info(MPT3SAS_FMT
"%s - no reply\n", ioc->name, __func__));
rc = -ENXIO;
}
issue_host_reset:
if (issue_reset) {
mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
FORCE_BIG_HAMMER);
rc = -ETIMEDOUT;
}
unmap:
if (dma_addr_out)
pci_unmap_single(ioc->pdev, dma_addr_out, blk_rq_bytes(req),
PCI_DMA_BIDIRECTIONAL);
if (dma_addr_in)
pci_unmap_single(ioc->pdev, dma_addr_in, blk_rq_bytes(rsp),
PCI_DMA_BIDIRECTIONAL);
free_pci:
if (pci_addr_out)
pci_free_consistent(ioc->pdev, blk_rq_bytes(req), pci_addr_out,
pci_dma_out);
if (pci_addr_in)
pci_free_consistent(ioc->pdev, blk_rq_bytes(rsp), pci_addr_in,
pci_dma_in);
out:
ioc->transport_cmds.status = MPT3_CMD_NOT_USED;
mutex_unlock(&ioc->transport_cmds.mutex);
return rc;
}
struct sas_function_template mpt3sas_transport_functions = {
.get_linkerrors = _transport_get_linkerrors,
.get_enclosure_identifier = _transport_get_enclosure_identifier,
.get_bay_identifier = _transport_get_bay_identifier,
.phy_reset = _transport_phy_reset,
.phy_enable = _transport_phy_enable,
.set_phy_speed = _transport_phy_speed,
.smp_handler = _transport_smp_handler,
};
struct scsi_transport_template *mpt3sas_transport_template;
drivers/scsi/mpt3sas/mpt3sas_trigger_diag.c 0 → 100644
View file @ f92363d1
/*
* This module provides common API to set Diagnostic trigger for MPT
* (Message Passing Technology) based controllers
*
* This code is based on drivers/scsi/mpt3sas/mpt3sas_trigger_diag.c
* Copyright (C) 2012 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* NO WARRANTY
* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
* solely responsible for determining the appropriateness of using and
* distributing the Program and assumes all risks associated with its
* exercise of rights under this Agreement, including but not limited to
* the risks and costs of program errors, damage to or loss of data,
* programs or equipment, and unavailability or interruption of operations.
* DISCLAIMER OF LIABILITY
* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
* USA.
*/
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/compat.h>
#include <linux/poll.h>
#include <linux/io.h>
#include <linux/uaccess.h>
#include "mpt3sas_base.h"
/**
* _mpt3sas_raise_sigio - notifiy app
* @ioc: per adapter object
* @event_data:
*/
static void
_mpt3sas_raise_sigio(struct MPT3SAS_ADAPTER *ioc,
struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data)
{
Mpi2EventNotificationReply_t *mpi_reply;
u16 sz, event_data_sz;
unsigned long flags;
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n",
ioc->name, __func__));
sz = offsetof(Mpi2EventNotificationReply_t, EventData) +
sizeof(struct SL_WH_TRIGGERS_EVENT_DATA_T) + 4;
mpi_reply = kzalloc(sz, GFP_KERNEL);
if (!mpi_reply)
goto out;
mpi_reply->Event = cpu_to_le16(MPI3_EVENT_DIAGNOSTIC_TRIGGER_FIRED);
event_data_sz = (sizeof(struct SL_WH_TRIGGERS_EVENT_DATA_T) + 4) / 4;
mpi_reply->EventDataLength = cpu_to_le16(event_data_sz);
memcpy(&mpi_reply->EventData, event_data,
sizeof(struct SL_WH_TRIGGERS_EVENT_DATA_T));
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: add to driver event log\n",
ioc->name, __func__));
mpt3sas_ctl_add_to_event_log(ioc, mpi_reply);
kfree(mpi_reply);
out:
/* clearing the diag_trigger_active flag */
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: clearing diag_trigger_active flag\n",
ioc->name, __func__));
ioc->diag_trigger_active = 0;
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
__func__));
}
/**
* mpt3sas_process_trigger_data - process the event data for the trigger
* @ioc: per adapter object
* @event_data:
*/
void
mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data)
{
u8 issue_reset = 0;
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n",
ioc->name, __func__));
/* release the diag buffer trace */
if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_RELEASED) == 0) {
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: release trace diag buffer\n", ioc->name, __func__));
mpt3sas_send_diag_release(ioc, MPI2_DIAG_BUF_TYPE_TRACE,
&issue_reset);
}
_mpt3sas_raise_sigio(ioc, event_data);
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
__func__));
}
/**
* mpt3sas_trigger_master - Master trigger handler
* @ioc: per adapter object
* @trigger_bitmask:
*
*/
void
mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc, u32 trigger_bitmask)
{
struct SL_WH_TRIGGERS_EVENT_DATA_T event_data;
unsigned long flags;
u8 found_match = 0;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
if (trigger_bitmask & MASTER_TRIGGER_FW_FAULT ||
trigger_bitmask & MASTER_TRIGGER_ADAPTER_RESET)
goto by_pass_checks;
/* check to see if trace buffers are currently registered */
if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return;
}
/* check to see if trace buffers are currently released */
if (ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_RELEASED) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return;
}
by_pass_checks:
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: enter - trigger_bitmask = 0x%08x\n",
ioc->name, __func__, trigger_bitmask));
/* don't send trigger if an trigger is currently active */
if (ioc->diag_trigger_active) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
goto out;
}
/* check for the trigger condition */
if (ioc->diag_trigger_master.MasterData & trigger_bitmask) {
found_match = 1;
ioc->diag_trigger_active = 1;
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: setting diag_trigger_active flag\n",
ioc->name, __func__));
}
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
if (!found_match)
goto out;
memset(&event_data, 0, sizeof(struct SL_WH_TRIGGERS_EVENT_DATA_T));
event_data.trigger_type = MPT3SAS_TRIGGER_MASTER;
event_data.u.master.MasterData = trigger_bitmask;
if (trigger_bitmask & MASTER_TRIGGER_FW_FAULT ||
trigger_bitmask & MASTER_TRIGGER_ADAPTER_RESET)
_mpt3sas_raise_sigio(ioc, &event_data);
else
mpt3sas_send_trigger_data_event(ioc, &event_data);
out:
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
__func__));
}
/**
* mpt3sas_trigger_event - Event trigger handler
* @ioc: per adapter object
* @event:
* @log_entry_qualifier:
*
*/
void
mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
u16 log_entry_qualifier)
{
struct SL_WH_TRIGGERS_EVENT_DATA_T event_data;
struct SL_WH_EVENT_TRIGGER_T *event_trigger;
int i;
unsigned long flags;
u8 found_match;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
/* check to see if trace buffers are currently registered */
if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return;
}
/* check to see if trace buffers are currently released */
if (ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_RELEASED) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return;
}
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: enter - event = 0x%04x, log_entry_qualifier = 0x%04x\n",
ioc->name, __func__, event, log_entry_qualifier));
/* don't send trigger if an trigger is currently active */
if (ioc->diag_trigger_active) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
goto out;
}
/* check for the trigger condition */
event_trigger = ioc->diag_trigger_event.EventTriggerEntry;
for (i = 0 , found_match = 0; i < ioc->diag_trigger_event.ValidEntries
&& !found_match; i++, event_trigger++) {
if (event_trigger->EventValue != event)
continue;
if (event == MPI2_EVENT_LOG_ENTRY_ADDED) {
if (event_trigger->LogEntryQualifier ==
log_entry_qualifier)
found_match = 1;
continue;
}
found_match = 1;
ioc->diag_trigger_active = 1;
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: setting diag_trigger_active flag\n",
ioc->name, __func__));
}
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
if (!found_match)
goto out;
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: setting diag_trigger_active flag\n",
ioc->name, __func__));
memset(&event_data, 0, sizeof(struct SL_WH_TRIGGERS_EVENT_DATA_T));
event_data.trigger_type = MPT3SAS_TRIGGER_EVENT;
event_data.u.event.EventValue = event;
event_data.u.event.LogEntryQualifier = log_entry_qualifier;
mpt3sas_send_trigger_data_event(ioc, &event_data);
out:
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
__func__));
}
/**
* mpt3sas_trigger_scsi - SCSI trigger handler
* @ioc: per adapter object
* @sense_key:
* @asc:
* @ascq:
*
*/
void
mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key, u8 asc,
u8 ascq)
{
struct SL_WH_TRIGGERS_EVENT_DATA_T event_data;
struct SL_WH_SCSI_TRIGGER_T *scsi_trigger;
int i;
unsigned long flags;
u8 found_match;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
/* check to see if trace buffers are currently registered */
if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return;
}
/* check to see if trace buffers are currently released */
if (ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_RELEASED) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return;
}
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: enter - sense_key = 0x%02x, asc = 0x%02x, ascq = 0x%02x\n",
ioc->name, __func__, sense_key, asc, ascq));
/* don't send trigger if an trigger is currently active */
if (ioc->diag_trigger_active) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
goto out;
}
/* check for the trigger condition */
scsi_trigger = ioc->diag_trigger_scsi.SCSITriggerEntry;
for (i = 0 , found_match = 0; i < ioc->diag_trigger_scsi.ValidEntries
&& !found_match; i++, scsi_trigger++) {
if (scsi_trigger->SenseKey != sense_key)
continue;
if (!(scsi_trigger->ASC == 0xFF || scsi_trigger->ASC == asc))
continue;
if (!(scsi_trigger->ASCQ == 0xFF || scsi_trigger->ASCQ == ascq))
continue;
found_match = 1;
ioc->diag_trigger_active = 1;
}
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
if (!found_match)
goto out;
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: setting diag_trigger_active flag\n",
ioc->name, __func__));
memset(&event_data, 0, sizeof(struct SL_WH_TRIGGERS_EVENT_DATA_T));
event_data.trigger_type = MPT3SAS_TRIGGER_SCSI;
event_data.u.scsi.SenseKey = sense_key;
event_data.u.scsi.ASC = asc;
event_data.u.scsi.ASCQ = ascq;
mpt3sas_send_trigger_data_event(ioc, &event_data);
out:
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
__func__));
}
/**
* mpt3sas_trigger_mpi - MPI trigger handler
* @ioc: per adapter object
* @ioc_status:
* @loginfo:
*
*/
void
mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status, u32 loginfo)
{
struct SL_WH_TRIGGERS_EVENT_DATA_T event_data;
struct SL_WH_MPI_TRIGGER_T *mpi_trigger;
int i;
unsigned long flags;
u8 found_match;
spin_lock_irqsave(&ioc->diag_trigger_lock, flags);
/* check to see if trace buffers are currently registered */
if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_REGISTERED) == 0) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return;
}
/* check to see if trace buffers are currently released */
if (ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
MPT3_DIAG_BUFFER_IS_RELEASED) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
return;
}
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: enter - ioc_status = 0x%04x, loginfo = 0x%08x\n",
ioc->name, __func__, ioc_status, loginfo));
/* don't send trigger if an trigger is currently active */
if (ioc->diag_trigger_active) {
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
goto out;
}
/* check for the trigger condition */
mpi_trigger = ioc->diag_trigger_mpi.MPITriggerEntry;
for (i = 0 , found_match = 0; i < ioc->diag_trigger_mpi.ValidEntries
&& !found_match; i++, mpi_trigger++) {
if (mpi_trigger->IOCStatus != ioc_status)
continue;
if (!(mpi_trigger->IocLogInfo == 0xFFFFFFFF ||
mpi_trigger->IocLogInfo == loginfo))
continue;
found_match = 1;
ioc->diag_trigger_active = 1;
}
spin_unlock_irqrestore(&ioc->diag_trigger_lock, flags);
if (!found_match)
goto out;
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT
"%s: setting diag_trigger_active flag\n",
ioc->name, __func__));
memset(&event_data, 0, sizeof(struct SL_WH_TRIGGERS_EVENT_DATA_T));
event_data.trigger_type = MPT3SAS_TRIGGER_MPI;
event_data.u.mpi.IOCStatus = ioc_status;
event_data.u.mpi.IocLogInfo = loginfo;
mpt3sas_send_trigger_data_event(ioc, &event_data);
out:
dTriggerDiagPrintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
__func__));
}
drivers/scsi/mpt3sas/mpt3sas_trigger_diag.h 0 → 100644
View file @ f92363d1
/*
* This is the Fusion MPT base driver providing common API layer interface
* to set Diagnostic triggers for MPT (Message Passing Technology) based
* controllers
*
* This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
* Copyright (C) 2012 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* NO WARRANTY
* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
* solely responsible for determining the appropriateness of using and
* distributing the Program and assumes all risks associated with its
* exercise of rights under this Agreement, including but not limited to
* the risks and costs of program errors, damage to or loss of data,
* programs or equipment, and unavailability or interruption of operations.
* DISCLAIMER OF LIABILITY
* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
* USA.
*/
/* Diagnostic Trigger Configuration Data Structures */
#ifndef MPT3SAS_TRIGGER_DIAG_H_INCLUDED
#define MPT3SAS_TRIGGER_DIAG_H_INCLUDED
/* limitation on number of entries */
#define NUM_VALID_ENTRIES (20)
/* trigger types */
#define MPT3SAS_TRIGGER_MASTER (1)
#define MPT3SAS_TRIGGER_EVENT (2)
#define MPT3SAS_TRIGGER_SCSI (3)
#define MPT3SAS_TRIGGER_MPI (4)
/* trigger names */
#define MASTER_TRIGGER_FILE_NAME "diag_trigger_master"
#define EVENT_TRIGGERS_FILE_NAME "diag_trigger_event"
#define SCSI_TRIGGERS_FILE_NAME "diag_trigger_scsi"
#define MPI_TRIGGER_FILE_NAME "diag_trigger_mpi"
/* master trigger bitmask */
#define MASTER_TRIGGER_FW_FAULT (0x00000001)
#define MASTER_TRIGGER_ADAPTER_RESET (0x00000002)
#define MASTER_TRIGGER_TASK_MANAGMENT (0x00000004)
#define MASTER_TRIGGER_DEVICE_REMOVAL (0x00000008)
/* fake firmware event for tigger */
#define MPI3_EVENT_DIAGNOSTIC_TRIGGER_FIRED (0x6E)
/**
* MasterTrigger is a single U32 passed to/from sysfs.
*
* Bit Flags (enables) include:
* 1. FW Faults
* 2. Adapter Reset issued by driver
* 3. TMs
* 4. Device Remove Event sent by FW
*/
struct SL_WH_MASTER_TRIGGER_T {
uint32_t MasterData;
};
/**
* struct SL_WH_EVENT_TRIGGER_T - Definition of an event trigger element
* @EventValue: Event Code to trigger on
* @LogEntryQualifier: Type of FW event that logged (Log Entry Added Event only)
*
* Defines an event that should induce a DIAG_TRIGGER driver event if observed.
*/
struct SL_WH_EVENT_TRIGGER_T {
uint16_t EventValue;
uint16_t LogEntryQualifier;
};
/**
* struct SL_WH_EVENT_TRIGGERS_T - Structure passed to/from sysfs containing a
* list of Event Triggers to be monitored for.
* @ValidEntries: Number of _SL_WH_EVENT_TRIGGER_T structures contained in this
* structure.
* @EventTriggerEntry: List of Event trigger elements.
*
* This binary structure is transferred via sysfs to get/set Event Triggers
* in the Linux Driver.
*/
struct SL_WH_EVENT_TRIGGERS_T {
uint32_t ValidEntries;
struct SL_WH_EVENT_TRIGGER_T EventTriggerEntry[NUM_VALID_ENTRIES];
};
/**
* struct SL_WH_SCSI_TRIGGER_T - Definition of a SCSI trigger element
* @ASCQ: Additional Sense Code Qualifier. Can be specific or 0xFF for
* wildcard.
* @ASC: Additional Sense Code. Can be specific or 0xFF for wildcard
* @SenseKey: SCSI Sense Key
*
* Defines a sense key (single or many variants) that should induce a
* DIAG_TRIGGER driver event if observed.
*/
struct SL_WH_SCSI_TRIGGER_T {
U8 ASCQ;
U8 ASC;
U8 SenseKey;
U8 Reserved;
};
/**
* struct SL_WH_SCSI_TRIGGERS_T - Structure passed to/from sysfs containing a
* list of SCSI sense codes that should trigger a DIAG_SERVICE event when
* observed.
* @ValidEntries: Number of _SL_WH_SCSI_TRIGGER_T structures contained in this
* structure.
* @SCSITriggerEntry: List of SCSI Sense Code trigger elements.
*
* This binary structure is transferred via sysfs to get/set SCSI Sense Code
* Triggers in the Linux Driver.
*/
struct SL_WH_SCSI_TRIGGERS_T {
uint32_t ValidEntries;
struct SL_WH_SCSI_TRIGGER_T SCSITriggerEntry[NUM_VALID_ENTRIES];
};
/**
* struct SL_WH_MPI_TRIGGER_T - Definition of an MPI trigger element
* @IOCStatus: MPI IOCStatus
* @IocLogInfo: MPI IocLogInfo. Can be specific or 0xFFFFFFFF for wildcard
*
* Defines a MPI IOCStatus/IocLogInfo pair that should induce a DIAG_TRIGGER
* driver event if observed.
*/
struct SL_WH_MPI_TRIGGER_T {
uint16_t IOCStatus;
uint16_t Reserved;
uint32_t IocLogInfo;
};
/**
* struct SL_WH_MPI_TRIGGERS_T - Structure passed to/from sysfs containing a
* list of MPI IOCStatus/IocLogInfo pairs that should trigger a DIAG_SERVICE
* event when observed.
* @ValidEntries: Number of _SL_WH_MPI_TRIGGER_T structures contained in this
* structure.
* @MPITriggerEntry: List of MPI IOCStatus/IocLogInfo trigger elements.
*
* This binary structure is transferred via sysfs to get/set MPI Error Triggers
* in the Linux Driver.
*/
struct SL_WH_MPI_TRIGGERS_T {
uint32_t ValidEntries;
struct SL_WH_MPI_TRIGGER_T MPITriggerEntry[NUM_VALID_ENTRIES];
};
/**
* struct SL_WH_TRIGGERS_EVENT_DATA_T - event data for trigger
* @trigger_type: trigger type (see MPT3SAS_TRIGGER_XXXX)
* @u: trigger condition that caused trigger to be sent
*/
struct SL_WH_TRIGGERS_EVENT_DATA_T {
uint32_t trigger_type;
union {
struct SL_WH_MASTER_TRIGGER_T master;
struct SL_WH_EVENT_TRIGGER_T event;
struct SL_WH_SCSI_TRIGGER_T scsi;
struct SL_WH_MPI_TRIGGER_T mpi;
} u;
};
#endif /* MPT3SAS_TRIGGER_DIAG_H_INCLUDED */
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