Commit fa5bde80 authored by Yong Zhao's avatar Yong Zhao Committed by Alex Deucher

drm/amdgpu: Use better names to reflect it is CP MQD buffer

Add "CP" to AMDGPU_GEM_CREATE_MQD_GFX9 to indicate it is only for CP MQD
buffer.
Signed-off-by: default avatarYong Zhao <Yong.Zhao@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 90f88cdd
...@@ -224,7 +224,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd) ...@@ -224,7 +224,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd)
int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size, int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
void **mem_obj, uint64_t *gpu_addr, void **mem_obj, uint64_t *gpu_addr,
void **cpu_ptr, bool mqd_gfx9) void **cpu_ptr, bool cp_mqd_gfx9)
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)kgd; struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
struct amdgpu_bo *bo = NULL; struct amdgpu_bo *bo = NULL;
...@@ -240,8 +240,8 @@ int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size, ...@@ -240,8 +240,8 @@ int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
bp.type = ttm_bo_type_kernel; bp.type = ttm_bo_type_kernel;
bp.resv = NULL; bp.resv = NULL;
if (mqd_gfx9) if (cp_mqd_gfx9)
bp.flags |= AMDGPU_GEM_CREATE_MQD_GFX9; bp.flags |= AMDGPU_GEM_CREATE_CP_MQD_GFX9;
r = amdgpu_bo_create(adev, &bp, &bo); r = amdgpu_bo_create(adev, &bp, &bo);
if (r) { if (r) {
......
...@@ -1028,7 +1028,7 @@ int amdgpu_ttm_gart_bind(struct amdgpu_device *adev, ...@@ -1028,7 +1028,7 @@ int amdgpu_ttm_gart_bind(struct amdgpu_device *adev,
struct amdgpu_ttm_tt *gtt = (void *)ttm; struct amdgpu_ttm_tt *gtt = (void *)ttm;
int r; int r;
if (abo->flags & AMDGPU_GEM_CREATE_MQD_GFX9) { if (abo->flags & AMDGPU_GEM_CREATE_CP_MQD_GFX9) {
uint64_t page_idx = 1; uint64_t page_idx = 1;
r = amdgpu_gart_bind(adev, gtt->offset, page_idx, r = amdgpu_gart_bind(adev, gtt->offset, page_idx,
...@@ -1036,7 +1036,10 @@ int amdgpu_ttm_gart_bind(struct amdgpu_device *adev, ...@@ -1036,7 +1036,10 @@ int amdgpu_ttm_gart_bind(struct amdgpu_device *adev,
if (r) if (r)
goto gart_bind_fail; goto gart_bind_fail;
/* Patch mtype of the second part BO */ /* The memory type of the first page defaults to UC. Now
* modify the memory type to NC from the second page of
* the BO onward.
*/
flags &= ~AMDGPU_PTE_MTYPE_VG10_MASK; flags &= ~AMDGPU_PTE_MTYPE_VG10_MASK;
flags |= AMDGPU_PTE_MTYPE_VG10(AMDGPU_MTYPE_NC); flags |= AMDGPU_PTE_MTYPE_VG10(AMDGPU_MTYPE_NC);
......
...@@ -125,9 +125,10 @@ extern "C" { ...@@ -125,9 +125,10 @@ extern "C" {
/* Flag that BO sharing will be explicitly synchronized */ /* Flag that BO sharing will be explicitly synchronized */
#define AMDGPU_GEM_CREATE_EXPLICIT_SYNC (1 << 7) #define AMDGPU_GEM_CREATE_EXPLICIT_SYNC (1 << 7)
/* Flag that indicates allocating MQD gart on GFX9, where the mtype /* Flag that indicates allocating MQD gart on GFX9, where the mtype
* for the second page onward should be set to NC. * for the second page onward should be set to NC. It should never
* be used by user space applications.
*/ */
#define AMDGPU_GEM_CREATE_MQD_GFX9 (1 << 8) #define AMDGPU_GEM_CREATE_CP_MQD_GFX9 (1 << 8)
/* Flag that BO may contain sensitive data that must be wiped before /* Flag that BO may contain sensitive data that must be wiped before
* releasing the memory * releasing the memory
*/ */
......
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