Commit fb0bbfda authored by Martin Dalecki's avatar Martin Dalecki Committed by Jens Axboe

[PATCH] 2.5.14 IDE 55

 - Update HPT374 driver carried over from 2.4.xx series by Andrew Morton.
   Resync it with the recent host chip driver changes, or better the
   introduction of an API at all.

 - Consolidate the handling of device ID byte order in one place.
   This was spotted and patched by Bartomiej onierkiewicz.

 - Eliminate CONFIG_BLK_DEV_IDEPCI - it's duplicating the functionality of the
   already present and fine CONFIG_PCI flag and if we are a PCI host, we are
   indeed very likely to need host chip support anyway.

 - Remove some redundant info about the model and channel number from
   /proc/ide. Remove the binary entries not helpful to the user, and not used
   by any program and redundant to corresponding ioctls.

 - Properly return udma_read and udma_write values in taskfile.

 - Only initialize XXX_udma to the default handlers if it has not been
   initialized by the host chip initialization.

I have enabled spin lock debugging and can see that on device
flush the spin locks get wrong counts... no problems elsewher ethus
far. I will re check them next time around.
parent 45bfe840
......@@ -245,7 +245,6 @@ CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
......
......@@ -403,7 +403,6 @@ CONFIG_IDEDISK_MULTI_MODE=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_BLK_DEV_OFFBOARD=y
......
......@@ -454,7 +454,6 @@ CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
......
......@@ -432,7 +432,6 @@ CONFIG_BLK_DEV_IDEFLOPPY=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_BLK_DEV_SL82C105 is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
......
......@@ -254,7 +254,6 @@ CONFIG_BLK_DEV_CMD640=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
CONFIG_BLK_DEV_RZ1000=y
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
......
......@@ -226,7 +226,6 @@ CONFIG_BLK_DEV_IDESCSI=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
......
......@@ -205,7 +205,6 @@ CONFIG_BLK_DEV_IDEFLOPPY=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_BLK_DEV_ADMA=y
......
......@@ -205,7 +205,6 @@ CONFIG_BLK_DEV_IDEFLOPPY=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_BLK_DEV_ADMA=y
......
......@@ -161,7 +161,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -161,7 +161,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -156,7 +156,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -156,7 +156,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -169,7 +169,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -226,7 +226,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -228,7 +228,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -226,7 +226,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -226,7 +226,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -162,7 +162,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -161,7 +161,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -161,7 +161,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -226,7 +226,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -228,7 +228,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -169,7 +169,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -226,7 +226,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
......
......@@ -221,7 +221,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
# CONFIG_BLK_DEV_IDEDMA_PCI is not set
# CONFIG_BLK_DEV_OFFBOARD is not set
......
......@@ -286,7 +286,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
......
......@@ -256,7 +256,6 @@ CONFIG_BLK_DEV_IDESCSI=m
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_BLK_DEV_SL82C105 is not set
CONFIG_BLK_DEV_GAYLE=y
CONFIG_BLK_DEV_IDEDOUBLER=y
......
......@@ -249,7 +249,6 @@ CONFIG_BLK_DEV_IDESCSI=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
......@@ -282,7 +281,6 @@ CONFIG_BLK_DEV_IDE_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO=y
CONFIG_BLK_DEV_IDEDMA=y
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
......
......@@ -214,7 +214,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_BLK_DEV_SL82C105 is not set
CONFIG_BLK_DEV_CPCI405_IDE=y
# CONFIG_IDE_CHIPSETS is not set
......
......@@ -232,7 +232,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
......
......@@ -236,7 +236,6 @@ CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
# CONFIG_BLK_DEV_IDEDMA_PCI is not set
# CONFIG_BLK_DEV_OFFBOARD is not set
......
......@@ -230,7 +230,6 @@ CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
# CONFIG_BLK_DEV_IDEDMA_PCI is not set
# CONFIG_BLK_DEV_OFFBOARD is not set
......
......@@ -239,7 +239,6 @@ CONFIG_BLK_DEV_IDESCSI=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
......@@ -272,7 +271,6 @@ CONFIG_BLK_DEV_IDE_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO=y
CONFIG_BLK_DEV_IDEDMA=y
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
......
......@@ -243,7 +243,6 @@ CONFIG_BLK_DEV_IDESCSI=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
......
......@@ -206,7 +206,6 @@ CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
......
......@@ -249,7 +249,6 @@ CONFIG_BLK_DEV_IDESCSI=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
......@@ -282,7 +281,6 @@ CONFIG_BLK_DEV_IDE_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO=y
CONFIG_BLK_DEV_IDEDMA=y
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
......
......@@ -256,7 +256,7 @@ ppc4xx_progress(char *s, unsigned short hex)
* IDE stuff.
* should be generic for every IDE PCI chipset
*/
#if defined(CONFIG_BLK_DEV_IDEPCI)
#ifdef CONFIG_PCI
static void
ppc4xx_ide_init_hwif_ports(hw_regs_t * hw, ide_ioreg_t data_port,
ide_ioreg_t ctrl_port, int *irq)
......@@ -376,7 +376,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
** defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
*/
#ifdef CONFIG_IDE
# if defined(CONFIG_BLK_DEV_IDEPCI)
# if defined(CONFIG_PCI)
ppc_ide_md.ide_init_hwif = ppc4xx_ide_init_hwif_ports;
# elif defined (CONFIG_DMA_NONPCI) /* ON board IDE */
ppc_ide_md.default_irq = nonpci_ide_default_irq;
......
......@@ -57,7 +57,6 @@
/* Tell string.h we don't want memcpy etc. as cpp defines */
#define EXPORT_SYMTAB_STROPS
extern void ppc_generic_ide_fix_driveid(struct hd_driveid *id);
extern void transfer_to_handler(void);
extern void do_syscall_trace(void);
extern void do_IRQ(struct pt_regs *regs);
......@@ -173,7 +172,6 @@ EXPORT_SYMBOL(iounmap);
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
EXPORT_SYMBOL(ppc_ide_md);
EXPORT_SYMBOL(ppc_generic_ide_fix_driveid);
#endif
#ifdef CONFIG_PCI
......
......@@ -616,100 +616,3 @@ void __init setup_arch(char **cmdline_p)
/* this is for modules since _machine can be a define -- Cort */
ppc_md.ppc_machine = _machine;
}
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
/* Convert the shorts/longs in hd_driveid from little to big endian;
* chars are endian independant, of course, but strings need to be flipped.
* (Despite what it says in drivers/block/ide.h, they come up as little
* endian...)
*
* Changes to linux/hdreg.h may require changes here. */
void ppc_generic_ide_fix_driveid(struct hd_driveid *id)
{
int i;
unsigned short *stringcast;
id->config = __le16_to_cpu(id->config);
id->cyls = __le16_to_cpu(id->cyls);
id->reserved2 = __le16_to_cpu(id->reserved2);
id->heads = __le16_to_cpu(id->heads);
id->track_bytes = __le16_to_cpu(id->track_bytes);
id->sector_bytes = __le16_to_cpu(id->sector_bytes);
id->sectors = __le16_to_cpu(id->sectors);
id->vendor0 = __le16_to_cpu(id->vendor0);
id->vendor1 = __le16_to_cpu(id->vendor1);
id->vendor2 = __le16_to_cpu(id->vendor2);
stringcast = (unsigned short *)&id->serial_no[0];
for (i = 0; i < (20/2); i++)
stringcast[i] = __le16_to_cpu(stringcast[i]);
id->buf_type = __le16_to_cpu(id->buf_type);
id->buf_size = __le16_to_cpu(id->buf_size);
id->ecc_bytes = __le16_to_cpu(id->ecc_bytes);
stringcast = (unsigned short *)&id->fw_rev[0];
for (i = 0; i < (8/2); i++)
stringcast[i] = __le16_to_cpu(stringcast[i]);
stringcast = (unsigned short *)&id->model[0];
for (i = 0; i < (40/2); i++)
stringcast[i] = __le16_to_cpu(stringcast[i]);
id->dword_io = __le16_to_cpu(id->dword_io);
id->reserved50 = __le16_to_cpu(id->reserved50);
id->field_valid = __le16_to_cpu(id->field_valid);
id->cur_cyls = __le16_to_cpu(id->cur_cyls);
id->cur_heads = __le16_to_cpu(id->cur_heads);
id->cur_sectors = __le16_to_cpu(id->cur_sectors);
id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0);
id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1);
id->lba_capacity = __le32_to_cpu(id->lba_capacity);
id->dma_1word = __le16_to_cpu(id->dma_1word);
id->dma_mword = __le16_to_cpu(id->dma_mword);
id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
id->eide_dma_min = __le16_to_cpu(id->eide_dma_min);
id->eide_dma_time = __le16_to_cpu(id->eide_dma_time);
id->eide_pio = __le16_to_cpu(id->eide_pio);
id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
for (i = 0; i < 2; i++)
id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
for (i = 0; i < 4; i++)
id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
id->queue_depth = __le16_to_cpu(id->queue_depth);
for (i = 0; i < 4; i++)
id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
id->major_rev_num = __le16_to_cpu(id->major_rev_num);
id->minor_rev_num = __le16_to_cpu(id->minor_rev_num);
id->command_set_1 = __le16_to_cpu(id->command_set_1);
id->command_set_2 = __le16_to_cpu(id->command_set_2);
id->cfsse = __le16_to_cpu(id->cfsse);
id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1);
id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2);
id->csf_default = __le16_to_cpu(id->csf_default);
id->dma_ultra = __le16_to_cpu(id->dma_ultra);
id->word89 = __le16_to_cpu(id->word89);
id->word90 = __le16_to_cpu(id->word90);
id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues);
id->word92 = __le16_to_cpu(id->word92);
id->hw_config = __le16_to_cpu(id->hw_config);
id->acoustic = __le16_to_cpu(id->acoustic);
for (i = 0; i < 5; i++)
id->words95_99[i] = __le16_to_cpu(id->words95_99[i]);
id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
for (i = 0; i < 22; i++)
id->words104_125[i] = __le16_to_cpu(id->words104_125[i]);
id->last_lun = __le16_to_cpu(id->last_lun);
id->word127 = __le16_to_cpu(id->word127);
id->dlf = __le16_to_cpu(id->dlf);
id->csfo = __le16_to_cpu(id->csfo);
for (i = 0; i < 26; i++)
id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
id->word156 = __le16_to_cpu(id->word156);
for (i = 0; i < 3; i++)
id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
id->cfa_power = __le16_to_cpu(id->cfa_power);
for (i = 0; i < 14; i++)
id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
for (i = 0; i < 31; i++)
id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
for (i = 0; i < 48; i++)
id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
id->integrity_word = __le16_to_cpu(id->integrity_word);
}
#endif
......@@ -543,95 +543,6 @@ void __init setup_arch(char **cmdline_p)
ppc_md.progress("setup_arch: exit", 0x3eab);
}
#ifdef CONFIG_IDE
/* Convert the shorts/longs in hd_driveid from little to big endian;
* chars are endian independant, of course, but strings need to be flipped.
* (Despite what it says in drivers/block/ide.h, they come up as little
* endian...)
*
* Changes to linux/hdreg.h may require changes here. */
void ppc64_ide_fix_driveid(struct hd_driveid *id)
{
int i;
unsigned short *stringcast;
id->config = __le16_to_cpu(id->config);
id->cyls = __le16_to_cpu(id->cyls);
id->reserved2 = __le16_to_cpu(id->reserved2);
id->heads = __le16_to_cpu(id->heads);
id->track_bytes = __le16_to_cpu(id->track_bytes);
id->sector_bytes = __le16_to_cpu(id->sector_bytes);
id->sectors = __le16_to_cpu(id->sectors);
id->vendor0 = __le16_to_cpu(id->vendor0);
id->vendor1 = __le16_to_cpu(id->vendor1);
id->vendor2 = __le16_to_cpu(id->vendor2);
stringcast = (unsigned short *)&id->serial_no[0];
for (i = 0; i < (20/2); i++)
stringcast[i] = __le16_to_cpu(stringcast[i]);
id->buf_type = __le16_to_cpu(id->buf_type);
id->buf_size = __le16_to_cpu(id->buf_size);
id->ecc_bytes = __le16_to_cpu(id->ecc_bytes);
stringcast = (unsigned short *)&id->fw_rev[0];
for (i = 0; i < (8/2); i++)
stringcast[i] = __le16_to_cpu(stringcast[i]);
stringcast = (unsigned short *)&id->model[0];
for (i = 0; i < (40/2); i++)
stringcast[i] = __le16_to_cpu(stringcast[i]);
id->dword_io = __le16_to_cpu(id->dword_io);
id->reserved50 = __le16_to_cpu(id->reserved50);
id->field_valid = __le16_to_cpu(id->field_valid);
id->cur_cyls = __le16_to_cpu(id->cur_cyls);
id->cur_heads = __le16_to_cpu(id->cur_heads);
id->cur_sectors = __le16_to_cpu(id->cur_sectors);
id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0);
id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1);
id->lba_capacity = __le32_to_cpu(id->lba_capacity);
id->dma_1word = __le16_to_cpu(id->dma_1word);
id->dma_mword = __le16_to_cpu(id->dma_mword);
id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
id->eide_dma_min = __le16_to_cpu(id->eide_dma_min);
id->eide_dma_time = __le16_to_cpu(id->eide_dma_time);
id->eide_pio = __le16_to_cpu(id->eide_pio);
id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
for (i = 0; i < 2; i++)
id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
for (i = 0; i < 4; i++)
id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
id->queue_depth = __le16_to_cpu(id->queue_depth);
for (i = 0; i < 4; i++)
id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
id->major_rev_num = __le16_to_cpu(id->major_rev_num);
id->minor_rev_num = __le16_to_cpu(id->minor_rev_num);
id->command_set_1 = __le16_to_cpu(id->command_set_1);
id->command_set_2 = __le16_to_cpu(id->command_set_2);
id->cfsse = __le16_to_cpu(id->cfsse);
id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1);
id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2);
id->csf_default = __le16_to_cpu(id->csf_default);
id->dma_ultra = __le16_to_cpu(id->dma_ultra);
id->word89 = __le16_to_cpu(id->word89);
id->word90 = __le16_to_cpu(id->word90);
id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues);
id->word92 = __le16_to_cpu(id->word92);
id->hw_config = __le16_to_cpu(id->hw_config);
for (i = 0; i < 32; i++)
id->words94_125[i] = __le16_to_cpu(id->words94_125[i]);
id->last_lun = __le16_to_cpu(id->last_lun);
id->word127 = __le16_to_cpu(id->word127);
id->dlf = __le16_to_cpu(id->dlf);
id->csfo = __le16_to_cpu(id->csfo);
for (i = 0; i < 26; i++)
id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
id->word156 = __le16_to_cpu(id->word156);
for (i = 0; i < 3; i++)
id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
for (i = 0; i < 96; i++)
id->words160_255[i] = __le16_to_cpu(id->words160_255[i]);
}
#endif
void exception_trace(unsigned long trap)
{
unsigned long x, srr0, srr1, reg20, reg1, reg21;
......
......@@ -282,7 +282,6 @@ CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
# CONFIG_IDEPCI_SHARE_IRQ is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
......
......@@ -205,7 +205,6 @@ CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
# CONFIG_IDEPCI_SHARE_IRQ is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
......
......@@ -216,11 +216,6 @@ CONFIG_BLK_DEV_RZ1000
Linux. This may slow disk throughput by a few percent, but at least
things will operate 100% reliably.
CONFIG_BLK_DEV_IDEPCI
Say Y here for PCI systems which use IDE drive(s).
This option helps the IDE driver to automatically detect and
configure all PCI-based IDE interfaces in your system.
CONFIG_IDEPCI_SHARE_IRQ
Some ATA/IDE chipsets have hardware support which allows for
sharing a single IRQ with other cards. To enable support for
......
......@@ -33,58 +33,55 @@ if [ "$CONFIG_BLK_DEV_IDE" != "n" ]; then
dep_tristate ' Include IDE/ATAPI FLOPPY support' CONFIG_BLK_DEV_IDEFLOPPY $CONFIG_BLK_DEV_IDE
dep_tristate ' SCSI emulation support' CONFIG_BLK_DEV_IDESCSI $CONFIG_BLK_DEV_IDE $CONFIG_SCSI
comment 'ATA host chipset support'
dep_bool ' CMD640 chipset bugfix/support' CONFIG_BLK_DEV_CMD640 $CONFIG_X86
comment 'ATA host chip set support'
dep_bool ' CMD640 chip set bugfix/support' CONFIG_BLK_DEV_CMD640 $CONFIG_X86
dep_bool ' CMD640 enhanced support' CONFIG_BLK_DEV_CMD640_ENHANCED $CONFIG_BLK_DEV_CMD640
dep_bool ' ISA-PNP support' CONFIG_BLK_DEV_ISAPNP $CONFIG_ISAPNP
if [ "$CONFIG_PCI" = "y" ]; then
dep_bool ' RZ1000 chipset bugfix/support' CONFIG_BLK_DEV_RZ1000 $CONFIG_X86
bool ' PCI host chipset support' CONFIG_BLK_DEV_IDEPCI
if [ "$CONFIG_BLK_DEV_IDEPCI" = "y" ]; then
bool ' Boot off-board chipsets first support' CONFIG_BLK_DEV_OFFBOARD
bool ' Sharing PCI ATA interrupts support' CONFIG_IDEPCI_SHARE_IRQ
bool ' Generic PCI bus-master DMA support' CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Use PCI DMA by default when available' CONFIG_IDEDMA_PCI_AUTO $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Enable DMA only for disks ' CONFIG_IDEDMA_ONLYDISK $CONFIG_IDEDMA_PCI_AUTO
define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' ATA tagged command queueing (EXPERIMENTAL)' CONFIG_BLK_DEV_IDE_TCQ $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_EXPERIMENTAL
dep_bool ' TCQ on by default' CONFIG_BLK_DEV_IDE_TCQ_DEFAULT $CONFIG_BLK_DEV_IDE_TCQ
if [ "$CONFIG_BLK_DEV_IDE_TCQ" != "n" ]; then
int ' Default queue depth' CONFIG_BLK_DEV_IDE_TCQ_DEPTH 32
fi
dep_bool ' Good-Bad DMA Model-Firmware (EXPERIMENTAL)' CONFIG_IDEDMA_NEW_DRIVE_LISTINGS $CONFIG_EXPERIMENTAL
dep_bool ' AEC62XX chipset support' CONFIG_BLK_DEV_AEC62XX $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' AEC62XX Tuning support' CONFIG_AEC62XX_TUNING $CONFIG_BLK_DEV_AEC62XX
dep_bool ' ALI M15x3 chipset support' CONFIG_BLK_DEV_ALI15X3 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' ALI M15x3 WDC support (DANGEROUS)' CONFIG_WDC_ALI15X3 $CONFIG_BLK_DEV_ALI15X3 $CONFIG_EXPERIMENTAL
dep_bool ' AMD and nVidia chipset support' CONFIG_BLK_DEV_AMD74XX $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' CMD64X chipset support' CONFIG_BLK_DEV_CMD64X $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' CY82C693 chipset support' CONFIG_BLK_DEV_CY82C693 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Cyrix CS5530 MediaGX chipset support' CONFIG_BLK_DEV_CS5530 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' HPT34X chipset support' CONFIG_BLK_DEV_HPT34X $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' HPT34X AUTODMA support (EXPERMENTAL)' CONFIG_HPT34X_AUTODMA $CONFIG_BLK_DEV_HPT34X $CONFIG_EXPERIMENTAL
dep_bool ' HPT366 chipset support' CONFIG_BLK_DEV_HPT366 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Intel and Efar (SMsC) chipset support' CONFIG_BLK_DEV_PIIX $CONFIG_BLK_DEV_IDEDMA_PCI
if [ "$CONFIG_BLK_DEV_PIIX" = "y" ]; then
dep_bool ' Use UDMA133 even on ICH2, ICH3 and CICH chips (EXPERIMENTAL)' CONFIG_BLK_DEV_PIIX_TRY133 $CONFIG_EXPERIMENTAL
fi
if [ "$CONFIG_MIPS_ITE8172" = "y" -o "$CONFIG_MIPS_IVR" = "y" ]; then
dep_mbool ' IT8172 IDE support' CONFIG_BLK_DEV_IT8172 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' IT8172 IDE Tuning support' CONFIG_IT8172_TUNING $CONFIG_BLK_DEV_IT8172 $CONFIG_IDEDMA_PCI_AUTO
fi
dep_bool ' NS87415 chipset support (EXPERIMENTAL)' CONFIG_BLK_DEV_NS87415 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' OPTi 82C621 chipset enhanced support (EXPERIMENTAL)' CONFIG_BLK_DEV_OPTI621 $CONFIG_EXPERIMENTAL
dep_mbool ' Pacific Digital A-DMA support (EXPERIMENTAL)' CONFIG_BLK_DEV_PDC_ADMA $CONFIG_EXPERIMENTAL
dep_bool ' PROMISE PDC202{46|62|65|67|68|69|70} support' CONFIG_BLK_DEV_PDC202XX $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Special UDMA Feature' CONFIG_PDC202XX_BURST $CONFIG_BLK_DEV_PDC202XX
dep_bool ' Special FastTrak Feature' CONFIG_PDC202XX_FORCE $CONFIG_BLK_DEV_PDC202XX
dep_bool ' ServerWorks OSB4/CSB5 chipsets support' CONFIG_BLK_DEV_SVWKS $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86
dep_bool ' SiS5513 chipset support' CONFIG_BLK_DEV_SIS5513 $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86
dep_bool ' Tekram TRM290 chipset support (EXPERIMENTAL)' CONFIG_BLK_DEV_TRM290 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' VIA chipset support' CONFIG_BLK_DEV_VIA82CXXX $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Winbond SL82c105 support' CONFIG_BLK_DEV_SL82C105 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' RZ1000 chip set bugfix/support' CONFIG_BLK_DEV_RZ1000 $CONFIG_X86
comment ' PCI host chip set support'
dep_bool ' Boot off-board chip sets first support' CONFIG_BLK_DEV_OFFBOARD $CONFIG_PCI
dep_bool ' Sharing PCI ATA interrupts support' CONFIG_IDEPCI_SHARE_IRQ $CONFIG_PCI
dep_bool ' Generic PCI bus-master DMA support' CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_PCI
dep_bool ' Use PCI DMA by default when available' CONFIG_IDEDMA_PCI_AUTO $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Enable DMA only for disks ' CONFIG_IDEDMA_ONLYDISK $CONFIG_IDEDMA_PCI_AUTO
define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' ATA tagged command queueing (EXPERIMENTAL)' CONFIG_BLK_DEV_IDE_TCQ $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_EXPERIMENTAL
dep_bool ' TCQ on by default' CONFIG_BLK_DEV_IDE_TCQ_DEFAULT $CONFIG_BLK_DEV_IDE_TCQ
if [ "$CONFIG_BLK_DEV_IDE_TCQ" != "n" ]; then
int ' Default queue depth' CONFIG_BLK_DEV_IDE_TCQ_DEPTH 32
fi
dep_bool ' Good-Bad DMA Model-Firmware (EXPERIMENTAL)' CONFIG_IDEDMA_NEW_DRIVE_LISTINGS $CONFIG_EXPERIMENTAL
dep_bool ' AEC62XX chip set support' CONFIG_BLK_DEV_AEC62XX $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' AEC62XX Tuning support' CONFIG_AEC62XX_TUNING $CONFIG_BLK_DEV_AEC62XX
dep_bool ' ALI M15x3 chipset support' CONFIG_BLK_DEV_ALI15X3 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' ALI M15x3 WDC support (DANGEROUS)' CONFIG_WDC_ALI15X3 $CONFIG_BLK_DEV_ALI15X3 $CONFIG_EXPERIMENTAL
dep_bool ' AMD and nVidia chipset support' CONFIG_BLK_DEV_AMD74XX $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' CMD64X chipset support' CONFIG_BLK_DEV_CMD64X $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' CY82C693 chipset support' CONFIG_BLK_DEV_CY82C693 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Cyrix CS5530 MediaGX chipset support' CONFIG_BLK_DEV_CS5530 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' HPT34X chipset support' CONFIG_BLK_DEV_HPT34X $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' HPT34X AUTODMA support (EXPERMENTAL)' CONFIG_HPT34X_AUTODMA $CONFIG_BLK_DEV_HPT34X $CONFIG_EXPERIMENTAL
dep_bool ' HPT366 chipset support' CONFIG_BLK_DEV_HPT366 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Intel and Efar (SMsC) chipset support' CONFIG_BLK_DEV_PIIX $CONFIG_BLK_DEV_IDEDMA_PCI
if [ "$CONFIG_BLK_DEV_PIIX" = "y" ]; then
dep_bool ' Use UDMA133 even on ICH2, ICH3 and CICH chips (EXPERIMENTAL)' CONFIG_BLK_DEV_PIIX_TRY133 $CONFIG_EXPERIMENTAL
fi
if [ "$CONFIG_MIPS_ITE8172" = "y" -o "$CONFIG_MIPS_IVR" = "y" ]; then
dep_mbool ' IT8172 IDE support' CONFIG_BLK_DEV_IT8172 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' IT8172 IDE Tuning support' CONFIG_IT8172_TUNING $CONFIG_BLK_DEV_IT8172 $CONFIG_IDEDMA_PCI_AUTO
fi
dep_bool ' NS87415 chipset support (EXPERIMENTAL)' CONFIG_BLK_DEV_NS87415 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' OPTi 82C621 chipset enhanced support (EXPERIMENTAL)' CONFIG_BLK_DEV_OPTI621 $CONFIG_PCI $CONFIG_EXPERIMENTAL
dep_mbool ' Pacific Digital A-DMA support (EXPERIMENTAL)' CONFIG_BLK_DEV_PDC_ADMA $CONFIG_EXPERIMENTAL
dep_bool ' PROMISE PDC202{46|62|65|67|68|69|70} support' CONFIG_BLK_DEV_PDC202XX $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Special UDMA Feature' CONFIG_PDC202XX_BURST $CONFIG_BLK_DEV_PDC202XX
dep_bool ' Special FastTrak Feature' CONFIG_PDC202XX_FORCE $CONFIG_BLK_DEV_PDC202XX
dep_bool ' ServerWorks OSB4/CSB5 chipsets support' CONFIG_BLK_DEV_SVWKS $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86
dep_bool ' SiS5513 chipset support' CONFIG_BLK_DEV_SIS5513 $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86
dep_bool ' Tekram TRM290 chipset support (EXPERIMENTAL)' CONFIG_BLK_DEV_TRM290 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' VIA chipset support' CONFIG_BLK_DEV_VIA82CXXX $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Winbond SL82c105 support' CONFIG_BLK_DEV_SL82C105 $CONFIG_BLK_DEV_IDEDMA_PCI
fi
if [ "$CONFIG_ALL_PPC" = "y" ]; then
bool ' Builtin PowerMac IDE support' CONFIG_BLK_DEV_IDE_PMAC
......@@ -93,9 +90,6 @@ if [ "$CONFIG_BLK_DEV_IDE" != "n" ]; then
if [ "$CONFIG_BLK_DEV_IDE_PMAC" = "y" ]; then
define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_PMAC
fi
if [ "$CONFIG_BLK_DEV_IDEDMA_PMAC" = "y" ]; then
define_bool CONFIG_BLK_DEV_IDEPCI $CONFIG_BLK_DEV_IDEDMA_PMAC
fi
fi
if [ "$CONFIG_ARCH_ACORN" = "y" ]; then
dep_bool ' ICS IDE interface support' CONFIG_BLK_DEV_IDE_ICSIDE $CONFIG_ARCH_ACORN
......
......@@ -45,7 +45,7 @@ ide-obj-$(CONFIG_BLK_DEV_HT6560B) += ht6560b.o
ide-obj-$(CONFIG_BLK_DEV_IDE_ICSIDE) += icside.o
ide-obj-$(CONFIG_BLK_DEV_IDEDMA_PCI) += ide-dma.o
ide-obj-$(CONFIG_BLK_DEV_IDE_TCQ) += tcq.o
ide-obj-$(CONFIG_BLK_DEV_IDEPCI) += ide-pci.o
ide-obj-$(CONFIG_PCI) += ide-pci.o
ide-obj-$(CONFIG_BLK_DEV_ISAPNP) += ide-pnp.o
ide-obj-$(CONFIG_BLK_DEV_IDE_PMAC) += ide-pmac.o
ide-obj-$(CONFIG_BLK_DEV_MAC_IDE) += macide.o
......
......@@ -40,6 +40,8 @@
* Reset the hpt366 on error, reset on dma
* Fix disabling Fast Interrupt hpt366.
* Mike Waychison <crlf@sun.com>
*
* 02 May 2002 - HPT374 support (Andre Hedrick <andre@linux-ide.org>)
*/
#include <linux/config.h>
......@@ -164,9 +166,8 @@ struct chipset_bus_clock_list_entry {
* PIO.
* 31 FIFO enable.
*/
struct chipset_bus_clock_list_entry forty_base [] = {
{ XFER_UDMA_4, 0x900fd943 },
struct chipset_bus_clock_list_entry forty_base_hpt366[] = {
{ XFER_UDMA_4, 0x900fd943 },
{ XFER_UDMA_3, 0x900ad943 },
{ XFER_UDMA_2, 0x900bd943 },
{ XFER_UDMA_1, 0x9008d943 },
......@@ -184,8 +185,7 @@ struct chipset_bus_clock_list_entry forty_base [] = {
{ 0, 0x0120d9d9 }
};
struct chipset_bus_clock_list_entry thirty_three_base [] = {
struct chipset_bus_clock_list_entry thirty_three_base_hpt366[] = {
{ XFER_UDMA_4, 0x90c9a731 },
{ XFER_UDMA_3, 0x90cfa731 },
{ XFER_UDMA_2, 0x90caa731 },
......@@ -204,7 +204,7 @@ struct chipset_bus_clock_list_entry thirty_three_base [] = {
{ 0, 0x0120a7a7 }
};
struct chipset_bus_clock_list_entry twenty_five_base [] = {
struct chipset_bus_clock_list_entry twenty_five_base_hpt366[] = {
{ XFER_UDMA_4, 0x90c98521 },
{ XFER_UDMA_3, 0x90cf8521 },
......@@ -329,6 +329,144 @@ struct chipset_bus_clock_list_entry fifty_base_hpt370[] = {
{ 0, 0x0ac1f48a }
};
struct chipset_bus_clock_list_entry thirty_three_base_hpt372[] = {
{ XFER_UDMA_6, 0x1c81dc62 },
{ XFER_UDMA_5, 0x1c6ddc62 },
{ XFER_UDMA_4, 0x1c8ddc62 },
{ XFER_UDMA_3, 0x1c8edc62 }, /* checkme */
{ XFER_UDMA_2, 0x1c91dc62 },
{ XFER_UDMA_1, 0x1c9adc62 }, /* checkme */
{ XFER_UDMA_0, 0x1c82dc62 }, /* checkme */
{ XFER_MW_DMA_2, 0x2c829262 },
{ XFER_MW_DMA_1, 0x2c829266 }, /* checkme */
{ XFER_MW_DMA_0, 0x2c82922e }, /* checkme */
{ XFER_PIO_4, 0x0c829c62 },
{ XFER_PIO_3, 0x0c829c84 },
{ XFER_PIO_2, 0x0c829ca6 },
{ XFER_PIO_1, 0x0d029d26 },
{ XFER_PIO_0, 0x0d029d5e },
{ 0, 0x0d029d5e }
};
struct chipset_bus_clock_list_entry fifty_base_hpt372[] = {
{ XFER_UDMA_5, 0x12848242 },
{ XFER_UDMA_4, 0x12ac8242 },
{ XFER_UDMA_3, 0x128c8242 },
{ XFER_UDMA_2, 0x120c8242 },
{ XFER_UDMA_1, 0x12148254 },
{ XFER_UDMA_0, 0x121882ea },
{ XFER_MW_DMA_2, 0x22808242 },
{ XFER_MW_DMA_1, 0x22808254 },
{ XFER_MW_DMA_0, 0x228082ea },
{ XFER_PIO_4, 0x0a81f442 },
{ XFER_PIO_3, 0x0a81f443 },
{ XFER_PIO_2, 0x0a81f454 },
{ XFER_PIO_1, 0x0ac1f465 },
{ XFER_PIO_0, 0x0ac1f48a },
{ 0, 0x0a81f443 }
};
struct chipset_bus_clock_list_entry sixty_six_base_hpt372[] = {
{ XFER_UDMA_6, 0x1c869c62 },
{ XFER_UDMA_5, 0x1cae9c62 },
{ XFER_UDMA_4, 0x1c8a9c62 },
{ XFER_UDMA_3, 0x1c8e9c62 },
{ XFER_UDMA_2, 0x1c929c62 },
{ XFER_UDMA_1, 0x1c9a9c62 },
{ XFER_UDMA_0, 0x1c829c62 },
{ XFER_MW_DMA_2, 0x2c829c62 },
{ XFER_MW_DMA_1, 0x2c829c66 },
{ XFER_MW_DMA_0, 0x2c829d2e },
{ XFER_PIO_4, 0x0c829c62 },
{ XFER_PIO_3, 0x0c829c84 },
{ XFER_PIO_2, 0x0c829ca6 },
{ XFER_PIO_1, 0x0d029d26 },
{ XFER_PIO_0, 0x0d029d5e },
{ 0, 0x0d029d26 }
};
struct chipset_bus_clock_list_entry thirty_three_base_hpt374[] = {
{ XFER_UDMA_6, 0x12808242 },
{ XFER_UDMA_5, 0x12848242 },
{ XFER_UDMA_4, 0x12ac8242 },
{ XFER_UDMA_3, 0x128c8242 },
{ XFER_UDMA_2, 0x120c8242 },
{ XFER_UDMA_1, 0x12148254 },
{ XFER_UDMA_0, 0x121882ea },
{ XFER_MW_DMA_2, 0x22808242 },
{ XFER_MW_DMA_1, 0x22808254 },
{ XFER_MW_DMA_0, 0x228082ea },
{ XFER_PIO_4, 0x0a81f442 },
{ XFER_PIO_3, 0x0a81f443 },
{ XFER_PIO_2, 0x0a81f454 },
{ XFER_PIO_1, 0x0ac1f465 },
{ XFER_PIO_0, 0x0ac1f48a },
{ 0, 0x06814e93 }
};
#if 0
struct chipset_bus_clock_list_entry fifty_base_hpt374[] = {
{ XFER_UDMA_6, },
{ XFER_UDMA_5, },
{ XFER_UDMA_4, },
{ XFER_UDMA_3, },
{ XFER_UDMA_2, },
{ XFER_UDMA_1, },
{ XFER_UDMA_0, },
{ XFER_MW_DMA_2, },
{ XFER_MW_DMA_1, },
{ XFER_MW_DMA_0, },
{ XFER_PIO_4, },
{ XFER_PIO_3, },
{ XFER_PIO_2, },
{ XFER_PIO_1, },
{ XFER_PIO_0, },
{ 0, }
};
#endif
#if 0
struct chipset_bus_clock_list_entry sixty_six_base_hpt374[] = {
{ XFER_UDMA_6, 0x12406231 }, /* checkme */
{ XFER_UDMA_5, 0x12446231 },
0x14846231
{ XFER_UDMA_4, 0x16814ea7 },
0x14886231
{ XFER_UDMA_3, 0x16814ea7 },
0x148c6231
{ XFER_UDMA_2, 0x16814ea7 },
0x148c6231
{ XFER_UDMA_1, 0x16814ea7 },
0x14906231
{ XFER_UDMA_0, 0x16814ea7 },
0x14986231
{ XFER_MW_DMA_2, 0x16814ea7 },
0x26514e21
{ XFER_MW_DMA_1, 0x16814ea7 },
0x26514e97
{ XFER_MW_DMA_0, 0x16814ea7 },
0x26514e97
{ XFER_PIO_4, 0x06814ea7 },
0x06514e21
{ XFER_PIO_3, 0x06814ea7 },
0x06514e22
{ XFER_PIO_2, 0x06814ea7 },
0x06514e33
{ XFER_PIO_1, 0x06814ea7 },
0x06914e43
{ XFER_PIO_0, 0x06814ea7 },
0x06914e57
{ 0, 0x06814ea7 }
};
#endif
#define HPT366_DEBUG_DRIVE_INFO 0
#define HPT370_ALLOW_ATA100_5 1
#define HPT366_ALLOW_ATA66_4 1
......@@ -345,6 +483,10 @@ static int n_hpt_devs;
static unsigned int pci_rev_check_hpt3xx(struct pci_dev *dev);
static unsigned int pci_rev2_check_hpt3xx(struct pci_dev *dev);
static unsigned int pci_rev3_check_hpt3xx(struct pci_dev *dev);
static unsigned int pci_rev5_check_hpt3xx(struct pci_dev *dev);
static unsigned int pci_rev7_check_hpt3xx(struct pci_dev *dev);
byte hpt366_proc = 0;
extern char *ide_xfer_verbose (byte xfer_rate);
......@@ -355,11 +497,13 @@ extern int (*hpt366_display_info)(char *, char **, off_t, int); /* ide-proc.c */
static int hpt366_get_info (char *buffer, char **addr, off_t offset, int count)
{
char *p = buffer;
char *chipset_nums[] = {"366", "366", "368", "370", "370A"};
char *chipset_nums[] = {"366", "366", "368",
"370", "370A", "372",
"??", "374" };
int i;
p += sprintf(p, "\n "
"HighPoint HPT366/368/370\n");
"HighPoint HPT366/368/370/372/374\n");
for (i = 0; i < n_hpt_devs; i++) {
struct pci_dev *dev = hpt_devs[i];
unsigned short iobase = dev->resource[4].start;
......@@ -384,7 +528,7 @@ static int hpt366_get_info (char *buffer, char **addr, off_t offset, int count)
(c0 & 0x80) ? "no" : "yes",
(c1 & 0x80) ? "no" : "yes");
if (pci_rev_check_hpt3xx(dev)) {
if (pci_rev3_check_hpt3xx(dev)) {
u8 cbl;
cbl = inb_p(iobase + 0x7b);
outb_p(cbl | 1, iobase + 0x7b);
......@@ -433,6 +577,10 @@ static int hpt366_get_info (char *buffer, char **addr, off_t offset, int count)
}
#endif /* defined(DISPLAY_HPT366_TIMINGS) && defined(CONFIG_PROC_FS) */
/*
* fixme: it really needs to be a switch.
*/
static unsigned int pci_rev_check_hpt3xx (struct pci_dev *dev)
{
unsigned int class_rev;
......@@ -449,6 +597,30 @@ static unsigned int pci_rev2_check_hpt3xx (struct pci_dev *dev)
return ((int) (class_rev > 0x01) ? 1 : 0);
}
static unsigned int pci_rev3_check_hpt3xx (struct pci_dev *dev)
{
unsigned int class_rev;
pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
class_rev &= 0xff;
return ((int) (class_rev > 0x02) ? 1 : 0);
}
static unsigned int pci_rev5_check_hpt3xx (struct pci_dev *dev)
{
unsigned int class_rev;
pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
class_rev &= 0xff;
return ((int) (class_rev > 0x04) ? 1 : 0);
}
static unsigned int pci_rev7_check_hpt3xx (struct pci_dev *dev)
{
unsigned int class_rev;
pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
class_rev &= 0xff;
return ((int) (class_rev > 0x06) ? 1 : 0);
}
static int check_in_drive_lists (ide_drive_t *drive, const char **list)
{
struct hd_driveid *id = drive->id;
......@@ -480,6 +652,7 @@ static unsigned int pci_bus_clock_list (byte speed, struct chipset_bus_clock_lis
static void hpt366_tune_chipset (ide_drive_t *drive, byte speed)
{
struct pci_dev *dev = drive->channel->pci_dev;
byte regtime = (drive->select.b.unit & 0x01) ? 0x44 : 0x40;
byte regfast = (drive->channel->unit) ? 0x55 : 0x51;
/*
......@@ -493,30 +666,13 @@ static void hpt366_tune_chipset (ide_drive_t *drive, byte speed)
/*
* Disable the "fast interrupt" prediction.
*/
pci_read_config_byte(drive->channel->pci_dev, regfast, &drive_fast);
pci_read_config_byte(dev, regfast, &drive_fast);
if (drive_fast & 0x02)
pci_write_config_byte(drive->channel->pci_dev, regfast, drive_fast & ~0x20);
pci_write_config_byte(dev, regfast, drive_fast & ~0x20);
pci_read_config_dword(drive->channel->pci_dev, regtime, &reg1);
/* detect bus speed by looking at control reg timing: */
switch((reg1 >> 8) & 7) {
case 5:
reg2 = pci_bus_clock_list(speed, forty_base);
break;
case 9:
reg2 = pci_bus_clock_list(speed, twenty_five_base);
break;
default:
case 7:
reg2 = pci_bus_clock_list(speed, thirty_three_base);
break;
}
#if 0
/* this is a nice idea ... */
list_conf = pci_bus_clock_list(speed,
(struct chipset_bus_clock_list_entry *)
dev->sysdata);
#endif
pci_read_config_dword(dev, regtime, &reg1);
reg2 = pci_bus_clock_list(speed,
(struct chipset_bus_clock_list_entry *) dev->sysdata);
/*
* Disable on-chip PIO FIFO/buffer (to avoid problems handling I/O errors later)
*/
......@@ -527,7 +683,12 @@ static void hpt366_tune_chipset (ide_drive_t *drive, byte speed)
}
reg2 &= ~0x80000000;
pci_write_config_dword(drive->channel->pci_dev, regtime, reg2);
pci_write_config_dword(dev, regtime, reg2);
}
static void hpt368_tune_chipset (ide_drive_t *drive, byte speed)
{
hpt366_tune_chipset(drive, speed);
}
static void hpt370_tune_chipset (ide_drive_t *drive, byte speed)
......@@ -573,6 +734,39 @@ static void hpt370_tune_chipset (ide_drive_t *drive, byte speed)
pci_write_config_dword(dev, drive_pci, list_conf);
}
static void hpt372_tune_chipset (ide_drive_t *drive, byte speed)
{
byte regfast = (drive->channel->unit) ? 0x55 : 0x51;
unsigned int list_conf = 0;
unsigned int drive_conf = 0;
unsigned int conf_mask = (speed >= XFER_MW_DMA_0) ? 0xc0000000 : 0x30070000;
byte drive_pci = 0x40 + (drive->dn * 4);
byte drive_fast = 0;
struct pci_dev *dev = drive->channel->pci_dev;
/*
* Disable the "fast interrupt" prediction.
* don't holdoff on interrupts. (== 0x01 despite what the docs say)
*/
pci_read_config_byte(dev, regfast, &drive_fast);
drive_fast &= ~0x07;
pci_write_config_byte(drive->channel->pci_dev, regfast, drive_fast);
list_conf = pci_bus_clock_list(speed,
(struct chipset_bus_clock_list_entry *)
dev->sysdata);
pci_read_config_dword(dev, drive_pci, &drive_conf);
list_conf = (list_conf & ~conf_mask) | (drive_conf & conf_mask);
if (speed < XFER_MW_DMA_0)
list_conf &= ~0x80000000; /* Disable on-chip PIO FIFO/buffer */
pci_write_config_dword(dev, drive_pci, list_conf);
}
static void hpt374_tune_chipset (ide_drive_t *drive, byte speed)
{
hpt372_tune_chipset(drive, speed);
}
static int hpt3xx_tune_chipset (ide_drive_t *drive, byte speed)
{
if ((drive->type != ATA_DISK) && (speed < XFER_SW_DMA_0))
......@@ -581,9 +775,15 @@ static int hpt3xx_tune_chipset (ide_drive_t *drive, byte speed)
if (!drive->init_speed)
drive->init_speed = speed;
if (pci_rev_check_hpt3xx(drive->channel->pci_dev)) {
if (pci_rev7_check_hpt3xx(drive->channel->pci_dev)) {
hpt374_tune_chipset(drive, speed);
} else if (pci_rev5_check_hpt3xx(drive->channel->pci_dev)) {
hpt372_tune_chipset(drive, speed);
} else if (pci_rev3_check_hpt3xx(drive->channel->pci_dev)) {
hpt370_tune_chipset(drive, speed);
} else {
} else if (pci_rev2_check_hpt3xx(drive->channel->pci_dev)) {
hpt368_tune_chipset(drive, speed);
} else {
hpt366_tune_chipset(drive, speed);
}
drive->current_speed = speed;
......@@ -660,13 +860,21 @@ static int config_chipset_for_dma (ide_drive_t *drive)
byte ultra66 = eighty_ninty_three(drive);
int rval;
config_chipset_for_pio(drive);
drive->init_speed = 0;
if ((drive->type != ATA_DISK) && (speed < XFER_SW_DMA_0))
return 0;
if ((id->dma_ultra & 0x0020) &&
if ((id->dma_ultra & 0x0040) &&
(pci_rev5_check_hpt3xx(drive->channel->pci_dev)) &&
(ultra66)) {
speed = XFER_UDMA_6;
} else if ((id->dma_ultra & 0x0020) &&
(!check_in_drive_lists(drive, bad_ata100_5)) &&
(HPT370_ALLOW_ATA100_5) &&
(pci_rev_check_hpt3xx(drive->channel->pci_dev)) &&
(pci_rev3_check_hpt3xx(drive->channel->pci_dev)) &&
(ultra66)) {
speed = XFER_UDMA_5;
} else if ((id->dma_ultra & 0x0010) &&
......@@ -699,7 +907,8 @@ static int config_chipset_for_dma (ide_drive_t *drive)
(void) hpt3xx_tune_chipset(drive, speed);
rval = (int)( ((id->dma_ultra >> 11) & 7) ? 1 :
rval = (int)( ((id->dma_ultra >> 14) & 3) ? 1 :
((id->dma_ultra >> 11) & 7) ? 1 :
((id->dma_ultra >> 8) & 7) ? 1 :
((id->dma_mword >> 8) & 7) ? 1 :
0);
......@@ -722,12 +931,14 @@ void hpt3xx_intrproc (ide_drive_t *drive)
void hpt3xx_maskproc (ide_drive_t *drive, int mask)
{
struct pci_dev *dev = drive->channel->pci_dev;
if (drive->quirk_list) {
if (pci_rev_check_hpt3xx(drive->channel->pci_dev)) {
if (pci_rev3_check_hpt3xx(dev)) {
byte reg5a = 0;
pci_read_config_byte(drive->channel->pci_dev, 0x5a, &reg5a);
pci_read_config_byte(dev, 0x5a, &reg5a);
if (((reg5a & 0x10) >> 4) != mask)
pci_write_config_byte(drive->channel->pci_dev, 0x5a, mask ? (reg5a | 0x10) : (reg5a & ~0x10));
pci_write_config_byte(dev, 0x5a, mask ? (reg5a | 0x10) : (reg5a & ~0x10));
} else {
if (mask) {
disable_irq(drive->channel->irq);
......@@ -756,7 +967,7 @@ static int config_drive_xfer_rate (ide_drive_t *drive)
on = 0;
verbose = 0;
if (id->field_valid & 4) {
if (id->dma_ultra & 0x002F) {
if (id->dma_ultra & 0x007F) {
/* Force if Capable UltraDMA */
on = config_chipset_for_dma(drive);
if ((id->field_valid & 2) &&
......@@ -897,11 +1108,38 @@ static int hpt370_udma_stop(struct ata_device *drive)
return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0; /* verify good DMA status */
}
static int hpt370_dmaproc(struct ata_device *drive)
{
return config_drive_xfer_rate(drive);
}
static int hpt374_udma_stop(struct ata_device *drive)
{
struct ata_channel *ch = drive->channel;
struct pci_dev *dev = drive->channel->pci_dev;
unsigned long dma_base = ch->dma_base;
u8 mscreg = ch->unit ? 0x54 : 0x50;
u8 dma_stat;
u8 bwsr_mask = ch->unit ? 0x02 : 0x01;
u8 bwsr_stat, msc_stat;
pci_read_config_byte(dev, 0x6a, &bwsr_stat);
pci_read_config_byte(dev, mscreg, &msc_stat);
if ((bwsr_stat & bwsr_mask) == bwsr_mask)
pci_write_config_byte(dev, mscreg, msc_stat|0x30);
drive->waiting_for_dma = 0;
outb(inb(dma_base)&~1, dma_base); /* stop DMA */
dma_stat = inb(dma_base+2); /* get DMA status */
outb(dma_stat|6, dma_base+2); /* clear the INTR & ERROR bits */
udma_destroy_table(ch); /* purge DMA mappings */
return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0; /* verify good DMA status */
}
static int hpt374_dmaproc(struct ata_device *drive)
{
return config_drive_xfer_rate(drive);
}
#endif
/*
......@@ -1021,7 +1259,7 @@ static int hpt370_busproc(ide_drive_t * drive, int state)
return 0;
}
static void __init init_hpt370(struct pci_dev *dev)
static void __init init_hpt37x(struct pci_dev *dev)
{
int adjust, i;
u16 freq;
......@@ -1042,18 +1280,44 @@ static void __init init_hpt370(struct pci_dev *dev)
freq &= 0x1FF;
if (freq < 0x9c) {
pll = F_LOW_PCI_33;
dev->sysdata = (void *) thirty_three_base_hpt370;
printk("HPT370: using 33MHz PCI clock\n");
if (pci_rev7_check_hpt3xx(dev)) {
dev->sysdata = (void *) thirty_three_base_hpt374;
} else if (pci_rev5_check_hpt3xx(dev)) {
dev->sysdata = (void *) thirty_three_base_hpt372;
} else if (dev->device == PCI_DEVICE_ID_TTI_HPT372) {
dev->sysdata = (void *) thirty_three_base_hpt372;
} else {
dev->sysdata = (void *) thirty_three_base_hpt370;
}
printk("HPT37X: using 33MHz PCI clock\n");
} else if (freq < 0xb0) {
pll = F_LOW_PCI_40;
} else if (freq < 0xc8) {
pll = F_LOW_PCI_50;
dev->sysdata = (void *) fifty_base_hpt370;
printk("HPT370: using 50MHz PCI clock\n");
if (pci_rev7_check_hpt3xx(dev)) {
// dev->sysdata = (void *) fifty_base_hpt374;
BUG();
} else if (pci_rev5_check_hpt3xx(dev)) {
dev->sysdata = (void *) fifty_base_hpt372;
} else if (dev->device == PCI_DEVICE_ID_TTI_HPT372) {
dev->sysdata = (void *) fifty_base_hpt372;
} else {
dev->sysdata = (void *) fifty_base_hpt370;
}
printk("HPT37X: using 50MHz PCI clock\n");
} else {
pll = F_LOW_PCI_66;
dev->sysdata = (void *) sixty_six_base_hpt370;
printk("HPT370: using 66MHz PCI clock\n");
if (pci_rev7_check_hpt3xx(dev)) {
// dev->sysdata = (void *) sixty_six_base_hpt374;
BUG();
} else if (pci_rev5_check_hpt3xx(dev)) {
dev->sysdata = (void *) sixty_six_base_hpt372;
} else if (dev->device == PCI_DEVICE_ID_TTI_HPT372) {
dev->sysdata = (void *) sixty_six_base_hpt372;
} else {
dev->sysdata = (void *) sixty_six_base_hpt370;
}
printk("HPT37X: using 66MHz PCI clock\n");
}
/*
......@@ -1064,7 +1328,7 @@ static void __init init_hpt370(struct pci_dev *dev)
* on PRST/SRST when the HPT state engine gets reset.
*/
if (dev->sysdata)
goto init_hpt370_done;
goto init_hpt37X_done;
/*
* adjust PLL based upon PCI clock, enable it, and wait for
......@@ -1091,9 +1355,18 @@ static void __init init_hpt370(struct pci_dev *dev)
pci_write_config_dword(dev, 0x5c,
pll & ~0x100);
pci_write_config_byte(dev, 0x5b, 0x21);
dev->sysdata = (void *) fifty_base_hpt370;
printk("HPT370: using 50MHz internal PLL\n");
goto init_hpt370_done;
if (pci_rev7_check_hpt3xx(dev)) {
// dev->sysdata = (void *) fifty_base_hpt374;
BUG();
} else if (pci_rev5_check_hpt3xx(dev)) {
dev->sysdata = (void *) fifty_base_hpt372;
} else if (dev->device == PCI_DEVICE_ID_TTI_HPT372) {
dev->sysdata = (void *) fifty_base_hpt372;
} else {
dev->sysdata = (void *) fifty_base_hpt370;
}
printk("HPT37X: using 50MHz internal PLL\n");
goto init_hpt37X_done;
}
}
pll_recal:
......@@ -1103,13 +1376,41 @@ static void __init init_hpt370(struct pci_dev *dev)
pll += (adjust >> 1);
}
init_hpt370_done:
init_hpt37X_done:
/* reset state engine */
pci_write_config_byte(dev, 0x50, 0x37);
pci_write_config_byte(dev, 0x54, 0x37);
udelay(100);
}
static void __init init_hpt366 (struct pci_dev *dev)
{
unsigned int reg1 = 0;
byte drive_fast = 0;
/*
* Disable the "fast interrupt" prediction.
*/
pci_read_config_byte(dev, 0x51, &drive_fast);
if (drive_fast & 0x80)
pci_write_config_byte(dev, 0x51, drive_fast & ~0x80);
pci_read_config_dword(dev, 0x40, &reg1);
/* detect bus speed by looking at control reg timing: */
switch((reg1 >> 8) & 7) {
case 5:
dev->sysdata = (void *) forty_base_hpt366;
break;
case 9:
dev->sysdata = (void *) twenty_five_base_hpt366;
break;
case 7:
default:
dev->sysdata = (void *) thirty_three_base_hpt366;
break;
}
}
unsigned int __init pci_init_hpt366(struct pci_dev *dev)
{
byte test = 0;
......@@ -1133,8 +1434,10 @@ unsigned int __init pci_init_hpt366(struct pci_dev *dev)
if (test != 0x08)
pci_write_config_byte(dev, PCI_MAX_LAT, 0x08);
if (pci_rev_check_hpt3xx(dev))
init_hpt370(dev);
if (pci_rev3_check_hpt3xx(dev))
init_hpt37x(dev);
else
init_hpt366(dev);
if (n_hpt_devs < HPT366_MAX_DEVS)
hpt_devs[n_hpt_devs++] = dev;
......@@ -1165,8 +1468,6 @@ unsigned int __init ata66_hpt366(struct ata_channel *hwif)
void __init ide_init_hpt366(struct ata_channel *hwif)
{
int hpt_rev;
hwif->tuneproc = &hpt3xx_tune_drive;
hwif->speedproc = &hpt3xx_tune_chipset;
hwif->quirkproc = &hpt3xx_quirkproc;
......@@ -1179,36 +1480,46 @@ void __init ide_init_hpt366(struct ata_channel *hwif)
hwif->serialized = hwif->mate->serialized = 1;
#endif
hpt_rev = pci_rev_check_hpt3xx(hwif->pci_dev);
if (hpt_rev) {
/* set up ioctl for power status. note: power affects both
* drives on each channel */
hwif->busproc = &hpt370_busproc;
}
if (pci_rev2_check_hpt3xx(hwif->pci_dev)) {
/* do nothing now but will split device types */
hwif->resetproc = &hpt3xx_reset;
/*
* don't do until we can parse out the cobalt box argh ...
* hwif->busproc = &hpt3xx_tristate;
*/
}
#ifdef CONFIG_BLK_DEV_IDEDMA
if (hwif->dma_base) {
if (hpt_rev) {
if (pci_rev3_check_hpt3xx(hwif->pci_dev)) {
byte reg5ah = 0;
pci_read_config_byte(hwif->pci_dev, 0x5a, &reg5ah);
if (reg5ah & 0x10) /* interrupt force enable */
pci_write_config_byte(hwif->pci_dev, 0x5a, reg5ah & ~0x10);
hwif->udma_start = hpt370_udma_start;
hwif->udma_stop = hpt370_udma_stop;
hwif->udma_timeout = hpt370_udma_timeout;
hwif->udma_irq_lost = hpt370_udma_irq_lost;
hwif->XXX_udma = hpt370_dmaproc;
/*
* set up ioctl for power status.
* note: power affects both
* drives on each channel
*/
hwif->resetproc = hpt3xx_reset;
hwif->busproc = hpt370_busproc;
if (pci_rev7_check_hpt3xx(hwif->pci_dev)) {
hwif->udma_stop = hpt374_udma_stop;
hwif->XXX_udma = hpt374_dmaproc;
} else if (pci_rev5_check_hpt3xx(hwif->pci_dev)) {
hwif->udma_stop = hpt374_udma_stop;
hwif->XXX_udma = hpt374_dmaproc;
} else if (hwif->pci_dev->device == PCI_DEVICE_ID_TTI_HPT372) {
hwif->udma_stop = hpt374_udma_stop;
hwif->XXX_udma = hpt374_dmaproc;
} else if (pci_rev3_check_hpt3xx(hwif->pci_dev)) {
hwif->udma_start = hpt370_udma_start;
hwif->udma_stop = hpt370_udma_stop;
hwif->udma_timeout = hpt370_udma_timeout;
hwif->udma_irq_lost = hpt370_udma_irq_lost;
hwif->XXX_udma = hpt370_dmaproc;
}
} else if (pci_rev2_check_hpt3xx(hwif->pci_dev)) {
hwif->udma_irq_lost = hpt366_udma_irq_lost;
// hwif->resetproc = hpt3xx_reset;
// hwif->busproc = hpt3xx_tristate;
hwif->XXX_udma = hpt366_dmaproc;
} else {
hwif->udma_irq_lost = hpt366_udma_irq_lost;
// hwif->resetproc = hpt3xx_reset;
// hwif->busproc = hpt3xx_tristate;
hwif->XXX_udma = hpt366_dmaproc;
}
if (!noautodma)
......
......@@ -490,106 +490,6 @@ static void idedisk_pre_reset(struct ata_device *drive)
#ifdef CONFIG_PROC_FS
static int smart_enable(struct ata_device *drive)
{
struct ata_taskfile args;
memset(&args, 0, sizeof(args));
args.taskfile.feature = SMART_ENABLE;
args.taskfile.low_cylinder = SMART_LCYL_PASS;
args.taskfile.high_cylinder = SMART_HCYL_PASS;
args.taskfile.command = WIN_SMART;
ide_cmd_type_parser(&args);
return ide_raw_taskfile(drive, &args, NULL);
}
static int get_smart_values(struct ata_device *drive, u8 *buf)
{
struct ata_taskfile args;
memset(&args, 0, sizeof(args));
args.taskfile.feature = SMART_READ_VALUES;
args.taskfile.sector_count = 0x01;
args.taskfile.low_cylinder = SMART_LCYL_PASS;
args.taskfile.high_cylinder = SMART_HCYL_PASS;
args.taskfile.command = WIN_SMART;
ide_cmd_type_parser(&args);
smart_enable(drive);
return ide_raw_taskfile(drive, &args, buf);
}
static int get_smart_thresholds(struct ata_device *drive, u8 *buf)
{
struct ata_taskfile args;
memset(&args, 0, sizeof(args));
args.taskfile.feature = SMART_READ_THRESHOLDS;
args.taskfile.sector_count = 0x01;
args.taskfile.low_cylinder = SMART_LCYL_PASS;
args.taskfile.high_cylinder = SMART_HCYL_PASS;
args.taskfile.command = WIN_SMART;
ide_cmd_type_parser(&args);
smart_enable(drive);
return ide_raw_taskfile(drive, &args, buf);
}
static int proc_idedisk_read_cache
(char *page, char **start, off_t off, int count, int *eof, void *data)
{
struct ata_device *drive = (struct ata_device *) data;
char *out = page;
int len;
if (drive->id)
len = sprintf(out,"%i\n", drive->id->buf_size / 2);
else
len = sprintf(out,"(none)\n");
PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
}
static int proc_idedisk_read_smart_thresholds
(char *page, char **start, off_t off, int count, int *eof, void *data)
{
struct ata_device *drive = (struct ata_device *)data;
int len = 0, i = 0;
if (!get_smart_thresholds(drive, page)) {
unsigned short *val = (unsigned short *) page;
char *out = ((char *)val) + (SECTOR_WORDS * 4);
page = out;
do {
out += sprintf(out, "%04x%c", le16_to_cpu(*val), (++i & 7) ? ' ' : '\n');
val += 1;
} while (i < (SECTOR_WORDS * 2));
len = out - page;
}
PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
}
static int proc_idedisk_read_smart_values
(char *page, char **start, off_t off, int count, int *eof, void *data)
{
struct ata_device *drive = (struct ata_device *)data;
int len = 0, i = 0;
if (!get_smart_values(drive, page)) {
unsigned short *val = (unsigned short *) page;
char *out = ((char *)val) + (SECTOR_WORDS * 4);
page = out;
do {
out += sprintf(out, "%04x%c", le16_to_cpu(*val), (++i & 7) ? ' ' : '\n');
val += 1;
} while (i < (SECTOR_WORDS * 2));
len = out - page;
}
PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
}
#ifdef CONFIG_BLK_DEV_IDE_TCQ
static int proc_idedisk_read_tcq
(char *page, char **start, off_t off, int count, int *eof, void *data)
......@@ -638,10 +538,6 @@ static int proc_idedisk_read_tcq
#endif
static ide_proc_entry_t idedisk_proc[] = {
{ "cache", S_IFREG|S_IRUGO, proc_idedisk_read_cache, NULL },
{ "geometry", S_IFREG|S_IRUGO, proc_ide_read_geometry, NULL },
{ "smart_values", S_IFREG|S_IRUSR, proc_idedisk_read_smart_values, NULL },
{ "smart_thresholds", S_IFREG|S_IRUSR, proc_idedisk_read_smart_thresholds, NULL },
#ifdef CONFIG_BLK_DEV_IDE_TCQ
{ "tcq", S_IFREG|S_IRUSR, proc_idedisk_read_tcq, NULL },
#endif
......@@ -650,9 +546,9 @@ static ide_proc_entry_t idedisk_proc[] = {
#else
#define idedisk_proc NULL
# define idedisk_proc NULL
#endif /* CONFIG_PROC_FS */
#endif
/*
* This is tightly woven into the driver->special can not touch.
......
......@@ -489,7 +489,8 @@ void ide_setup_dma(struct ata_channel *ch, unsigned long dma_base, unsigned int
goto dma_alloc_failure;
}
ch->XXX_udma = XXX_ide_dmaproc;
if (!ch->XXX_udma)
ch->XXX_udma = XXX_ide_dmaproc;
if (ch->chipset != ide_trm290) {
u8 dma_stat = inb(dma_base+2);
......
......@@ -103,6 +103,105 @@ byte ide_auto_reduce_xfer (ide_drive_t *drive)
}
}
/*
* hd_driveid data come as little endian,
* they need to be converted on big endian machines
*/
void ide_fix_driveid(struct hd_driveid *id)
{
#ifndef __LITTLE_ENDIAN
#ifdef __BIG_ENDIAN
int i;
unsigned short *stringcast;
id->config = __le16_to_cpu(id->config);
id->cyls = __le16_to_cpu(id->cyls);
id->reserved2 = __le16_to_cpu(id->reserved2);
id->heads = __le16_to_cpu(id->heads);
id->track_bytes = __le16_to_cpu(id->track_bytes);
id->sector_bytes = __le16_to_cpu(id->sector_bytes);
id->sectors = __le16_to_cpu(id->sectors);
id->vendor0 = __le16_to_cpu(id->vendor0);
id->vendor1 = __le16_to_cpu(id->vendor1);
id->vendor2 = __le16_to_cpu(id->vendor2);
stringcast = (unsigned short *)&id->serial_no[0];
for (i = 0; i < (20/2); i++)
stringcast[i] = __le16_to_cpu(stringcast[i]);
id->buf_type = __le16_to_cpu(id->buf_type);
id->buf_size = __le16_to_cpu(id->buf_size);
id->ecc_bytes = __le16_to_cpu(id->ecc_bytes);
stringcast = (unsigned short *)&id->fw_rev[0];
for (i = 0; i < (8/2); i++)
stringcast[i] = __le16_to_cpu(stringcast[i]);
stringcast = (unsigned short *)&id->model[0];
for (i = 0; i < (40/2); i++)
stringcast[i] = __le16_to_cpu(stringcast[i]);
id->dword_io = __le16_to_cpu(id->dword_io);
id->reserved50 = __le16_to_cpu(id->reserved50);
id->field_valid = __le16_to_cpu(id->field_valid);
id->cur_cyls = __le16_to_cpu(id->cur_cyls);
id->cur_heads = __le16_to_cpu(id->cur_heads);
id->cur_sectors = __le16_to_cpu(id->cur_sectors);
id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0);
id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1);
id->lba_capacity = __le32_to_cpu(id->lba_capacity);
id->dma_1word = __le16_to_cpu(id->dma_1word);
id->dma_mword = __le16_to_cpu(id->dma_mword);
id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
id->eide_dma_min = __le16_to_cpu(id->eide_dma_min);
id->eide_dma_time = __le16_to_cpu(id->eide_dma_time);
id->eide_pio = __le16_to_cpu(id->eide_pio);
id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
for (i = 0; i < 2; i++)
id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
for (i = 0; i < 4; i++)
id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
id->queue_depth = __le16_to_cpu(id->queue_depth);
for (i = 0; i < 4; i++)
id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
id->major_rev_num = __le16_to_cpu(id->major_rev_num);
id->minor_rev_num = __le16_to_cpu(id->minor_rev_num);
id->command_set_1 = __le16_to_cpu(id->command_set_1);
id->command_set_2 = __le16_to_cpu(id->command_set_2);
id->cfsse = __le16_to_cpu(id->cfsse);
id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1);
id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2);
id->csf_default = __le16_to_cpu(id->csf_default);
id->dma_ultra = __le16_to_cpu(id->dma_ultra);
id->word89 = __le16_to_cpu(id->word89);
id->word90 = __le16_to_cpu(id->word90);
id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues);
id->word92 = __le16_to_cpu(id->word92);
id->hw_config = __le16_to_cpu(id->hw_config);
id->acoustic = __le16_to_cpu(id->acoustic);
for (i = 0; i < 5; i++)
id->words95_99[i] = __le16_to_cpu(id->words95_99[i]);
id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
for (i = 0; i < 22; i++)
id->words104_125[i] = __le16_to_cpu(id->words104_125[i]);
id->last_lun = __le16_to_cpu(id->last_lun);
id->word127 = __le16_to_cpu(id->word127);
id->dlf = __le16_to_cpu(id->dlf);
id->csfo = __le16_to_cpu(id->csfo);
for (i = 0; i < 26; i++)
id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
id->word156 = __le16_to_cpu(id->word156);
for (i = 0; i < 3; i++)
id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
id->cfa_power = __le16_to_cpu(id->cfa_power);
for (i = 0; i < 14; i++)
id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
for (i = 0; i < 31; i++)
id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
for (i = 0; i < 48; i++)
id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
id->integrity_word = __le16_to_cpu(id->integrity_word);
#else
#error "Please fix <asm/byteorder.h>"
#endif /* __BIG_ENDIAN */
#endif /* __LITTLE_ENDIAN */
}
int ide_driveid_update (ide_drive_t *drive)
{
/*
......@@ -331,6 +430,7 @@ int ide_config_drive_speed (ide_drive_t *drive, byte speed)
}
EXPORT_SYMBOL(ide_auto_reduce_xfer);
EXPORT_SYMBOL(ide_fix_driveid);
EXPORT_SYMBOL(ide_driveid_update);
EXPORT_SYMBOL(ide_ata66_check);
EXPORT_SYMBOL(set_transfer);
......
......@@ -2032,19 +2032,6 @@ static int idefloppy_cleanup (ide_drive_t *drive)
return 0;
}
#ifdef CONFIG_PROC_FS
static ide_proc_entry_t idefloppy_proc[] = {
{ "geometry", S_IFREG|S_IRUGO, proc_ide_read_geometry, NULL },
{ NULL, 0, NULL, NULL }
};
#else
#define idefloppy_proc NULL
#endif /* CONFIG_PROC_FS */
/*
* IDE subdriver functions, registered with ide.c
*/
......@@ -2060,7 +2047,6 @@ static struct ata_operations idefloppy_driver = {
check_media_change: idefloppy_check_media_change,
revalidate: NULL, /* use default method */
capacity: idefloppy_capacity,
proc: idefloppy_proc
};
MODULE_DESCRIPTION("ATAPI FLOPPY Driver");
......@@ -2075,13 +2061,6 @@ static void __exit idefloppy_exit (void)
printk ("%s: cleanup_module() called while still busy\n", drive->name);
failed++;
}
#ifdef CONFIG_PROC_FS
/* We must remove proc entries defined in this module.
Otherwise we oops while accessing these entries */
if (drive->proc)
ide_remove_proc_entries(drive->proc, idefloppy_proc);
#endif
}
}
......
......@@ -265,6 +265,8 @@ static struct ata_pci_device pci_chipsets[] __initdata = {
#endif
#ifdef CONFIG_BLK_DEV_HPT366
{PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT366, pci_init_hpt366, ata66_hpt366, ide_init_hpt366, ide_dmacapable_hpt366, {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, OFF_BOARD, 240, ATA_F_IRQ | ATA_F_HPTHACK | ATA_F_DMA },
{PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT372, pci_init_hpt366, ata66_hpt366, ide_init_hpt366, ide_dmacapable_hpt366, {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, OFF_BOARD, 0, ATA_F_IRQ | ATA_F_HPTHACK | ATA_F_DMA },
{PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT374, pci_init_hpt366, ata66_hpt366, ide_init_hpt366, ide_dmacapable_hpt366, {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, OFF_BOARD, 0, ATA_F_IRQ | ATA_F_HPTHACK | ATA_F_DMA },
#endif
#ifdef CONFIG_BLK_DEV_ALI15X3
{PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, pci_init_ali15x3, ata66_ali15x3, ide_init_ali15x3, ide_dmacapable_ali15x3, {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, ON_BOARD, 0, 0 },
......@@ -307,6 +309,8 @@ static struct ata_pci_device pci_chipsets[] __initdata = {
{PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF, NULL, NULL, NULL, NULL, {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, ON_BOARD, 0, ATA_F_FIXIRQ },
{PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561, NULL, NULL, NULL, NULL, {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, ON_BOARD, 0, ATA_F_NOADMA },
{PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT366, NULL, NULL, IDE_NO_DRIVER, NULL, {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, OFF_BOARD, 240, ATA_F_IRQ | ATA_F_HPTHACK },
{PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT372, NULL, NULL, IDE_NO_DRIVER, NULL, {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, OFF_BOARD, 0, ATA_F_IRQ | ATA_F_HPTHACK },
{PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT374, NULL, NULL, IDE_NO_DRIVER, NULL, {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, OFF_BOARD, 0, ATA_F_IRQ | ATA_F_HPTHACK },
{0, 0, NULL, NULL, NULL, NULL, {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, ON_BOARD, 0 }};
/*
......@@ -809,6 +813,48 @@ static void __init pdc20270_device_order_fixup (struct pci_dev *dev, struct ata_
setup_pci_device(dev2, d2);
}
static void __init hpt374_device_order_fixup (struct pci_dev *dev, struct ata_pci_device *d)
{
struct pci_dev *dev2 = NULL;
struct pci_dev *findev;
struct ata_pci_device *d2;
if (PCI_FUNC(dev->devfn) & 1)
return;
pci_for_each_dev(findev) {
if ((findev->vendor == dev->vendor) &&
(findev->device == dev->device) &&
((findev->devfn - dev->devfn) == 1) &&
(PCI_FUNC(findev->devfn) & 1)) {
dev2 = findev;
break;
}
}
printk("%s: IDE controller on PCI bus %02x dev %02x\n",
dev->name, dev->bus->number, dev->devfn);
setup_pci_device(dev, d);
if (!dev2) {
return;
} else {
byte irq = 0, irq2 = 0;
pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
pci_read_config_byte(dev2, PCI_INTERRUPT_LINE, &irq2);
if (irq != irq2) {
pci_write_config_byte(dev2, PCI_INTERRUPT_LINE, irq);
dev2->irq = dev->irq;
printk("%s: pci-config space interrupt fixed.\n",
dev2->name);
}
}
d2 = d;
printk("%s: IDE controller on PCI bus %02x dev %02x\n",
dev2->name, dev2->bus->number, dev2->devfn);
setup_pci_device(dev2, d2);
}
static void __init hpt366_device_order_fixup (struct pci_dev *dev, struct ata_pci_device *d)
{
struct pci_dev *dev2 = NULL, *findev;
......@@ -823,6 +869,7 @@ static void __init hpt366_device_order_fixup (struct pci_dev *dev, struct ata_pc
class_rev &= 0xff;
switch(class_rev) {
case 5:
case 4:
case 3: printk("%s: IDE controller on PCI slot %s\n", dev->name, dev->slot_name);
setup_pci_device(dev, d);
......@@ -854,6 +901,8 @@ static void __init hpt366_device_order_fixup (struct pci_dev *dev, struct ata_pc
setup_pci_device(dev2, d2);
}
/*
* This finds all PCI IDE controllers and calls appropriate initialization
* functions for them.
......@@ -883,8 +932,12 @@ static void __init scan_pcidev(struct pci_dev *dev)
return; /* IT8172G is also more than only an IDE controller */
else if ((d->vendor == PCI_VENDOR_ID_UMC && d->device == PCI_DEVICE_ID_UMC_UM8886A) && !(PCI_FUNC(dev->devfn) & 1))
return; /* UM8886A/BF pair */
else if (d->flags & ATA_F_HPTHACK)
hpt366_device_order_fixup(dev, d);
else if (d->flags & ATA_F_HPTHACK) {
if (d->device == PCI_DEVICE_ID_TTI_HPT366)
hpt366_device_order_fixup(dev, d);
if (d->device == PCI_DEVICE_ID_TTI_HPT374)
hpt374_device_order_fixup(dev, d);
}
else if (d->vendor == PCI_VENDOR_ID_PROMISE && d->device == PCI_DEVICE_ID_PROMISE_20268R)
pdc20270_device_order_fixup(dev, d);
else if (!(d->vendor == 0 && d->device == 0) || (dev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
......
......@@ -518,7 +518,7 @@ static void channel_probe(struct ata_channel *ch)
sprintf(ch->dev.bus_id, "%04x", ch->io_ports[IDE_DATA_OFFSET]);
sprintf(ch->dev.name, "ide");
ch->dev.driver_data = ch;
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
if (ch->pci_dev)
ch->dev.parent = &ch->pci_dev->dev;
else
......
......@@ -38,18 +38,6 @@
* "settings" files. e.g. "cat /proc/ide0/hda/settings"
* To write a new value "val" into a specific setting "name", use:
* echo "name:val" >/proc/ide/ide0/hda/settings
*
* Also useful, "cat /proc/ide0/hda/[identify, smart_values,
* smart_thresholds, capabilities]" will issue an IDENTIFY /
* PACKET_IDENTIFY / SMART_READ_VALUES / SMART_READ_THRESHOLDS /
* SENSE CAPABILITIES command to /dev/hda, and then dump out the
* returned data as 256 16-bit words. The "hdparm" utility will
* be updated someday soon to use this mechanism.
*
* Feel free to develop and distribute fancy GUI configuration
* utilities for your favorite PCI chipsets. I'll be working on
* one for the Promise 20246 someday soon. -ml
*
*/
#include <linux/config.h>
......@@ -131,80 +119,6 @@ static int ide_getdigit(char c)
return digit;
}
static int proc_ide_read_imodel
(char *page, char **start, off_t off, int count, int *eof, void *data)
{
struct ata_channel *hwif = data;
int len;
const char *name;
switch (hwif->chipset) {
case ide_unknown: name = "(none)"; break;
case ide_generic: name = "generic"; break;
case ide_pci: name = "pci"; break;
case ide_cmd640: name = "cmd640"; break;
case ide_dtc2278: name = "dtc2278"; break;
case ide_ali14xx: name = "ali14xx"; break;
case ide_qd65xx: name = "qd65xx"; break;
case ide_umc8672: name = "umc8672"; break;
case ide_ht6560b: name = "ht6560b"; break;
case ide_pdc4030: name = "pdc4030"; break;
case ide_rz1000: name = "rz1000"; break;
case ide_trm290: name = "trm290"; break;
case ide_cmd646: name = "cmd646"; break;
case ide_cy82c693: name = "cy82c693"; break;
case ide_pmac: name = "mac-io"; break;
default: name = "(unknown)"; break;
}
len = sprintf(page, "%s\n", name);
PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
}
static int proc_ide_read_channel(char *page, char **start,
off_t off, int count, int *eof, void *data)
{
struct ata_channel *hwif = data;
int len;
page[0] = hwif->unit ? '1' : '0';
page[1] = '\n';
len = 2;
PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
}
static int get_identify(ide_drive_t *drive, u8 *buf)
{
struct ata_taskfile args;
memset(&args, 0, sizeof(args));
args.taskfile.sector_count = 0x01;
args.taskfile.command = (drive->type == ATA_DISK) ? WIN_IDENTIFY : WIN_PIDENTIFY ;
ide_cmd_type_parser(&args);
return ide_raw_taskfile(drive, &args, buf);
}
static int proc_ide_read_identify
(char *page, char **start, off_t off, int count, int *eof, void *data)
{
ide_drive_t *drive = data;
int len = 0;
int i = 0;
if (drive && !get_identify(drive, page)) {
unsigned short *val = (unsigned short *) page;
char *out = ((char *)val) + (SECTOR_WORDS * 4);
page = out;
do {
out += sprintf(out, "%04x%c", le16_to_cpu(*val), (++i & 7) ? ' ' : '\n');
val += 1;
} while (i < (SECTOR_WORDS * 2));
len = out - page;
} else
len = sprintf(page, "\n");
PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
}
static int proc_ide_read_settings
(char *page, char **start, off_t off, int count, int *eof, void *data)
{
......@@ -320,72 +234,7 @@ static int proc_ide_write_settings
return -EINVAL;
}
int proc_ide_read_capacity
(char *page, char **start, off_t off, int count, int *eof, void *data)
{
ide_drive_t *drive = data;
struct ata_operations *driver = drive->driver;
int len;
if (!driver)
len = sprintf(page, "(none)\n");
else
len = sprintf(page,"%llu\n", (unsigned long long) ata_capacity(drive));
PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
}
int proc_ide_read_geometry
(char *page, char **start, off_t off, int count, int *eof, void *data)
{
ide_drive_t *drive = data;
char *out = page;
int len;
out += sprintf(out,"physical %d/%d/%d\n", drive->cyl, drive->head, drive->sect);
out += sprintf(out,"logical %d/%d/%d\n", drive->bios_cyl, drive->bios_head, drive->bios_sect);
len = out - page;
PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
}
static int proc_ide_read_dmodel
(char *page, char **start, off_t off, int count, int *eof, void *data)
{
ide_drive_t *drive = data;
struct hd_driveid *id = drive->id;
int len;
len = sprintf(page, "%.40s\n", (id && id->model[0]) ? (char *)id->model : "(none)");
PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
}
static int proc_ide_read_media
(char *page, char **start, off_t off, int count, int *eof, void *data)
{
ide_drive_t *drive = data;
const char *type;
int len;
switch (drive->type) {
case ATA_DISK: type = "disk\n";
break;
case ATA_ROM: type = "cdrom\n";
break;
case ATA_TAPE: type = "tape\n";
break;
case ATA_FLOPPY:type = "floppy\n";
break;
default: type = "UNKNOWN\n";
break;
}
strcpy(page,type);
len = strlen(type);
PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
}
static ide_proc_entry_t generic_drive_entries[] = {
{ "identify", S_IFREG|S_IRUSR, proc_ide_read_identify, NULL },
{ "media", S_IFREG|S_IRUGO, proc_ide_read_media, NULL },
{ "model", S_IFREG|S_IRUGO, proc_ide_read_dmodel, NULL },
{ "settings", S_IFREG|S_IRUSR|S_IWUSR,proc_ide_read_settings, proc_ide_write_settings },
{ NULL, 0, NULL, NULL }
};
......@@ -472,12 +321,6 @@ void destroy_proc_ide_drives(struct ata_channel *hwif)
}
}
static ide_proc_entry_t hwif_entries[] = {
{ "channel", S_IFREG|S_IRUGO, proc_ide_read_channel, NULL },
{ "model", S_IFREG|S_IRUGO, proc_ide_read_imodel, NULL },
{ NULL, 0, NULL, NULL }
};
void create_proc_ide_interfaces(void)
{
int h;
......@@ -491,7 +334,6 @@ void create_proc_ide_interfaces(void)
hwif->proc = proc_mkdir(hwif->name, proc_ide_root);
if (!hwif->proc)
return;
ide_add_proc_entries(hwif->proc, hwif_entries, hwif);
}
create_proc_ide_drives(hwif);
}
......@@ -510,7 +352,6 @@ static void destroy_proc_ide_interfaces(void)
#endif
if (exist) {
destroy_proc_ide_drives(hwif);
ide_remove_proc_entries(hwif->proc, hwif_entries);
remove_proc_entry(hwif->name, proc_ide_root);
hwif->proc = NULL;
} else
......
......@@ -6000,7 +6000,7 @@ static void idetape_setup (ide_drive_t *drive, idetape_tape_t *tape, int minor)
if (strstr(drive->id->model, "OnStream DI-"))
tape->onstream = 1;
drive->dsc_overlap = 1;
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
if (!tape->onstream && drive->channel->pci_dev != NULL) {
/*
* These two ide-pci host adapters appear to need DSC overlap disabled.
......@@ -6009,10 +6009,10 @@ static void idetape_setup (ide_drive_t *drive, idetape_tape_t *tape, int minor)
if ((drive->channel->pci_dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) ||
(drive->channel->pci_dev->device == PCI_DEVICE_ID_TTI_HPT343)) {
printk(KERN_INFO "ide-tape: %s: disabling DSC overlap\n", tape->name);
drive->dsc_overlap = 0;
drive->dsc_overlap = 0;
}
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
tape->drive = drive;
tape->minor = minor;
tape->name[0] = 'h'; tape->name[1] = 't'; tape->name[2] = '0' + minor;
......
......@@ -468,10 +468,10 @@ ide_startstop_t ata_taskfile(struct ata_device *drive,
/* for dma commands we don't set the handler */
if (args->taskfile.command == WIN_WRITEDMA
|| args->taskfile.command == WIN_WRITEDMA_EXT)
udma_write(drive, rq);
return !udma_write(drive, rq);
else if (args->taskfile.command == WIN_READDMA
|| args->taskfile.command == WIN_READDMA_EXT)
udma_read(drive, rq);
return !udma_read(drive, rq);
#ifdef CONFIG_BLK_DEV_IDE_TCQ
else if (args->taskfile.command == WIN_WRITEDMA_QUEUED
|| args->taskfile.command == WIN_WRITEDMA_QUEUED_EXT
......
......@@ -123,7 +123,7 @@ static int initializing; /* set while initializing built-in drivers */
*/
spinlock_t ide_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED;
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
static int ide_scan_direction; /* THIS was formerly 2.2.x pci=reverse */
#endif
......@@ -1614,7 +1614,7 @@ void ata_irq_request(int irq, void *data, struct pt_regs *regs)
* For PCI, we cannot tell the difference,
* so in that case we just ignore it and hope it goes away.
*/
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
if (ch->pci_dev && !ch->pci_dev->vendor)
#endif
{
......@@ -1622,7 +1622,7 @@ void ata_irq_request(int irq, void *data, struct pt_regs *regs)
* safely try to do something about it:
*/
unexpected_irq(irq);
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
} else {
/*
* Whack the status register, just in case we have a leftover pending IRQ.
......@@ -1936,7 +1936,6 @@ static int ide_release(struct inode * inode, struct file * file)
#ifdef CONFIG_PROC_FS
ide_proc_entry_t generic_subdriver_entries[] = {
{ "capacity", S_IFREG|S_IRUGO, proc_ide_read_capacity, NULL },
{ NULL, 0, NULL, NULL }
};
#endif
......@@ -2142,7 +2141,7 @@ void ide_unregister(struct ata_channel *ch)
ch->chipset = old.chipset;
ch->autodma = old.autodma;
ch->udma_four = old.udma_four;
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
ch->pci_dev = old.pci_dev;
#endif
ch->straight8 = old.straight8;
......@@ -2849,7 +2848,7 @@ int __init ide_setup (char *s)
return 1;
}
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
if (!strcmp(s, "ide=reverse")) {
ide_scan_direction = 1;
printk(" : Enabled support for IDE inverse scan order.\n");
......@@ -3051,7 +3050,7 @@ int __init ide_setup (char *s)
case -8: /* minus8 */
goto bad_option;
case -7: /* ata66 */
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
hwif->udma_four = 1;
goto done;
#else
......@@ -3332,7 +3331,6 @@ EXPORT_SYMBOL(ide_stall_queue);
#ifdef CONFIG_PROC_FS
EXPORT_SYMBOL(ide_add_proc_entries);
EXPORT_SYMBOL(ide_remove_proc_entries);
EXPORT_SYMBOL(proc_ide_read_geometry);
#endif
EXPORT_SYMBOL(ide_add_setting);
EXPORT_SYMBOL(ide_remove_setting);
......@@ -3433,7 +3431,7 @@ static int __init ata_module_init(void)
*/
#ifdef CONFIG_PCI
if (pci_present()) {
# ifdef CONFIG_BLK_DEV_IDEPCI
# ifdef CONFIG_PCI
ide_scan_pcibus(ide_scan_direction);
# else
# ifdef CONFIG_BLK_DEV_RZ1000
......
......@@ -11,7 +11,7 @@
* Dunno if this fixes both ports, or only the primary port (?).
*/
#include <linux/config.h> /* for CONFIG_BLK_DEV_IDEPCI */
#include <linux/config.h> /* for CONFIG_PCI */
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/delay.h>
......@@ -26,7 +26,7 @@
#include <asm/io.h>
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
void __init ide_init_rz1000(struct ata_channel *hwif) /* called from ide-pci.c */
{
......@@ -87,4 +87,4 @@ void __init ide_probe_for_rz100x (void) /* called from ide.c */
init_rz1000 (dev, "RZ1001");
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
......@@ -70,7 +70,7 @@ static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
*/
static __inline__ void ide_init_default_hwifs(void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
......@@ -79,37 +79,10 @@ static __inline__ void ide_init_default_hwifs(void)
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) do {} while (0)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -21,34 +21,7 @@
#include <asm/arch/ide.h>
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) do {} while (0)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -88,29 +88,6 @@ static __inline__ void ide_init_default_hwifs(void)
}
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
/* some configuration options we don't need */
#undef SUPPORT_VLB_SYNC
......@@ -119,11 +96,7 @@ typedef union {
#undef SUPPORT_SLOW_DATA_PORTS
#define SUPPORT_SLOW_DATA_PORTS 0
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) do {} while (0)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -16,7 +16,7 @@
#include <linux/config.h>
#ifndef MAX_HWIFS
# ifdef CONFIG_BLK_DEV_IDEPCI
# ifdef CONFIG_PCI
#define MAX_HWIFS 10
# else
#define MAX_HWIFS 6
......@@ -74,7 +74,7 @@ static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
static __inline__ void ide_init_default_hwifs(void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
......@@ -83,37 +83,10 @@ static __inline__ void ide_init_default_hwifs(void)
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) do {} while (0)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -18,7 +18,7 @@
#include <linux/irq.h>
#ifndef MAX_HWIFS
# ifdef CONFIG_BLK_DEV_IDEPCI
# ifdef CONFIG_PCI
#define MAX_HWIFS 10
# else
#define MAX_HWIFS 6
......@@ -80,7 +80,7 @@ ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port
static __inline__ void
ide_init_default_hwifs (void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
......@@ -89,37 +89,10 @@ ide_init_default_hwifs (void)
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) do {} while (0)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -80,29 +80,6 @@ static __inline__ void ide_init_default_hwifs(void)
{
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit7 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit5 : 1; /* always 1 */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned head : 4; /* always zeros here */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned HOB : 1; /* 48-bit address ordering */
unsigned reserved456 : 3;
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned SRST : 1; /* host soft reset bit */
unsigned nIEN : 1; /* device INTRQ to host */
unsigned bit0 : 1;
} b;
} control_t;
#undef SUPPORT_SLOW_DATA_PORTS
#define SUPPORT_SLOW_DATA_PORTS 0
......@@ -155,7 +132,6 @@ typedef union {
#define outsl(data_reg, buffer, wcount) outsw(data_reg, buffer, (wcount)<<1)
#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
#define insl_swapw(data_reg, buffer, wcount) \
......@@ -169,101 +145,6 @@ typedef union {
#endif /* CONFIG_ATARI || CONFIG_Q40 */
#define T_CHAR (0x0000) /* char: don't touch */
#define T_SHORT (0x4000) /* short: 12 -> 21 */
#define T_INT (0x8000) /* int: 1234 -> 4321 */
#define T_TEXT (0xc000) /* text: 12 -> 21 */
#define T_MASK_TYPE (0xc000)
#define T_MASK_COUNT (0x3fff)
#define D_CHAR(cnt) (T_CHAR | (cnt))
#define D_SHORT(cnt) (T_SHORT | (cnt))
#define D_INT(cnt) (T_INT | (cnt))
#define D_TEXT(cnt) (T_TEXT | (cnt))
/* Q40 and Atari have byteswapped IDE bus and since many interesting
* values in the identification string are text, chars and words they
* happened to be almost correct without swapping.. However *_capacity
* is needed for drives over 8 GB. RZ */
#if defined(CONFIG_Q40) || defined(CONFIG_ATARI)
#define M68K_IDE_SWAPW (MACH_IS_Q40 || MACH_IS_ATARI)
#endif
#if defined(CONFIG_AMIGA) || defined (CONFIG_MAC) || defined(M68K_IDE_SWAPW)
static u_short driveid_types[] = {
D_SHORT(10), /* config - vendor2 */
D_TEXT(20), /* serial_no */
D_SHORT(3), /* buf_type, buf_size - ecc_bytes */
D_TEXT(48), /* fw_rev - model */
D_CHAR(2), /* max_multsect - vendor3 */
D_SHORT(1), /* dword_io */
D_CHAR(2), /* vendor4 - capability */
D_SHORT(1), /* reserved50 */
D_CHAR(4), /* vendor5 - tDMA */
D_SHORT(4), /* field_valid - cur_sectors */
D_INT(1), /* cur_capacity */
D_CHAR(2), /* multsect - multsect_valid */
D_INT(1), /* lba_capacity */
D_SHORT(194) /* dma_1word - reserved */
};
#define num_driveid_types (sizeof(driveid_types)/sizeof(*driveid_types))
#endif /* CONFIG_AMIGA */
static __inline__ void ide_fix_driveid(struct hd_driveid *id)
{
#if defined(CONFIG_AMIGA) || defined (CONFIG_MAC) || defined(M68K_IDE_SWAPW)
u_char *p = (u_char *)id;
int i, j, cnt;
u_char t;
if (!MACH_IS_AMIGA && !MACH_IS_MAC && !MACH_IS_Q40 && !MACH_IS_ATARI)
return;
#ifdef M68K_IDE_SWAPW
if (M68K_IDE_SWAPW) /* fix bus byteorder first */
for (i=0; i < 512; i+=2) {
t = p[i]; p[i] = p[i+1]; p[i+1] = t;
}
#endif
for (i = 0; i < num_driveid_types; i++) {
cnt = driveid_types[i] & T_MASK_COUNT;
switch (driveid_types[i] & T_MASK_TYPE) {
case T_CHAR:
p += cnt;
break;
case T_SHORT:
for (j = 0; j < cnt; j++) {
t = p[0];
p[0] = p[1];
p[1] = t;
p += 2;
}
break;
case T_INT:
for (j = 0; j < cnt; j++) {
t = p[0];
p[0] = p[3];
p[3] = t;
t = p[1];
p[1] = p[2];
p[2] = t;
p += 4;
}
break;
case T_TEXT:
for (j = 0; j < cnt; j += 2) {
t = p[0];
p[0] = p[1];
p[1] = t;
p += 2;
}
break;
}
}
#endif /* CONFIG_AMIGA */
}
static __inline__ void ide_release_lock (int *ide_lock)
{
#ifdef CONFIG_ATARI
......
......@@ -17,7 +17,7 @@
#include <asm/io.h>
#ifndef MAX_HWIFS
# ifdef CONFIG_BLK_DEV_IDEPCI
# ifdef CONFIG_PCI
#define MAX_HWIFS 10
# else
#define MAX_HWIFS 6
......@@ -53,7 +53,7 @@ static inline void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
static __inline__ void ide_init_default_hwifs(void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
......@@ -62,137 +62,12 @@ static __inline__ void ide_init_default_hwifs(void)
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
#ifdef __MIPSEB__
unsigned bit7 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit5 : 1; /* always 1 */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned head : 4; /* always zeros here */
#else
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
#endif
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
#ifdef __MIPSEB__
unsigned HOB : 1; /* 48-bit address ordering */
unsigned reserved456 : 3;
unsigned SRST : 1; /* host soft reset bit */
unsigned nIEN : 1; /* device INTRQ to host */
unsigned bit0 : 1;
#else
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
#endif
} b;
} control_t;
}
#undef SUPPORT_VLB_SYNC
#define SUPPORT_VLB_SYNC 0
#if defined(__MIPSEB__)
#define T_CHAR (0x0000) /* char: don't touch */
#define T_SHORT (0x4000) /* short: 12 -> 21 */
#define T_INT (0x8000) /* int: 1234 -> 4321 */
#define T_TEXT (0xc000) /* text: 12 -> 21 */
#define T_MASK_TYPE (0xc000)
#define T_MASK_COUNT (0x3fff)
#define D_CHAR(cnt) (T_CHAR | (cnt))
#define D_SHORT(cnt) (T_SHORT | (cnt))
#define D_INT(cnt) (T_INT | (cnt))
#define D_TEXT(cnt) (T_TEXT | (cnt))
static u_short driveid_types[] = {
D_SHORT(10), /* config - vendor2 */
D_TEXT(20), /* serial_no */
D_SHORT(3), /* buf_type - ecc_bytes */
D_TEXT(48), /* fw_rev - model */
D_CHAR(2), /* max_multsect - vendor3 */
D_SHORT(1), /* dword_io */
D_CHAR(2), /* vendor4 - capability */
D_SHORT(1), /* reserved50 */
D_CHAR(4), /* vendor5 - tDMA */
D_SHORT(4), /* field_valid - cur_sectors */
D_INT(1), /* cur_capacity */
D_CHAR(2), /* multsect - multsect_valid */
D_INT(1), /* lba_capacity */
D_SHORT(194) /* dma_1word - reservedyy */
};
#define num_driveid_types (sizeof(driveid_types)/sizeof(*driveid_types))
static __inline__ void ide_fix_driveid(struct hd_driveid *id)
{
u_char *p = (u_char *)id;
int i, j, cnt;
u_char t;
for (i = 0; i < num_driveid_types; i++) {
cnt = driveid_types[i] & T_MASK_COUNT;
switch (driveid_types[i] & T_MASK_TYPE) {
case T_CHAR:
p += cnt;
break;
case T_SHORT:
for (j = 0; j < cnt; j++) {
t = p[0];
p[0] = p[1];
p[1] = t;
p += 2;
}
break;
case T_INT:
for (j = 0; j < cnt; j++) {
t = p[0];
p[0] = p[3];
p[3] = t;
t = p[1];
p[1] = p[2];
p[2] = t;
p += 4;
}
break;
case T_TEXT:
for (j = 0; j < cnt; j += 2) {
t = p[0];
p[0] = p[1];
p[1] = t;
p += 2;
}
break;
};
}
}
#else /* defined(CONFIG_SWAP_IO_SPACE) && defined(__MIPSEB__) */
#define ide_fix_driveid(id) do {} while (0)
#endif
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -20,10 +20,10 @@
#include <linux/config.h>
#ifndef MAX_HWIFS
# ifdef CONFIG_BLK_DEV_IDEPCI
#define MAX_HWIFS 10
# ifdef CONFIG_PCI
# define MAX_HWIFS 10
# else
#define MAX_HWIFS 6
# define MAX_HWIFS 6
# endif
#endif
......@@ -56,7 +56,7 @@ static inline void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
static __inline__ void ide_init_default_hwifs(void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
......@@ -65,82 +65,10 @@ static __inline__ void ide_init_default_hwifs(void)
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
#if defined(CONFIG_SWAP_IO_SPACE) && defined(__MIPSEB__)
#ifdef insl
#undef insl
#endif
#ifdef outsl
#undef outsl
#endif
#ifdef insw
#undef insw
#endif
#ifdef outsw
#undef outsw
#endif
}
#define insw(p,a,c) \
do { \
unsigned short *ptr = (unsigned short *)(a); \
unsigned int i = (c); \
while (i--) \
*ptr++ = inw(p); \
} while (0)
#define insl(p,a,c) \
do { \
unsigned long *ptr = (unsigned long *)(a); \
unsigned int i = (c); \
while (i--) \
*ptr++ = inl(p); \
} while (0)
#define outsw(p,a,c) \
do { \
unsigned short *ptr = (unsigned short *)(a); \
unsigned int i = (c); \
while (i--) \
outw(*ptr++, (p)); \
} while (0)
#define outsl(p,a,c) { \
unsigned long *ptr = (unsigned long *)(a); \
unsigned int i = (c); \
while (i--) \
outl(*ptr++, (p)); \
} while (0)
#endif /* defined(CONFIG_SWAP_IO_SPACE) && defined(__MIPSEB__) */
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) do {} while (0)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -69,7 +69,7 @@ static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
static __inline__ void ide_init_default_hwifs(void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
......@@ -78,37 +78,10 @@ static __inline__ void ide_init_default_hwifs(void)
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) do {} while (0)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -30,8 +30,6 @@
#include <linux/ioport.h>
#include <asm/io.h>
extern void ppc_generic_ide_fix_driveid(struct hd_driveid *id);
struct ide_machdep_calls {
int (*default_irq)(ide_ioreg_t base);
ide_ioreg_t (*default_io_base)(int index);
......@@ -43,9 +41,6 @@ struct ide_machdep_calls {
extern struct ide_machdep_calls ppc_ide_md;
void ppc_generic_ide_fix_driveid(struct hd_driveid *id);
#define ide_fix_driveid(id) ppc_generic_ide_fix_driveid((id))
#undef SUPPORT_SLOW_DATA_PORTS
#define SUPPORT_SLOW_DATA_PORTS 0
#undef SUPPORT_VLB_SYNC
......@@ -96,7 +91,7 @@ static __inline__ void ide_init_hwif_ports(hw_regs_t *hw,
static __inline__ void ide_init_default_hwifs(void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
ide_ioreg_t base;
......@@ -109,36 +104,9 @@ static __inline__ void ide_init_default_hwifs(void)
hw.irq = ide_default_irq(base);
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit7 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit5 : 1; /* always 1 */
unsigned unit : 1; /* drive select number, 0/1 */
unsigned head : 4; /* always zeros here */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned HOB : 1; /* 48-bit address ordering */
unsigned reserved456 : 3;
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned SRST : 1; /* host soft reset bit */
unsigned nIEN : 1; /* device INTRQ to host */
unsigned bit0 : 1;
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
* unless direct IDE on 8xx
*/
#if (defined CONFIG_APUS || defined CONFIG_BLK_DEV_MPC8xx_IDE )
#define ide_ack_intr(hwif) (hwif->hw.ack_intr ? hwif->hw.ack_intr(hwif) : 1)
#else
......
......@@ -24,9 +24,6 @@
#define ide__sti() __sti()
void ppc64_ide_fix_driveid(struct hd_driveid *id);
#define ide_fix_driveid(id) ppc64_ide_fix_driveid((id))
static __inline__ int ide_default_irq(ide_ioreg_t base) { return 0; }
static __inline__ ide_ioreg_t ide_default_io_base(int index) { return 0; }
......@@ -53,33 +50,6 @@ static __inline__ void ide_init_default_hwifs(void)
{
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
/* XXX is this correct? - Anton */
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned HOB : 1; /* 48-bit address ordering */
unsigned reserved456 : 3;
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned SRST : 1; /* host soft reset bit */
unsigned nIEN : 1; /* device INTRQ to host */
unsigned bit0 : 1;
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
/*
* linux/include/asm-arm/ide.h
* linux/include/asm-s390/ide.h
*
* Copyright (C) 1994-1996 Linus Torvalds & authors
*/
......@@ -17,29 +17,6 @@
#define ide__sti() do {} while (0)
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
*/
......@@ -57,4 +34,4 @@ typedef union {
#endif /* __KERNEL__ */
#endif /* __ASMARM_IDE_H */
#endif /* __ASMS390_IDE_H */
/*
* linux/include/asm-arm/ide.h
* linux/include/asm-s390/ide.h
*
* Copyright (C) 1994-1996 Linus Torvalds & authors
*/
......@@ -17,34 +17,7 @@
#define ide__sti() do {} while (0)
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) do {} while (0)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......@@ -57,4 +30,4 @@ typedef union {
#endif /* __KERNEL__ */
#endif /* __ASMARM_IDE_H */
#endif /* __ASMS390_IDE_H */
......@@ -95,7 +95,7 @@ static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
static __inline__ void ide_init_default_hwifs(void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
......@@ -104,37 +104,10 @@ static __inline__ void ide_init_default_hwifs(void)
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) do {} while (0)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -61,7 +61,7 @@ static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
*/
static __inline__ void ide_init_default_hwifs(void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
......@@ -70,32 +70,9 @@ static __inline__ void ide_init_default_hwifs(void)
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
}
typedef union {
unsigned int all : 8; /* all of the bits together */
struct {
unsigned int bit7 : 1;
unsigned int lba : 1;
unsigned int bit5 : 1;
unsigned int unit : 1;
unsigned int head : 4;
} b;
} select_t;
typedef union {
unsigned int all : 8; /* all of the bits together */
struct {
unsigned int HOB : 1; /* 48-bit address ordering */
unsigned int reserved456: 3;
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned int SRST : 1; /* host soft reset bit */
unsigned int nIEN : 1; /* device INTRQ to host */
unsigned int bit0 : 1;
} b;
} control_t;
#undef SUPPORT_SLOW_DATA_PORTS
#define SUPPORT_SLOW_DATA_PORTS 0
......@@ -188,84 +165,6 @@ static __inline__ void ide_outsw(unsigned long port,
/* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */
}
#define T_CHAR (0x0000) /* char: don't touch */
#define T_SHORT (0x4000) /* short: 12 -> 21 */
#define T_INT (0x8000) /* int: 1234 -> 4321 */
#define T_TEXT (0xc000) /* text: 12 -> 21 */
#define T_MASK_TYPE (0xc000)
#define T_MASK_COUNT (0x3fff)
#define D_CHAR(cnt) (T_CHAR | (cnt))
#define D_SHORT(cnt) (T_SHORT | (cnt))
#define D_INT(cnt) (T_INT | (cnt))
#define D_TEXT(cnt) (T_TEXT | (cnt))
static u_short driveid_types[] = {
D_SHORT(10), /* config - vendor2 */
D_TEXT(20), /* serial_no */
D_SHORT(3), /* buf_type - ecc_bytes */
D_TEXT(48), /* fw_rev - model */
D_CHAR(2), /* max_multsect - vendor3 */
D_SHORT(1), /* dword_io */
D_CHAR(2), /* vendor4 - capability */
D_SHORT(1), /* reserved50 */
D_CHAR(4), /* vendor5 - tDMA */
D_SHORT(4), /* field_valid - cur_sectors */
D_INT(1), /* cur_capacity */
D_CHAR(2), /* multsect - multsect_valid */
D_INT(1), /* lba_capacity */
D_SHORT(194) /* dma_1word - reservedyy */
};
#define num_driveid_types (sizeof(driveid_types)/sizeof(*driveid_types))
static __inline__ void ide_fix_driveid(struct hd_driveid *id)
{
u_char *p = (u_char *)id;
int i, j, cnt;
u_char t;
for (i = 0; i < num_driveid_types; i++) {
cnt = driveid_types[i] & T_MASK_COUNT;
switch (driveid_types[i] & T_MASK_TYPE) {
case T_CHAR:
p += cnt;
break;
case T_SHORT:
for (j = 0; j < cnt; j++) {
t = p[0];
p[0] = p[1];
p[1] = t;
p += 2;
}
break;
case T_INT:
for (j = 0; j < cnt; j++) {
t = p[0];
p[0] = p[3];
p[3] = t;
t = p[1];
p[1] = p[2];
p[2] = t;
p += 4;
}
break;
case T_TEXT:
for (j = 0; j < cnt; j += 2) {
t = p[0];
p[0] = p[1];
p[1] = t;
p += 2;
}
break;
};
}
}
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
/* #define ide_ack_intr(hwif) ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1) */
#define ide_release_lock(lock) do {} while (0)
......
......@@ -57,7 +57,7 @@ static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
*/
static __inline__ void ide_init_default_hwifs(void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
......@@ -66,32 +66,9 @@ static __inline__ void ide_init_default_hwifs(void)
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
}
typedef union {
unsigned int all : 8; /* all of the bits together */
struct {
unsigned int bit7 : 1;
unsigned int lba : 1;
unsigned int bit5 : 1;
unsigned int unit : 1;
unsigned int head : 4;
} b;
} select_t;
typedef union {
unsigned int all : 8; /* all of the bits together */
struct {
unsigned int HOB : 1; /* 48-bit address ordering */
unsigned int reserved456: 3;
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned int SRST : 1; /* host soft reset bit */
unsigned int nIEN : 1; /* device INTRQ to host */
unsigned int bit0 : 1;
} b;
} control_t;
#undef SUPPORT_SLOW_DATA_PORTS
#define SUPPORT_SLOW_DATA_PORTS 0
......@@ -204,84 +181,6 @@ static __inline__ void ide_outsw(unsigned long port,
#endif
}
#define T_CHAR (0x0000) /* char: don't touch */
#define T_SHORT (0x4000) /* short: 12 -> 21 */
#define T_INT (0x8000) /* int: 1234 -> 4321 */
#define T_TEXT (0xc000) /* text: 12 -> 21 */
#define T_MASK_TYPE (0xc000)
#define T_MASK_COUNT (0x3fff)
#define D_CHAR(cnt) (T_CHAR | (cnt))
#define D_SHORT(cnt) (T_SHORT | (cnt))
#define D_INT(cnt) (T_INT | (cnt))
#define D_TEXT(cnt) (T_TEXT | (cnt))
static u_short driveid_types[] = {
D_SHORT(10), /* config - vendor2 */
D_TEXT(20), /* serial_no */
D_SHORT(3), /* buf_type - ecc_bytes */
D_TEXT(48), /* fw_rev - model */
D_CHAR(2), /* max_multsect - vendor3 */
D_SHORT(1), /* dword_io */
D_CHAR(2), /* vendor4 - capability */
D_SHORT(1), /* reserved50 */
D_CHAR(4), /* vendor5 - tDMA */
D_SHORT(4), /* field_valid - cur_sectors */
D_INT(1), /* cur_capacity */
D_CHAR(2), /* multsect - multsect_valid */
D_INT(1), /* lba_capacity */
D_SHORT(194) /* dma_1word - reservedyy */
};
#define num_driveid_types (sizeof(driveid_types)/sizeof(*driveid_types))
static __inline__ void ide_fix_driveid(struct hd_driveid *id)
{
u_char *p = (u_char *)id;
int i, j, cnt;
u_char t;
for (i = 0; i < num_driveid_types; i++) {
cnt = driveid_types[i] & T_MASK_COUNT;
switch (driveid_types[i] & T_MASK_TYPE) {
case T_CHAR:
p += cnt;
break;
case T_SHORT:
for (j = 0; j < cnt; j++) {
t = p[0];
p[0] = p[1];
p[1] = t;
p += 2;
}
break;
case T_INT:
for (j = 0; j < cnt; j++) {
t = p[0];
p[0] = p[3];
p[3] = t;
t = p[1];
p[1] = p[2];
p[2] = t;
p += 4;
}
break;
case T_TEXT:
for (j = 0; j < cnt; j += 2) {
t = p[0];
p[0] = p[1];
p[1] = t;
p += 2;
}
break;
};
}
}
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -16,7 +16,7 @@
#include <linux/config.h>
#ifndef MAX_HWIFS
# ifdef CONFIG_BLK_DEV_IDEPCI
# ifdef CONFIG_PCI
#define MAX_HWIFS 10
# else
#define MAX_HWIFS 6
......@@ -74,7 +74,7 @@ static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
static __inline__ void ide_init_default_hwifs(void)
{
#ifndef CONFIG_BLK_DEV_IDEPCI
#ifndef CONFIG_PCI
hw_regs_t hw;
int index;
......@@ -83,37 +83,10 @@ static __inline__ void ide_init_default_hwifs(void)
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
#endif /* CONFIG_BLK_DEV_IDEPCI */
#endif
}
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
} b;
} control_t;
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) do {} while (0)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
......
......@@ -334,6 +334,7 @@ enum {
/* structure returned by HDIO_GET_IDENTITY,
* as per ANSI NCITS ATA6 rev.1b spec
*/
/* if you change something here remember to update ide_fix_driveid() */
struct hd_driveid {
unsigned short config; /* lots of obsolete bit flags */
unsigned short cyls; /* Obsolete, "physical" cyls */
......
......@@ -15,6 +15,7 @@
#include <linux/devfs_fs_kernel.h>
#include <linux/interrupt.h>
#include <linux/bitops.h>
#include <asm/byteorder.h>
#include <asm/hdreg.h>
/*
......@@ -265,6 +266,50 @@ void ide_setup_ports(hw_regs_t *hw,
struct ide_settings_s;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
#if defined(__LITTLE_ENDIAN_BITFIELD)
unsigned head : 4; /* always zeros here */
unsigned unit : 1; /* drive select number: 0/1 */
unsigned bit5 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit7 : 1; /* always 1 */
#elif defined(__BIG_ENDIAN_BITFIELD)
unsigned bit7 : 1;
unsigned lba : 1;
unsigned bit5 : 1;
unsigned unit : 1;
unsigned head : 4;
#else
#error "Please fix <asm/byteorder.h>"
#endif
} b;
} select_t;
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
#if defined(__LITTLE_ENDIAN_BITFIELD)
unsigned bit0 : 1;
unsigned nIEN : 1; /* device INTRQ to host */
unsigned SRST : 1; /* host soft reset bit */
unsigned bit3 : 1; /* ATA-2 thingy */
unsigned reserved456 : 3;
unsigned HOB : 1; /* 48-bit address ordering */
#elif defined(__BIG_ENDIAN_BITFIELD)
unsigned HOB : 1;
unsigned reserved456 : 3;
unsigned bit3 : 1;
unsigned SRST : 1;
unsigned nIEN : 1;
unsigned bit0 : 1;
#else
#error "Please fix <asm/byteorder.h>"
#endif
} b;
} control_t;
/*
* ATA/ATAPI device structure :
*/
......@@ -386,7 +431,7 @@ struct ata_channel {
ide_ioreg_t io_ports[IDE_NR_PORTS]; /* task file registers */
hw_regs_t hw; /* Hardware info */
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
struct pci_dev *pci_dev; /* for pci chipsets */
#endif
struct ata_device drives[MAX_DRIVES]; /* drive info */
......@@ -589,7 +634,6 @@ void destroy_proc_ide_drives(struct ata_channel *);
void create_proc_ide_interfaces(void);
void ide_add_proc_entries(struct proc_dir_entry *dir, ide_proc_entry_t *p, void *data);
void ide_remove_proc_entries(struct proc_dir_entry *dir, ide_proc_entry_t *p);
read_proc_t proc_ide_read_capacity;
read_proc_t proc_ide_read_geometry;
/*
......@@ -797,6 +841,7 @@ extern int ide_cmd_ioctl(struct ata_device *drive, unsigned long arg);
void ide_delay_50ms(void);
extern byte ide_auto_reduce_xfer(struct ata_device *);
extern void ide_fix_driveid(struct hd_driveid *id);
extern int ide_driveid_update(struct ata_device *);
extern int ide_ata66_check(struct ata_device *, struct ata_taskfile *);
extern int ide_config_drive_speed(struct ata_device *, byte);
......@@ -854,7 +899,7 @@ extern struct ata_device *ide_scan_devices(byte, const char *, struct ata_operat
extern int ide_register_subdriver(struct ata_device *, struct ata_operations *);
extern int ide_unregister_subdriver(struct ata_device *drive);
#ifdef CONFIG_BLK_DEV_IDEPCI
#ifdef CONFIG_PCI
# define ON_BOARD 1
# define NEVER_BOARD 0
# ifdef CONFIG_BLK_DEV_OFFBOARD
......
......@@ -932,6 +932,8 @@
#define PCI_VENDOR_ID_TTI 0x1103
#define PCI_DEVICE_ID_TTI_HPT343 0x0003
#define PCI_DEVICE_ID_TTI_HPT366 0x0004
#define PCI_DEVICE_ID_TTI_HPT372 0x0005
#define PCI_DEVICE_ID_TTI_HPT374 0x0008
#define PCI_VENDOR_ID_VIA 0x1106
#define PCI_DEVICE_ID_VIA_8363_0 0x0305
......
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