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Commit fc4cbfbb authored by Rohit Agarwal's avatar Rohit Agarwal Committed by Bjorn Andersson
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arm64: dts: qcom: sm8350: Update the RPMHPD bindings entry 

Update the RPMHPD bindings entry as per the new generic bindings defined in
rpmhpd.h for SM8350 SoC.
Signed-off-by: default avatarRohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1689840545-5094-3-git-send-email-quic_rohiagar@quicinc.comSigned-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 34e2fd6a
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Showing with 38 additions and 37 deletions
arch/arm64/boot/dts/qcom/sm8350.dtsi
View file @ fc4cbfbb
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <dt-bindings/mailbox/qcom-ipcc.h> #include <dt-bindings/mailbox/qcom-ipcc.h>
#include <dt-bindings/phy/phy-qcom-qmp.h> #include <dt-bindings/phy/phy-qcom-qmp.h>
#include <dt-bindings/power/qcom-rpmpd.h> #include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/power/qcom,rpmhpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/thermal/thermal.h> #include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/interconnect/qcom,sm8350.h> #include <dt-bindings/interconnect/qcom,sm8350.h>
...@@ -745,7 +746,7 @@ spi14: spi@880000 { ...@@ -745,7 +746,7 @@ spi14: spi@880000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_120mhz>; operating-points-v2 = <&qup_opp_table_120mhz>;
dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>, dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,
<&gpi_dma2 1 0 QCOM_GPI_SPI>; <&gpi_dma2 1 0 QCOM_GPI_SPI>;
...@@ -777,7 +778,7 @@ spi15: spi@884000 { ...@@ -777,7 +778,7 @@ spi15: spi@884000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_120mhz>; operating-points-v2 = <&qup_opp_table_120mhz>;
dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>, dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
<&gpi_dma2 1 1 QCOM_GPI_SPI>; <&gpi_dma2 1 1 QCOM_GPI_SPI>;
...@@ -809,7 +810,7 @@ spi16: spi@888000 { ...@@ -809,7 +810,7 @@ spi16: spi@888000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>, dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
<&gpi_dma2 1 2 QCOM_GPI_SPI>; <&gpi_dma2 1 2 QCOM_GPI_SPI>;
...@@ -841,7 +842,7 @@ spi17: spi@88c000 { ...@@ -841,7 +842,7 @@ spi17: spi@88c000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>, dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
<&gpi_dma2 1 3 QCOM_GPI_SPI>; <&gpi_dma2 1 3 QCOM_GPI_SPI>;
...@@ -859,7 +860,7 @@ spi18: spi@890000 { ...@@ -859,7 +860,7 @@ spi18: spi@890000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>, dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>,
<&gpi_dma2 1 4 QCOM_GPI_SPI>; <&gpi_dma2 1 4 QCOM_GPI_SPI>;
...@@ -877,7 +878,7 @@ uart18: serial@890000 { ...@@ -877,7 +878,7 @@ uart18: serial@890000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart18_default>; pinctrl-0 = <&qup_uart18_default>;
interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
status = "disabled"; status = "disabled";
}; };
...@@ -904,7 +905,7 @@ spi19: spi@894000 { ...@@ -904,7 +905,7 @@ spi19: spi@894000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>, dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
<&gpi_dma2 1 5 QCOM_GPI_SPI>; <&gpi_dma2 1 5 QCOM_GPI_SPI>;
...@@ -971,7 +972,7 @@ spi0: spi@980000 { ...@@ -971,7 +972,7 @@ spi0: spi@980000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
<&gpi_dma0 1 0 QCOM_GPI_SPI>; <&gpi_dma0 1 0 QCOM_GPI_SPI>;
...@@ -1003,7 +1004,7 @@ spi1: spi@984000 { ...@@ -1003,7 +1004,7 @@ spi1: spi@984000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
<&gpi_dma0 1 1 QCOM_GPI_SPI>; <&gpi_dma0 1 1 QCOM_GPI_SPI>;
...@@ -1035,7 +1036,7 @@ spi2: spi@988000 { ...@@ -1035,7 +1036,7 @@ spi2: spi@988000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
<&gpi_dma0 1 2 QCOM_GPI_SPI>; <&gpi_dma0 1 2 QCOM_GPI_SPI>;
...@@ -1053,7 +1054,7 @@ uart2: serial@98c000 { ...@@ -1053,7 +1054,7 @@ uart2: serial@98c000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart3_default_state>; pinctrl-0 = <&qup_uart3_default_state>;
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
status = "disabled"; status = "disabled";
}; };
...@@ -1066,7 +1067,7 @@ spi3: spi@98c000 { ...@@ -1066,7 +1067,7 @@ spi3: spi@98c000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
<&gpi_dma0 1 3 QCOM_GPI_SPI>; <&gpi_dma0 1 3 QCOM_GPI_SPI>;
...@@ -1098,7 +1099,7 @@ spi4: spi@990000 { ...@@ -1098,7 +1099,7 @@ spi4: spi@990000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
<&gpi_dma0 1 4 QCOM_GPI_SPI>; <&gpi_dma0 1 4 QCOM_GPI_SPI>;
...@@ -1130,7 +1131,7 @@ spi5: spi@994000 { ...@@ -1130,7 +1131,7 @@ spi5: spi@994000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
<&gpi_dma0 1 5 QCOM_GPI_SPI>; <&gpi_dma0 1 5 QCOM_GPI_SPI>;
...@@ -1162,7 +1163,7 @@ spi6: spi@998000 { ...@@ -1162,7 +1163,7 @@ spi6: spi@998000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>, dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
<&gpi_dma0 1 6 QCOM_GPI_SPI>; <&gpi_dma0 1 6 QCOM_GPI_SPI>;
...@@ -1180,7 +1181,7 @@ uart6: serial@998000 { ...@@ -1180,7 +1181,7 @@ uart6: serial@998000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart6_default>; pinctrl-0 = <&qup_uart6_default>;
interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
status = "disabled"; status = "disabled";
}; };
...@@ -1207,7 +1208,7 @@ spi7: spi@99c000 { ...@@ -1207,7 +1208,7 @@ spi7: spi@99c000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>, dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>,
<&gpi_dma0 1 7 QCOM_GPI_SPI>; <&gpi_dma0 1 7 QCOM_GPI_SPI>;
...@@ -1274,7 +1275,7 @@ spi8: spi@a80000 { ...@@ -1274,7 +1275,7 @@ spi8: spi@a80000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_120mhz>; operating-points-v2 = <&qup_opp_table_120mhz>;
dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>, dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
<&gpi_dma1 1 0 QCOM_GPI_SPI>; <&gpi_dma1 1 0 QCOM_GPI_SPI>;
...@@ -1306,7 +1307,7 @@ spi9: spi@a84000 { ...@@ -1306,7 +1307,7 @@ spi9: spi@a84000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>, dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
<&gpi_dma1 1 1 QCOM_GPI_SPI>; <&gpi_dma1 1 1 QCOM_GPI_SPI>;
...@@ -1338,7 +1339,7 @@ spi10: spi@a88000 { ...@@ -1338,7 +1339,7 @@ spi10: spi@a88000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>, dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
<&gpi_dma1 1 2 QCOM_GPI_SPI>; <&gpi_dma1 1 2 QCOM_GPI_SPI>;
...@@ -1370,7 +1371,7 @@ spi11: spi@a8c000 { ...@@ -1370,7 +1371,7 @@ spi11: spi@a8c000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>, dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
<&gpi_dma1 1 3 QCOM_GPI_SPI>; <&gpi_dma1 1 3 QCOM_GPI_SPI>;
...@@ -1402,7 +1403,7 @@ spi12: spi@a90000 { ...@@ -1402,7 +1403,7 @@ spi12: spi@a90000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>, dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
<&gpi_dma1 1 4 QCOM_GPI_SPI>; <&gpi_dma1 1 4 QCOM_GPI_SPI>;
...@@ -1434,7 +1435,7 @@ spi13: spi@a94000 { ...@@ -1434,7 +1435,7 @@ spi13: spi@a94000 {
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>; operating-points-v2 = <&qup_opp_table_100mhz>;
dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>, dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
<&gpi_dma1 1 5 QCOM_GPI_SPI>; <&gpi_dma1 1 5 QCOM_GPI_SPI>;
...@@ -2011,8 +2012,8 @@ mpss: remoteproc@4080000 { ...@@ -2011,8 +2012,8 @@ mpss: remoteproc@4080000 {
clocks = <&rpmhcc RPMH_CXO_CLK>; clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo"; clock-names = "xo";
power-domains = <&rpmhpd SM8350_CX>, power-domains = <&rpmhpd RPMHPD_CX>,
<&rpmhpd SM8350_MSS>; <&rpmhpd RPMHPD_MSS>;
power-domain-names = "cx", "mss"; power-domain-names = "cx", "mss";
interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
...@@ -2052,8 +2053,8 @@ slpi: remoteproc@5c00000 { ...@@ -2052,8 +2053,8 @@ slpi: remoteproc@5c00000 {
clocks = <&rpmhcc RPMH_CXO_CLK>; clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo"; clock-names = "xo";
power-domains = <&rpmhpd SM8350_LCX>, power-domains = <&rpmhpd RPMHPD_LCX>,
<&rpmhpd SM8350_LMX>; <&rpmhpd RPMHPD_LMX>;
power-domain-names = "lcx", "lmx"; power-domain-names = "lcx", "lmx";
memory-region = <&pil_slpi_mem>; memory-region = <&pil_slpi_mem>;
...@@ -2122,7 +2123,7 @@ sdhc_2: mmc@8804000 { ...@@ -2122,7 +2123,7 @@ sdhc_2: mmc@8804000 {
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>; <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
interconnect-names = "sdhc-ddr","cpu-sdhc"; interconnect-names = "sdhc-ddr","cpu-sdhc";
iommus = <&apps_smmu 0x4a0 0x0>; iommus = <&apps_smmu 0x4a0 0x0>;
power-domains = <&rpmhpd SM8350_CX>; power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&sdhc2_opp_table>; operating-points-v2 = <&sdhc2_opp_table>;
bus-width = <4>; bus-width = <4>;
dma-coherent; dma-coherent;
...@@ -2483,7 +2484,7 @@ mdss_mdp: display-controller@ae01000 { ...@@ -2483,7 +2484,7 @@ mdss_mdp: display-controller@ae01000 {
assigned-clock-rates = <19200000>; assigned-clock-rates = <19200000>;
operating-points-v2 = <&dpu_opp_table>; operating-points-v2 = <&dpu_opp_table>;
power-domains = <&rpmhpd SM8350_MMCX>; power-domains = <&rpmhpd RPMHPD_MMCX>;
interrupt-parent = <&mdss>; interrupt-parent = <&mdss>;
interrupts = <0>; interrupts = <0>;
...@@ -2546,7 +2547,7 @@ mdss_dp: displayport-controller@ae90000 { ...@@ -2546,7 +2547,7 @@ mdss_dp: displayport-controller@ae90000 {
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
operating-points-v2 = <&dp_opp_table>; operating-points-v2 = <&dp_opp_table>;
power-domains = <&rpmhpd SM8350_MMCX>; power-domains = <&rpmhpd RPMHPD_MMCX>;
status = "disabled"; status = "disabled";
...@@ -2614,7 +2615,7 @@ mdss_dsi0: dsi@ae94000 { ...@@ -2614,7 +2615,7 @@ mdss_dsi0: dsi@ae94000 {
<&mdss_dsi0_phy 1>; <&mdss_dsi0_phy 1>;
operating-points-v2 = <&dsi0_opp_table>; operating-points-v2 = <&dsi0_opp_table>;
power-domains = <&rpmhpd SM8350_MMCX>; power-domains = <&rpmhpd RPMHPD_MMCX>;
phys = <&mdss_dsi0_phy>; phys = <&mdss_dsi0_phy>;
...@@ -2712,7 +2713,7 @@ mdss_dsi1: dsi@ae96000 { ...@@ -2712,7 +2713,7 @@ mdss_dsi1: dsi@ae96000 {
<&mdss_dsi1_phy 1>; <&mdss_dsi1_phy 1>;
operating-points-v2 = <&dsi1_opp_table>; operating-points-v2 = <&dsi1_opp_table>;
power-domains = <&rpmhpd SM8350_MMCX>; power-domains = <&rpmhpd RPMHPD_MMCX>;
phys = <&mdss_dsi1_phy>; phys = <&mdss_dsi1_phy>;
...@@ -2803,7 +2804,7 @@ dispcc: clock-controller@af00000 { ...@@ -2803,7 +2804,7 @@ dispcc: clock-controller@af00000 {
#reset-cells = <1>; #reset-cells = <1>;
#power-domain-cells = <1>; #power-domain-cells = <1>;
power-domains = <&rpmhpd SM8350_MMCX>; power-domains = <&rpmhpd RPMHPD_MMCX>;
}; };
pdc: interrupt-controller@b220000 { pdc: interrupt-controller@b220000 {
...@@ -3196,8 +3197,8 @@ adsp: remoteproc@17300000 { ...@@ -3196,8 +3197,8 @@ adsp: remoteproc@17300000 {
clocks = <&rpmhcc RPMH_CXO_CLK>; clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo"; clock-names = "xo";
power-domains = <&rpmhpd SM8350_LCX>, power-domains = <&rpmhpd RPMHPD_LCX>,
<&rpmhpd SM8350_LMX>; <&rpmhpd RPMHPD_LMX>;
power-domain-names = "lcx", "lmx"; power-domain-names = "lcx", "lmx";
memory-region = <&pil_adsp_mem>; memory-region = <&pil_adsp_mem>;
...@@ -3432,8 +3433,8 @@ cdsp: remoteproc@98900000 { ...@@ -3432,8 +3433,8 @@ cdsp: remoteproc@98900000 {
clocks = <&rpmhcc RPMH_CXO_CLK>; clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo"; clock-names = "xo";
power-domains = <&rpmhpd SM8350_CX>, power-domains = <&rpmhpd RPMHPD_CX>,
<&rpmhpd SM8350_MXC>; <&rpmhpd RPMHPD_MXC>;
power-domain-names = "cx", "mxc"; power-domain-names = "cx", "mxc";
interconnects = <&compute_noc MASTER_CDSP_PROC 0 &mc_virt SLAVE_EBI1 0>; interconnects = <&compute_noc MASTER_CDSP_PROC 0 &mc_virt SLAVE_EBI1 0>;
......
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