Commit 02aed8f3 authored by Roland Vossen's avatar Roland Vossen Committed by Greg Kroah-Hartman

staging: brcm80211: removed unused code because of mac rev cleanup

Code cleanup. Removed more defines, data structures and functions that were
unused because this driver supports mac core rev 22 and up. Got rid of redundant
brackets in wlc_bmac_txstatus() by moving locally defined variables above {}
scope.
Signed-off-by: default avatarRoland Vossen <rvossen@broadcom.com>
Reviewed-by: default avatarArend van Spriel <arend@broadcom.com>
Reviewed-by: default avatarBrett Rudley <brudley@broadcom.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 3746507a
...@@ -70,13 +70,6 @@ typedef volatile union { ...@@ -70,13 +70,6 @@ typedef volatile union {
} w; } w;
} pmqreg_t; } pmqreg_t;
/* pio register set 2/4 bytes union for d11 fifo */
typedef volatile union {
pio2regp_t b2; /* < corerev 8 */
pio4regp_t b4;
} u_pioreg_t;
/* dma/pio corerev >= 11 */
typedef volatile struct { typedef volatile struct {
dma64regs_t dmaxmt; /* dma tx */ dma64regs_t dmaxmt; /* dma tx */
pio4regs_t piotx; /* pio tx */ pio4regs_t piotx; /* pio tx */
...@@ -158,9 +151,7 @@ typedef volatile struct _d11regs { ...@@ -158,9 +151,7 @@ typedef volatile struct _d11regs {
u32 PAD[5]; /* 0x1ec - 0x1fc */ u32 PAD[5]; /* 0x1ec - 0x1fc */
/* 0x200-0x37F dma/pio registers */ /* 0x200-0x37F dma/pio registers */
volatile union { fifo64_t fifo64regs[6];
fifo64_t f64regs[6];
} fifo;
/* FIFO diagnostic port access */ /* FIFO diagnostic port access */
dma32diag_t dmafifo; /* 0x380 - 0x38C */ dma32diag_t dmafifo; /* 0x380 - 0x38C */
...@@ -551,8 +542,6 @@ typedef volatile struct _d11regs { ...@@ -551,8 +542,6 @@ typedef volatile struct _d11regs {
/* frmtxstatus */ /* frmtxstatus */
#define TXS_V (1 << 0) /* valid bit */ #define TXS_V (1 << 0) /* valid bit */
#define TXS_STATUS_MASK 0xffff #define TXS_STATUS_MASK 0xffff
#define TXS_COMPAT_MASK 0x3
#define TXS_COMPAT_SHIFT 1
#define TXS_FID_MASK 0xffff0000 #define TXS_FID_MASK 0xffff0000
#define TXS_FID_SHIFT 16 #define TXS_FID_SHIFT 16
...@@ -573,10 +562,6 @@ typedef volatile struct _d11regs { ...@@ -573,10 +562,6 @@ typedef volatile struct _d11regs {
#define CCS_ERSRC_REQ_HT 0x00000010 /* HT avail request */ #define CCS_ERSRC_REQ_HT 0x00000010 /* HT avail request */
#define CCS_ERSRC_AVAIL_HT 0x00020000 /* HT clock available */ #define CCS_ERSRC_AVAIL_HT 0x00020000 /* HT clock available */
/* d11_pwrctl, corerev16 only */
#define D11_PHYPLL_AVAIL_REQ 0x000010000 /* request PHY PLL resource */
#define D11_PHYPLL_AVAIL_STS 0x001000000 /* PHY PLL is available */
/* tsf_cfprep register */ /* tsf_cfprep register */
#define CFPREP_CBI_MASK 0xffffffc0 #define CFPREP_CBI_MASK 0xffffffc0
#define CFPREP_CBI_SHIFT 6 #define CFPREP_CBI_SHIFT 6
......
...@@ -88,8 +88,8 @@ ...@@ -88,8 +88,8 @@
#define DMAREG(wlc_hw, direction, fifonum) \ #define DMAREG(wlc_hw, direction, fifonum) \
((direction == DMA_TX) ? \ ((direction == DMA_TX) ? \
(void *)&(wlc_hw->regs->fifo.f64regs[fifonum].dmaxmt) : \ (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmaxmt) : \
(void *)&(wlc_hw->regs->fifo.f64regs[fifonum].dmarcv)) (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmarcv))
/* /*
* The following table lists the buffer memory allocated to xmt fifos in HW. * The following table lists the buffer memory allocated to xmt fifos in HW.
...@@ -123,7 +123,6 @@ static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw); ...@@ -123,7 +123,6 @@ static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw);
/* used by wlc_dpc() */ /* used by wlc_dpc() */
static bool wlc_bmac_dotxstatus(struct wlc_hw_info *wlc, tx_status_t *txs, static bool wlc_bmac_dotxstatus(struct wlc_hw_info *wlc, tx_status_t *txs,
u32 s2); u32 s2);
static bool wlc_bmac_txstatus_corerev4(struct wlc_hw_info *wlc);
static bool wlc_bmac_txstatus(struct wlc_hw_info *wlc, bool bound, bool *fatal); static bool wlc_bmac_txstatus(struct wlc_hw_info *wlc, bool bound, bool *fatal);
static bool wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound); static bool wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound);
...@@ -237,7 +236,6 @@ static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit) ...@@ -237,7 +236,6 @@ static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit)
{ {
struct wlc_hw_info *wlc_hw = wlc->hw; struct wlc_hw_info *wlc_hw = wlc->hw;
u32 macintmask; u32 macintmask;
u32 tmp;
WL_TRACE("wl%d: wlc_setband_inact\n", wlc_hw->unit); WL_TRACE("wl%d: wlc_setband_inact\n", wlc_hw->unit);
...@@ -1329,18 +1327,11 @@ static void wlc_clkctl_clk(struct wlc_hw_info *wlc_hw, uint mode) ...@@ -1329,18 +1327,11 @@ static void wlc_clkctl_clk(struct wlc_hw_info *wlc_hw, uint mode)
} }
wlc_hw->forcefastclk = (mode == CLK_FAST); wlc_hw->forcefastclk = (mode == CLK_FAST);
} else { } else {
bool wakeup_ucode;
/* old chips w/o PMU, force HT through cc, /* old chips w/o PMU, force HT through cc,
* then use FCA to verify mac is running fast clock * then use FCA to verify mac is running fast clock
*/ */
wakeup_ucode = false;
if (wlc_hw->up && wakeup_ucode)
wlc_ucode_wake_override_set(wlc_hw,
WLC_WAKE_OVERRIDE_CLKCTL);
wlc_hw->forcefastclk = si_clkctl_cc(wlc_hw->sih, mode); wlc_hw->forcefastclk = si_clkctl_cc(wlc_hw->sih, mode);
/* check fast clock is available (if core is not in reset) */ /* check fast clock is available (if core is not in reset) */
...@@ -1362,11 +1353,6 @@ static void wlc_clkctl_clk(struct wlc_hw_info *wlc_hw, uint mode) ...@@ -1362,11 +1353,6 @@ static void wlc_clkctl_clk(struct wlc_hw_info *wlc_hw, uint mode)
else else
mboolclr(wlc_hw->wake_override, mboolclr(wlc_hw->wake_override,
WLC_WAKE_OVERRIDE_FORCEFAST); WLC_WAKE_OVERRIDE_FORCEFAST);
/* ok to clear the wakeup now */
if (wlc_hw->up && wakeup_ucode)
wlc_ucode_wake_override_clear(wlc_hw,
WLC_WAKE_OVERRIDE_CLKCTL);
} }
} }
...@@ -1635,8 +1621,6 @@ wlc_bmac_set_rcmta(struct wlc_hw_info *wlc_hw, int idx, ...@@ -1635,8 +1621,6 @@ wlc_bmac_set_rcmta(struct wlc_hw_info *wlc_hw, int idx,
WL_TRACE("wl%d: %s\n", wlc_hw->unit, __func__); WL_TRACE("wl%d: %s\n", wlc_hw->unit, __func__);
ASSERT(wlc_hw->corerev > 4);
mac_hm = mac_hm =
(addr[3] << 24) | (addr[2] << 16) | (addr[3] << 24) | (addr[2] << 16) |
(addr[1] << 8) | addr[0]; (addr[1] << 8) | addr[0];
...@@ -1667,7 +1651,7 @@ wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, int match_reg_offset, ...@@ -1667,7 +1651,7 @@ wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, int match_reg_offset,
WL_TRACE("wl%d: wlc_bmac_set_addrmatch\n", wlc_hw->unit); WL_TRACE("wl%d: wlc_bmac_set_addrmatch\n", wlc_hw->unit);
ASSERT((match_reg_offset < RCM_SIZE) || (wlc_hw->corerev == 4)); ASSERT(match_reg_offset < RCM_SIZE);
regs = wlc_hw->regs; regs = wlc_hw->regs;
mac_l = addr[0] | (addr[1] << 8); mac_l = addr[0] | (addr[1] << 8);
...@@ -1755,7 +1739,6 @@ void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax) ...@@ -1755,7 +1739,6 @@ void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax)
void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw) void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw)
{ {
bool fastclk; bool fastclk;
u32 tmp;
/* request FAST clock if not on */ /* request FAST clock if not on */
fastclk = wlc_hw->forcefastclk; fastclk = wlc_hw->forcefastclk;
...@@ -2332,7 +2315,6 @@ static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw) ...@@ -2332,7 +2315,6 @@ static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw)
txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu]; txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
} }
exit:
/* /*
* need to propagate to shm location to be in sync since ucode/hw won't * need to propagate to shm location to be in sync since ucode/hw won't
* do this * do this
...@@ -3021,7 +3003,6 @@ static inline u32 wlc_intstatus(struct wlc_info *wlc, bool in_isr) ...@@ -3021,7 +3003,6 @@ static inline u32 wlc_intstatus(struct wlc_info *wlc, bool in_isr)
struct wlc_hw_info *wlc_hw = wlc->hw; struct wlc_hw_info *wlc_hw = wlc->hw;
d11regs_t *regs = wlc_hw->regs; d11regs_t *regs = wlc_hw->regs;
u32 macintstatus; u32 macintstatus;
u32 intstatus_rxfifo, intstatus_txsfifo;
struct osl_info *osh; struct osl_info *osh;
osh = wlc_hw->osh; osh = wlc_hw->osh;
...@@ -3130,42 +3111,6 @@ bool BCMFASTPATH wlc_isr(struct wlc_info *wlc, bool *wantdpc) ...@@ -3130,42 +3111,6 @@ bool BCMFASTPATH wlc_isr(struct wlc_info *wlc, bool *wantdpc)
} }
/* process tx completion events for corerev < 5 */
static bool wlc_bmac_txstatus_corerev4(struct wlc_hw_info *wlc_hw)
{
struct sk_buff *status_p;
tx_status_t *txs;
struct osl_info *osh;
bool fatal = false;
WL_TRACE("wl%d: wlc_txstatusrecv\n", wlc_hw->unit);
osh = wlc_hw->osh;
while (!fatal && (status_p = dma_rx(wlc_hw->di[RX_TXSTATUS_FIFO]))) {
txs = (tx_status_t *) status_p->data;
/* MAC uses little endian only */
ltoh16_buf((void *)txs, sizeof(tx_status_t));
/* shift low bits for tx_status_t status compatibility */
txs->status = (txs->status & ~TXS_COMPAT_MASK)
| (((txs->status & TXS_COMPAT_MASK) << TXS_COMPAT_SHIFT));
fatal = wlc_bmac_dotxstatus(wlc_hw, txs, 0);
pkt_buf_free_skb(osh, status_p, false);
}
if (fatal)
return true;
/* post more rbufs */
dma_rxfill(wlc_hw->di[RX_TXSTATUS_FIFO]);
return false;
}
static bool BCMFASTPATH static bool BCMFASTPATH
wlc_bmac_dotxstatus(struct wlc_hw_info *wlc_hw, tx_status_t *txs, u32 s2) wlc_bmac_dotxstatus(struct wlc_hw_info *wlc_hw, tx_status_t *txs, u32 s2)
{ {
...@@ -3190,18 +3135,19 @@ wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal) ...@@ -3190,18 +3135,19 @@ wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal)
{ {
bool morepending = false; bool morepending = false;
struct wlc_info *wlc = wlc_hw->wlc; struct wlc_info *wlc = wlc_hw->wlc;
WL_TRACE("wl%d: wlc_bmac_txstatus\n", wlc_hw->unit);
{
d11regs_t *regs; d11regs_t *regs;
struct osl_info *osh; struct osl_info *osh;
tx_status_t txstatus, *txs; tx_status_t txstatus, *txs;
u32 s1, s2; u32 s1, s2;
uint n = 0; uint n = 0;
/* Param 'max_tx_num' indicates max. # tx status to process before break out. */ /*
* Param 'max_tx_num' indicates max. # tx status to process before
* break out.
*/
uint max_tx_num = bound ? wlc->pub->tunables->txsbnd : -1; uint max_tx_num = bound ? wlc->pub->tunables->txsbnd : -1;
WL_TRACE("wl%d: wlc_bmac_txstatus\n", wlc_hw->unit);
txs = &txstatus; txs = &txstatus;
regs = wlc_hw->regs; regs = wlc_hw->regs;
osh = wlc_hw->osh; osh = wlc_hw->osh;
...@@ -3235,7 +3181,6 @@ wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal) ...@@ -3235,7 +3181,6 @@ wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal)
if (n >= max_tx_num) if (n >= max_tx_num)
morepending = true; morepending = true;
}
if (!pktq_empty(&wlc->active_queue->q)) if (!pktq_empty(&wlc->active_queue->q))
wlc_send_q(wlc, wlc->active_queue); wlc_send_q(wlc, wlc->active_queue);
...@@ -3441,7 +3386,6 @@ bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw) ...@@ -3441,7 +3386,6 @@ bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw)
{ {
d11regs_t *regs; d11regs_t *regs;
u32 w, val; u32 w, val;
volatile u16 *reg16;
struct osl_info *osh; struct osl_info *osh;
WL_TRACE("wl%d: validate_chip_access\n", wlc_hw->unit); WL_TRACE("wl%d: validate_chip_access\n", wlc_hw->unit);
......
...@@ -326,8 +326,6 @@ void wlc_get_rcmta(struct wlc_info *wlc, int idx, u8 *addr) ...@@ -326,8 +326,6 @@ void wlc_get_rcmta(struct wlc_info *wlc, int idx, u8 *addr)
WL_TRACE("wl%d: %s\n", WLCWLUNIT(wlc), __func__); WL_TRACE("wl%d: %s\n", WLCWLUNIT(wlc), __func__);
ASSERT(wlc->pub->corerev > 4);
osh = wlc->osh; osh = wlc->osh;
W_REG(osh, &regs->objaddr, (OBJADDR_RCMTA_SEL | (idx * 2))); W_REG(osh, &regs->objaddr, (OBJADDR_RCMTA_SEL | (idx * 2)));
...@@ -6459,13 +6457,11 @@ void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs) ...@@ -6459,13 +6457,11 @@ void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs)
/* GP timer is a freerunning 32 bit counter, decrements at 1 us rate */ /* GP timer is a freerunning 32 bit counter, decrements at 1 us rate */
void wlc_hwtimer_gptimer_set(struct wlc_info *wlc, uint us) void wlc_hwtimer_gptimer_set(struct wlc_info *wlc, uint us)
{ {
ASSERT(wlc->pub->corerev >= 3); /* no gptimer in earlier revs */
W_REG(wlc->osh, &wlc->regs->gptimer, us); W_REG(wlc->osh, &wlc->regs->gptimer, us);
} }
void wlc_hwtimer_gptimer_abort(struct wlc_info *wlc) void wlc_hwtimer_gptimer_abort(struct wlc_info *wlc)
{ {
ASSERT(wlc->pub->corerev >= 3);
W_REG(wlc->osh, &wlc->regs->gptimer, 0); W_REG(wlc->osh, &wlc->regs->gptimer, 0);
} }
...@@ -6579,16 +6575,6 @@ void wlc_high_dpc(struct wlc_info *wlc, u32 macintstatus) ...@@ -6579,16 +6575,6 @@ void wlc_high_dpc(struct wlc_info *wlc, u32 macintstatus)
ASSERT(wlc_ps_check(wlc)); ASSERT(wlc_ps_check(wlc));
} }
static void *wlc_15420war(struct wlc_info *wlc, uint queue)
{
struct hnddma_pub *di;
void *p;
ASSERT(queue < NFIFO);
return NULL;
}
static void wlc_war16165(struct wlc_info *wlc, bool tx) static void wlc_war16165(struct wlc_info *wlc, bool tx)
{ {
if (tx) { if (tx) {
...@@ -6651,9 +6637,6 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) ...@@ -6651,9 +6637,6 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2)
p = GETNEXTTXP(wlc, queue); p = GETNEXTTXP(wlc, queue);
if (WLC_WAR16165(wlc)) if (WLC_WAR16165(wlc))
wlc_war16165(wlc, false); wlc_war16165(wlc, false);
if (p == NULL)
p = wlc_15420war(wlc, queue);
ASSERT(p != NULL);
if (p == NULL) if (p == NULL)
goto fatal; goto fatal;
......
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