drm/amd/display: fix resume hang because of DP short pulse

There is a hard hang observed during resume from S3 when
the system receives a DP short pulse interrupt. This is
because there are two code paths contending for GPIO
access for AUX channel transactions. One such path is
through amdgpu_dm_display_resume() function which is
invoked from the regular system resume code path. The
other path is through handle_hpd_rx_irq(), which is
invoked in response to system receiving DP short pulse
interrupt. handle_hpd_rx_irq() guards against conflicting
GPIO access using hpd_lock, but the GPIO access from
amdgpu_dm_display_resume() remains unguarded.

This patch makes sure we use hpd_lock inside
amdgpu_dm_display_resume() to avoid race conditions
for GPIO access.
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

@@ -580,9 +580,11 @@ int amdgpu_dm_display_resume(struct amdgpu_device *adev )
 		if (aconnector->mst_port)
 			continue;
 
+		mutex_lock(&aconnector->hpd_lock);
 		dc_link_detect(aconnector->dc_link, false);
 		aconnector->dc_sink = NULL;
 		amdgpu_dm_update_connector_after_detect(aconnector);
+		mutex_unlock(&aconnector->hpd_lock);
 	}
 
 	/* Force mode set in atomic comit */