Commit 04b3b72b authored by Robert Marko's avatar Robert Marko Committed by Bjorn Andersson

ARM: dts: qcom: ipq4019: Add SDHCI controller node

IPQ4019 has a built in SD/eMMC controller which is supported by the
SDHCI MSM driver, by the "qcom,sdhci-msm-v4" binding.
So lets add the appropriate node for it.
Signed-off-by: default avatarRobert Marko <robimarko@gmail.com>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 54ecb8f7
...@@ -206,6 +206,18 @@ tlmm: pinctrl@1000000 { ...@@ -206,6 +206,18 @@ tlmm: pinctrl@1000000 {
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
}; };
sdhci: sdhci@7824900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0x7824900 0x11c>, <0x7824000 0x800>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
bus-width = <8>;
clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_DCD_XO_CLK>;
clock-names = "core", "iface", "xo";
status = "disabled";
};
blsp_dma: dma@7884000 { blsp_dma: dma@7884000 {
compatible = "qcom,bam-v1.7.0"; compatible = "qcom,bam-v1.7.0";
reg = <0x07884000 0x23000>; reg = <0x07884000 0x23000>;
......
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