Commit 080deab6 authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher

drm/amdgpu: add soc15 common ip block support for renoir

This patch adds common ip support for renoir.
Acked-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b51a26a0
...@@ -637,6 +637,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) ...@@ -637,6 +637,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
case CHIP_VEGA10: case CHIP_VEGA10:
case CHIP_VEGA12: case CHIP_VEGA12:
case CHIP_RAVEN: case CHIP_RAVEN:
case CHIP_RENOIR:
vega10_reg_base_init(adev); vega10_reg_base_init(adev);
break; break;
case CHIP_VEGA20: case CHIP_VEGA20:
...@@ -1133,6 +1134,11 @@ static int soc15_common_early_init(void *handle) ...@@ -1133,6 +1134,11 @@ static int soc15_common_early_init(void *handle)
adev->pg_flags = 0; adev->pg_flags = 0;
adev->external_rev_id = adev->rev_id + 0x32; adev->external_rev_id = adev->rev_id + 0x32;
break; break;
case CHIP_RENOIR:
adev->cg_flags = 0;
adev->pg_flags = 0;
adev->external_rev_id = adev->rev_id + 0x91;
break;
default: default:
/* FIXME: not supported yet */ /* FIXME: not supported yet */
return -EINVAL; return -EINVAL;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment