Commit 0b42c286 authored by David S. Miller's avatar David S. Miller

Merge branch 'arm-bpf-next'

Nicolas Schichan says:

====================
ARM BPF JIT features

This series adds support for more instructions to the ARM BPF JIT
namely skb netdevice type retrieval, skb payload offset retrieval, and
skb packet type retrieval.

This allows 35 tests to use the JIT instead of 29 before.

This series depends on the "BPF JIT fixes for ARM" serie sent earlier.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents e11f40b9 5bf705b4
...@@ -857,7 +857,9 @@ static int build_body(struct jit_ctx *ctx) ...@@ -857,7 +857,9 @@ static int build_body(struct jit_ctx *ctx)
emit(ARM_LDR_I(r_A, r_scratch, off), ctx); emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
break; break;
case BPF_ANC | SKF_AD_IFINDEX: case BPF_ANC | SKF_AD_IFINDEX:
case BPF_ANC | SKF_AD_HATYPE:
/* A = skb->dev->ifindex */ /* A = skb->dev->ifindex */
/* A = skb->dev->type */
ctx->seen |= SEEN_SKB; ctx->seen |= SEEN_SKB;
off = offsetof(struct sk_buff, dev); off = offsetof(struct sk_buff, dev);
emit(ARM_LDR_I(r_scratch, r_skb, off), ctx); emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
...@@ -867,8 +869,24 @@ static int build_body(struct jit_ctx *ctx) ...@@ -867,8 +869,24 @@ static int build_body(struct jit_ctx *ctx)
BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
ifindex) != 4); ifindex) != 4);
BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
type) != 2);
if (code == (BPF_ANC | SKF_AD_IFINDEX)) {
off = offsetof(struct net_device, ifindex); off = offsetof(struct net_device, ifindex);
emit(ARM_LDR_I(r_A, r_scratch, off), ctx); emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
} else {
/*
* offset of field "type" in "struct
* net_device" is above what can be
* used in the ldrh rd, [rn, #imm]
* instruction, so load the offset in
* a register and use ldrh rd, [rn, rm]
*/
off = offsetof(struct net_device, type);
emit_mov_i(ARM_R3, off, ctx);
emit(ARM_LDRH_R(r_A, r_scratch, ARM_R3), ctx);
}
break; break;
case BPF_ANC | SKF_AD_MARK: case BPF_ANC | SKF_AD_MARK:
ctx->seen |= SEEN_SKB; ctx->seen |= SEEN_SKB;
...@@ -895,6 +913,17 @@ static int build_body(struct jit_ctx *ctx) ...@@ -895,6 +913,17 @@ static int build_body(struct jit_ctx *ctx)
OP_IMM3(ARM_AND, r_A, r_A, 0x1, ctx); OP_IMM3(ARM_AND, r_A, r_A, 0x1, ctx);
} }
break; break;
case BPF_ANC | SKF_AD_PKTTYPE:
ctx->seen |= SEEN_SKB;
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
__pkt_type_offset[0]) != 1);
off = PKT_TYPE_OFFSET();
emit(ARM_LDRB_I(r_A, r_skb, off), ctx);
emit(ARM_AND_I(r_A, r_A, PKT_TYPE_MAX), ctx);
#ifdef __BIG_ENDIAN_BITFIELD
emit(ARM_LSR_I(r_A, r_A, 5), ctx);
#endif
break;
case BPF_ANC | SKF_AD_QUEUE: case BPF_ANC | SKF_AD_QUEUE:
ctx->seen |= SEEN_SKB; ctx->seen |= SEEN_SKB;
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
...@@ -904,6 +933,14 @@ static int build_body(struct jit_ctx *ctx) ...@@ -904,6 +933,14 @@ static int build_body(struct jit_ctx *ctx)
off = offsetof(struct sk_buff, queue_mapping); off = offsetof(struct sk_buff, queue_mapping);
emit(ARM_LDRH_I(r_A, r_skb, off), ctx); emit(ARM_LDRH_I(r_A, r_skb, off), ctx);
break; break;
case BPF_ANC | SKF_AD_PAY_OFFSET:
ctx->seen |= SEEN_SKB | SEEN_CALL;
emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
emit_mov_i(ARM_R3, (unsigned int)skb_get_poff, ctx);
emit_blx_r(ARM_R3, ctx);
emit(ARM_MOV_R(r_A, ARM_R0), ctx);
break;
case BPF_LDX | BPF_W | BPF_ABS: case BPF_LDX | BPF_W | BPF_ABS:
/* /*
* load a 32bit word from struct seccomp_data. * load a 32bit word from struct seccomp_data.
......
...@@ -74,6 +74,7 @@ ...@@ -74,6 +74,7 @@
#define ARM_INST_LDRB_I 0x05d00000 #define ARM_INST_LDRB_I 0x05d00000
#define ARM_INST_LDRB_R 0x07d00000 #define ARM_INST_LDRB_R 0x07d00000
#define ARM_INST_LDRH_I 0x01d000b0 #define ARM_INST_LDRH_I 0x01d000b0
#define ARM_INST_LDRH_R 0x019000b0
#define ARM_INST_LDR_I 0x05900000 #define ARM_INST_LDR_I 0x05900000
#define ARM_INST_LDM 0x08900000 #define ARM_INST_LDM 0x08900000
...@@ -160,6 +161,8 @@ ...@@ -160,6 +161,8 @@
| (rm)) | (rm))
#define ARM_LDRH_I(rt, rn, off) (ARM_INST_LDRH_I | (rt) << 12 | (rn) << 16 \ #define ARM_LDRH_I(rt, rn, off) (ARM_INST_LDRH_I | (rt) << 12 | (rn) << 16 \
| (((off) & 0xf0) << 4) | ((off) & 0xf)) | (((off) & 0xf0) << 4) | ((off) & 0xf))
#define ARM_LDRH_R(rt, rn, rm) (ARM_INST_LDRH_R | (rt) << 12 | (rn) << 16 \
| (rm))
#define ARM_LDM(rn, regs) (ARM_INST_LDM | (rn) << 16 | (regs)) #define ARM_LDM(rn, regs) (ARM_INST_LDM | (rn) << 16 | (regs))
......
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