Commit 0bbb88f0 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Linus Torvalds

[PATCH] Q40/Q60 RTC update

Prepend Q40/Q60 specific RTC definitions with Q40_
parent d44458f8
...@@ -204,8 +204,9 @@ void q40_process_int (int level, struct pt_regs *fp) ...@@ -204,8 +204,9 @@ void q40_process_int (int level, struct pt_regs *fp)
* this stuff doesn't really belong here.. * this stuff doesn't really belong here..
*/ */
int ql_ticks=0; /* 200Hz ticks since last jiffie */ int ql_ticks; /* 200Hz ticks since last jiffie */
static int sound_ticks=0; static int sound_ticks;
short q40rtc_oldsecs;
#define SVOL 45 #define SVOL 45
...@@ -242,9 +243,9 @@ static void q40_timer_int (int irq, void * dev, struct pt_regs * regs) ...@@ -242,9 +243,9 @@ static void q40_timer_int (int irq, void * dev, struct pt_regs * regs)
*DAC_RIGHT=sval; *DAC_RIGHT=sval;
} }
#if defined(CONFIG_Q40RTC) || defined(CONFIG_GEN_RTC) #if defined(CONFIG_Q40RTC) || defined(CONFIG_GEN_RTC)
if (gen_rtc_irq_ctrl && (q40rtc_oldsecs != RTC_SECS)) if (gen_rtc_irq_ctrl && (q40rtc_oldsecs != Q40_RTC_SECS))
{ {
q40rtc_oldsecs = RTC_SECS; q40rtc_oldsecs = Q40_RTC_SECS;
gen_rtc_irq_flags = RTC_UIE; gen_rtc_irq_flags = RTC_UIE;
gen_rtc_interrupt(0); gen_rtc_interrupt(0);
} }
......
...@@ -10,7 +10,6 @@ ...@@ -10,7 +10,6 @@
#define q40_master_addr 0xff000000 #define q40_master_addr 0xff000000
#define q40_rtc_addr 0xff021ffc
#define IIRQ_REG 0x0 /* internal IRQ reg */ #define IIRQ_REG 0x0 /* internal IRQ reg */
#define EIRQ_REG 0x4 /* external ... */ #define EIRQ_REG 0x4 /* external ... */
...@@ -43,28 +42,25 @@ ...@@ -43,28 +42,25 @@
#define master_inb(_reg_) in_8((unsigned char *)q40_master_addr+_reg_) #define master_inb(_reg_) in_8((unsigned char *)q40_master_addr+_reg_)
#define master_outb(_b_,_reg_) out_8((unsigned char *)q40_master_addr+_reg_,_b_) #define master_outb(_b_,_reg_) out_8((unsigned char *)q40_master_addr+_reg_,_b_)
/* define some Q40 specific ints */
#include "q40ints.h"
/* RTC defines */ /* RTC defines */
#define Q40_RTC_BASE (q40_rtc_addr) #define Q40_RTC_BASE (0xff021ffc)
#define RTC_YEAR (*(unsigned char *)(Q40_RTC_BASE+0))
#define RTC_MNTH (*(unsigned char *)(Q40_RTC_BASE-4))
#define RTC_DATE (*(unsigned char *)(Q40_RTC_BASE-8))
#define RTC_DOW (*(unsigned char *)(Q40_RTC_BASE-12))
#define RTC_HOUR (*(unsigned char *)(Q40_RTC_BASE-16))
#define RTC_MINS (*(unsigned char *)(Q40_RTC_BASE-20))
#define RTC_SECS (*(unsigned char *)(Q40_RTC_BASE-24))
#define RTC_CTRL (*(unsigned char *)(Q40_RTC_BASE-28))
#define Q40_RTC_YEAR (*(volatile unsigned char *)(Q40_RTC_BASE+0))
#define Q40_RTC_MNTH (*(volatile unsigned char *)(Q40_RTC_BASE-4))
#define Q40_RTC_DATE (*(volatile unsigned char *)(Q40_RTC_BASE-8))
#define Q40_RTC_DOW (*(volatile unsigned char *)(Q40_RTC_BASE-12))
#define Q40_RTC_HOUR (*(volatile unsigned char *)(Q40_RTC_BASE-16))
#define Q40_RTC_MINS (*(volatile unsigned char *)(Q40_RTC_BASE-20))
#define Q40_RTC_SECS (*(volatile unsigned char *)(Q40_RTC_BASE-24))
#define Q40_RTC_CTRL (*(volatile unsigned char *)(Q40_RTC_BASE-28))
/* some control bits */ /* some control bits */
#define RTC_READ 64 /* prepare for reading */ #define Q40_RTC_READ 64 /* prepare for reading */
#define RTC_WRITE 128 #define Q40_RTC_WRITE 128
/* define some Q40 specific ints */
#include "q40ints.h"
/* misc defs */ /* misc defs */
#define DAC_LEFT ((unsigned char *)0xff008000) #define DAC_LEFT ((unsigned char *)0xff008000)
......
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