Commit 0c92de2c authored by Misael Lopez Cruz's avatar Misael Lopez Cruz Committed by Tony Lindgren

ARM: dts: dra7: Use eDMA and add DAT port address for McASP3

McASP3 does not support constant addressing mode on the DAT
port, so increment transfers must be used instead.  This
restriction is also applicable for McASP1 and McASP2.

This DMA addressing constraint poses a major problem for sDMA
where constant addressing mode is used on the peripheral side.
Unfortunately, using increment transfers in sDMA comes with
important side effects.

The addressing mode used in eDMA is INC, so the silicon limitation
described above has no impact and the McASP3 DAT port can be
safely added by switching to eDMA instead of sDMA.
Signed-off-by: default avatarMisael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 248948fb
...@@ -1469,12 +1469,13 @@ atl: atl@4843c000 { ...@@ -1469,12 +1469,13 @@ atl: atl@4843c000 {
mcasp3: mcasp@48468000 { mcasp3: mcasp@48468000 {
compatible = "ti,dra7-mcasp-audio"; compatible = "ti,dra7-mcasp-audio";
ti,hwmods = "mcasp3"; ti,hwmods = "mcasp3";
reg = <0x48468000 0x2000>; reg = <0x48468000 0x2000>,
reg-names = "mpu"; <0x46000000 0x1000>;
reg-names = "mpu","dat";
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx", "rx"; interrupt-names = "tx", "rx";
dmas = <&sdma_xbar 133>, <&sdma_xbar 132>; dmas = <&edma_xbar 133 1>, <&edma_xbar 132 1>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
clocks = <&mcasp3_aux_gfclk_mux>, <&mcasp3_ahclkx_mux>; clocks = <&mcasp3_aux_gfclk_mux>, <&mcasp3_ahclkx_mux>;
clock-names = "fck", "ahclkx"; clock-names = "fck", "ahclkx";
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment