Commit 10a6e183 authored by Tomi Valkeinen's avatar Tomi Valkeinen Committed by Tero Kristo

ARM: dts: am43xx-clocks.dtsi: add ti, set-rate-parent to display clock path

We need set-rate-parent flags for the display's clock path so that the
DSS driver can change the clock rate of the PLL.

This patchs adds the ti,set-rate-parent flag to disp_clk and
dpll_disp_m2_ck clock nodes.
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
parent 1be7b88c
...@@ -277,6 +277,7 @@ dpll_disp_m2_ck: dpll_disp_m2_ck { ...@@ -277,6 +277,7 @@ dpll_disp_m2_ck: dpll_disp_m2_ck {
reg = <0x2e30>; reg = <0x2e30>;
ti,index-starts-at-one; ti,index-starts-at-one;
ti,invert-autoidle-bit; ti,invert-autoidle-bit;
ti,set-rate-parent;
}; };
dpll_per_ck: dpll_per_ck { dpll_per_ck: dpll_per_ck {
...@@ -559,6 +560,7 @@ disp_clk: disp_clk { ...@@ -559,6 +560,7 @@ disp_clk: disp_clk {
compatible = "ti,mux-clock"; compatible = "ti,mux-clock";
clocks = <&dpll_disp_m2_ck>, <&dpll_core_m5_ck>, <&dpll_per_m2_ck>; clocks = <&dpll_disp_m2_ck>, <&dpll_core_m5_ck>, <&dpll_per_m2_ck>;
reg = <0x4244>; reg = <0x4244>;
ti,set-rate-parent;
}; };
dpll_extdev_ck: dpll_extdev_ck { dpll_extdev_ck: dpll_extdev_ck {
......
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