Commit 13e582f1 authored by Hirokazu Takata's avatar Hirokazu Takata Committed by Linus Torvalds

[PATCH] m32r: build fix for SMP kernel

Here is a patch to fix compile errors of 2.6.11-rc4 for the m32r SMP
kernel.


 * include/asm-m32r/spinlock.h:
	- Add read_can_lock() and write_can_lock() to fix build errors for SMP.
	- Rename 'lock' to 'slock'. (cf. Changesets 1.1966.85.1)

 * arch/m32r/kernel/smp.c:
	- Rename 'lock' to 'slock'. (cf. Changesets 1.1966.85.1)
Signed-off-by: default avatarHirokazu Takata <takata@linux-m32r.org>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 97a4e84b
...@@ -953,7 +953,7 @@ unsigned long send_IPI_mask_phys(cpumask_t physid_mask, int ipi_num, ...@@ -953,7 +953,7 @@ unsigned long send_IPI_mask_phys(cpumask_t physid_mask, int ipi_num,
"ldi r4, #1 \n\t" "ldi r4, #1 \n\t"
"st r4, @%2 \n\t" "st r4, @%2 \n\t"
: "=&r"(ipicr_val) : "=&r"(ipicr_val)
: "r"(flags), "r"(&ipilock->lock), "r"(ipicr_addr), : "r"(flags), "r"(&ipilock->slock), "r"(ipicr_addr),
"r"(mask), "r"(try), "r"(my_physid_mask) "r"(mask), "r"(try), "r"(my_physid_mask)
: "memory", "r4" : "memory", "r4"
#ifdef CONFIG_CHIP_M32700_TS1 #ifdef CONFIG_CHIP_M32700_TS1
......
...@@ -20,23 +20,13 @@ extern int printk(const char * fmt, ...) ...@@ -20,23 +20,13 @@ extern int printk(const char * fmt, ...)
#define RW_LOCK_BIAS 0x01000000 #define RW_LOCK_BIAS 0x01000000
#define RW_LOCK_BIAS_STR "0x01000000" #define RW_LOCK_BIAS_STR "0x01000000"
/* It seems that people are forgetting to
* initialize their spinlocks properly, tsk tsk.
* Remember to turn this off in 2.4. -ben
*/
#if defined(CONFIG_DEBUG_SPINLOCK)
#define SPINLOCK_DEBUG 1
#else
#define SPINLOCK_DEBUG 0
#endif
/* /*
* Your basic SMP spinlocks, allowing only a single CPU anywhere * Your basic SMP spinlocks, allowing only a single CPU anywhere
*/ */
typedef struct { typedef struct {
volatile int lock; volatile int slock;
#if SPINLOCK_DEBUG #ifdef CONFIG_DEBUG_SPINLOCK
unsigned magic; unsigned magic;
#endif #endif
#ifdef CONFIG_PREEMPT #ifdef CONFIG_PREEMPT
...@@ -46,7 +36,7 @@ typedef struct { ...@@ -46,7 +36,7 @@ typedef struct {
#define SPINLOCK_MAGIC 0xdead4ead #define SPINLOCK_MAGIC 0xdead4ead
#if SPINLOCK_DEBUG #ifdef CONFIG_DEBUG_SPINLOCK
#define SPINLOCK_MAGIC_INIT , SPINLOCK_MAGIC #define SPINLOCK_MAGIC_INIT , SPINLOCK_MAGIC
#else #else
#define SPINLOCK_MAGIC_INIT /* */ #define SPINLOCK_MAGIC_INIT /* */
...@@ -63,7 +53,7 @@ typedef struct { ...@@ -63,7 +53,7 @@ typedef struct {
* We make no fairness assumptions. They have a cost. * We make no fairness assumptions. They have a cost.
*/ */
#define spin_is_locked(x) (*(volatile int *)(&(x)->lock) <= 0) #define spin_is_locked(x) (*(volatile int *)(&(x)->slock) <= 0)
#define spin_unlock_wait(x) do { barrier(); } while(spin_is_locked(x)) #define spin_unlock_wait(x) do { barrier(); } while(spin_is_locked(x))
#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock) #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
...@@ -80,11 +70,11 @@ static inline int _raw_spin_trylock(spinlock_t *lock) ...@@ -80,11 +70,11 @@ static inline int _raw_spin_trylock(spinlock_t *lock)
unsigned long tmp1, tmp2; unsigned long tmp1, tmp2;
/* /*
* lock->lock : =1 : unlock * lock->slock : =1 : unlock
* : <=0 : lock * : <=0 : lock
* { * {
* oldval = lock->lock; <--+ need atomic operation * oldval = lock->slock; <--+ need atomic operation
* lock->lock = 0; <--+ * lock->slock = 0; <--+
* } * }
*/ */
__asm__ __volatile__ ( __asm__ __volatile__ (
...@@ -97,7 +87,7 @@ static inline int _raw_spin_trylock(spinlock_t *lock) ...@@ -97,7 +87,7 @@ static inline int _raw_spin_trylock(spinlock_t *lock)
"unlock %1, @%3; \n\t" "unlock %1, @%3; \n\t"
"mvtc %2, psw; \n\t" "mvtc %2, psw; \n\t"
: "=&r" (oldval), "=&r" (tmp1), "=&r" (tmp2) : "=&r" (oldval), "=&r" (tmp1), "=&r" (tmp2)
: "r" (&lock->lock) : "r" (&lock->slock)
: "memory" : "memory"
#ifdef CONFIG_CHIP_M32700_TS1 #ifdef CONFIG_CHIP_M32700_TS1
, "r6" , "r6"
...@@ -111,22 +101,22 @@ static inline void _raw_spin_lock(spinlock_t *lock) ...@@ -111,22 +101,22 @@ static inline void _raw_spin_lock(spinlock_t *lock)
{ {
unsigned long tmp0, tmp1; unsigned long tmp0, tmp1;
#if SPINLOCK_DEBUG #ifdef CONFIG_DEBUG_SPINLOCK
__label__ here; __label__ here;
here: here:
if (lock->magic != SPINLOCK_MAGIC) { if (lock->magic != SPINLOCK_MAGIC) {
printk("eip: %p\n", &&here); printk("pc: %p\n", &&here);
BUG(); BUG();
} }
#endif #endif
/* /*
* lock->lock : =1 : unlock * lock->slock : =1 : unlock
* : <=0 : lock * : <=0 : lock
* *
* for ( ; ; ) { * for ( ; ; ) {
* lock->lock -= 1; <-- need atomic operation * lock->slock -= 1; <-- need atomic operation
* if (lock->lock == 0) break; * if (lock->slock == 0) break;
* for ( ; lock->lock <= 0 ; ); * for ( ; lock->slock <= 0 ; );
* } * }
*/ */
__asm__ __volatile__ ( __asm__ __volatile__ (
...@@ -149,7 +139,7 @@ static inline void _raw_spin_lock(spinlock_t *lock) ...@@ -149,7 +139,7 @@ static inline void _raw_spin_lock(spinlock_t *lock)
"bra 2b; \n\t" "bra 2b; \n\t"
LOCK_SECTION_END LOCK_SECTION_END
: "=&r" (tmp0), "=&r" (tmp1) : "=&r" (tmp0), "=&r" (tmp1)
: "r" (&lock->lock) : "r" (&lock->slock)
: "memory" : "memory"
#ifdef CONFIG_CHIP_M32700_TS1 #ifdef CONFIG_CHIP_M32700_TS1
, "r6" , "r6"
...@@ -159,12 +149,12 @@ static inline void _raw_spin_lock(spinlock_t *lock) ...@@ -159,12 +149,12 @@ static inline void _raw_spin_lock(spinlock_t *lock)
static inline void _raw_spin_unlock(spinlock_t *lock) static inline void _raw_spin_unlock(spinlock_t *lock)
{ {
#if SPINLOCK_DEBUG #ifdef CONFIG_DEBUG_SPINLOCK
BUG_ON(lock->magic != SPINLOCK_MAGIC); BUG_ON(lock->magic != SPINLOCK_MAGIC);
BUG_ON(!spin_is_locked(lock)); BUG_ON(!spin_is_locked(lock));
#endif #endif
mb(); mb();
lock->lock = 1; lock->slock = 1;
} }
/* /*
...@@ -179,7 +169,7 @@ static inline void _raw_spin_unlock(spinlock_t *lock) ...@@ -179,7 +169,7 @@ static inline void _raw_spin_unlock(spinlock_t *lock)
*/ */
typedef struct { typedef struct {
volatile int lock; volatile int lock;
#if SPINLOCK_DEBUG #ifdef CONFIG_DEBUG_SPINLOCK
unsigned magic; unsigned magic;
#endif #endif
#ifdef CONFIG_PREEMPT #ifdef CONFIG_PREEMPT
...@@ -189,7 +179,7 @@ typedef struct { ...@@ -189,7 +179,7 @@ typedef struct {
#define RWLOCK_MAGIC 0xdeaf1eed #define RWLOCK_MAGIC 0xdeaf1eed
#if SPINLOCK_DEBUG #ifdef CONFIG_DEBUG_SPINLOCK
#define RWLOCK_MAGIC_INIT , RWLOCK_MAGIC #define RWLOCK_MAGIC_INIT , RWLOCK_MAGIC
#else #else
#define RWLOCK_MAGIC_INIT /* */ #define RWLOCK_MAGIC_INIT /* */
...@@ -199,6 +189,18 @@ typedef struct { ...@@ -199,6 +189,18 @@ typedef struct {
#define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0) #define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0)
/**
* read_can_lock - would read_trylock() succeed?
* @lock: the rwlock in question.
*/
#define read_can_lock(x) ((int)(x)->lock > 0)
/**
* write_can_lock - would write_trylock() succeed?
* @lock: the rwlock in question.
*/
#define write_can_lock(x) ((x)->lock == RW_LOCK_BIAS)
/* /*
* On x86, we implement read-write locks as a 32-bit counter * On x86, we implement read-write locks as a 32-bit counter
* with the high bit (sign) being the "contended" bit. * with the high bit (sign) being the "contended" bit.
...@@ -214,7 +216,7 @@ static inline void _raw_read_lock(rwlock_t *rw) ...@@ -214,7 +216,7 @@ static inline void _raw_read_lock(rwlock_t *rw)
{ {
unsigned long tmp0, tmp1; unsigned long tmp0, tmp1;
#if SPINLOCK_DEBUG #ifdef CONFIG_DEBUG_SPINLOCK
BUG_ON(rw->magic != RWLOCK_MAGIC); BUG_ON(rw->magic != RWLOCK_MAGIC);
#endif #endif
/* /*
...@@ -268,7 +270,7 @@ static inline void _raw_write_lock(rwlock_t *rw) ...@@ -268,7 +270,7 @@ static inline void _raw_write_lock(rwlock_t *rw)
{ {
unsigned long tmp0, tmp1, tmp2; unsigned long tmp0, tmp1, tmp2;
#if SPINLOCK_DEBUG #ifdef CONFIG_DEBUG_SPINLOCK
BUG_ON(rw->magic != RWLOCK_MAGIC); BUG_ON(rw->magic != RWLOCK_MAGIC);
#endif #endif
/* /*
......
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