Commit 1633d8d3 authored by Tony Lindgren's avatar Tony Lindgren

ARM: OMAP2+: Drop legacy platform data for dra7 aes

We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: default avatarTero Kristo <t-kristo@ti.com>
Reviewed-by: default avatarTero Kristo <t-kristo@ti.com>
Tested-by: default avatarKeerthy <j-keerthy@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent c3150217
......@@ -654,7 +654,6 @@ hdmi: encoder@58060000 {
aes1_target: target-module@4b500000 {
compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "aes1";
reg = <0x4b500080 0x4>,
<0x4b500084 0x4>,
<0x4b500088 0x4>;
......@@ -686,7 +685,6 @@ aes1: aes@0 {
aes2_target: target-module@4b700000 {
compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "aes2";
reg = <0x4b700080 0x4>,
<0x4b700084 0x4>,
<0x4b700088 0x4>;
......
......@@ -626,48 +626,6 @@ static struct omap_hwmod dra7xx_dss_hdmi_hwmod = {
.parent_hwmod = &dra7xx_dss_hwmod,
};
/* AES (the 'P' (public) device) */
static struct omap_hwmod_class_sysconfig dra7xx_aes_sysc = {
.rev_offs = 0x0080,
.sysc_offs = 0x0084,
.syss_offs = 0x0088,
.sysc_flags = SYSS_HAS_RESET_STATUS,
};
static struct omap_hwmod_class dra7xx_aes_hwmod_class = {
.name = "aes",
.sysc = &dra7xx_aes_sysc,
};
/* AES1 */
static struct omap_hwmod dra7xx_aes1_hwmod = {
.name = "aes1",
.class = &dra7xx_aes_hwmod_class,
.clkdm_name = "l4sec_clkdm",
.main_clk = "l3_iclk_div",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4SEC_AES1_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4SEC_AES1_CONTEXT_OFFSET,
.modulemode = MODULEMODE_HWCTRL,
},
},
};
/* AES2 */
static struct omap_hwmod dra7xx_aes2_hwmod = {
.name = "aes2",
.class = &dra7xx_aes_hwmod_class,
.clkdm_name = "l4sec_clkdm",
.main_clk = "l3_iclk_div",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4SEC_AES2_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4SEC_AES2_CONTEXT_OFFSET,
.modulemode = MODULEMODE_HWCTRL,
},
},
};
/*
......@@ -1736,22 +1694,6 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3_main_1 -> aes1 */
static struct omap_hwmod_ocp_if dra7xx_l3_main_1__aes1 = {
.master = &dra7xx_l3_main_1_hwmod,
.slave = &dra7xx_aes1_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3_main_1 -> aes2 */
static struct omap_hwmod_ocp_if dra7xx_l3_main_1__aes2 = {
.master = &dra7xx_l3_main_1_hwmod,
.slave = &dra7xx_aes2_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per1 -> elm */
static struct omap_hwmod_ocp_if dra7xx_l4_per1__elm = {
.master = &dra7xx_l4_per1_hwmod,
......@@ -2121,8 +2063,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l3_main_1__dss,
&dra7xx_l3_main_1__dispc,
&dra7xx_l3_main_1__hdmi,
&dra7xx_l3_main_1__aes1,
&dra7xx_l3_main_1__aes2,
&dra7xx_l4_per1__elm,
&dra7xx_l3_main_1__gpmc,
&dra7xx_l4_cfg__mpu,
......
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