Commit 1750a22f authored by Mitch Williams's avatar Mitch Williams Committed by Jeff Kirsher

i40e: delay after VF reset

Delay a minimum of 10ms after VF reset, to allow the hardware's internal
FIFOs to flush.

Change-ID: I8a02ddb28c9f0d7303a1eb21d0b2443e5b4c1cda
Signed-off-by: default avatarMitch Williams <mitch.a.williams@intel.com>
Tested-by: default avatarJim Young <james.m.young@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 83840e4b
...@@ -668,13 +668,13 @@ void i40e_reset_vf(struct i40e_vf *vf, bool flr) ...@@ -668,13 +668,13 @@ void i40e_reset_vf(struct i40e_vf *vf, bool flr)
/* poll VPGEN_VFRSTAT reg to make sure /* poll VPGEN_VFRSTAT reg to make sure
* that reset is complete * that reset is complete
*/ */
for (i = 0; i < 100; i++) { for (i = 0; i < 10; i++) {
/* vf reset requires driver to first reset the /* VF reset requires driver to first reset the VF and then
* vf and then poll the status register to make sure * poll the status register to make sure that the reset
* that the requested op was completed * completed successfully. Due to internal HW FIFO flushes,
* successfully * we must wait 10ms before the register will be valid.
*/ */
usleep_range(10, 20); usleep_range(10000, 20000);
reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id)); reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) { if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
rsd = true; rsd = true;
......
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