Commit 1774afe7 authored by Jacek Anaszewski's avatar Jacek Anaszewski Committed by Mauro Carvalho Chehab

[media] s5p-jpeg: Document sclk-jpeg clock for Exynos3250 SoC

JPEG IP on Exynos3250 SoC requires enabling two clock gates
for its operation. This patch documents this requirement.
Signed-off-by: default avatarJacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent ee67674a
......@@ -3,9 +3,13 @@ Samsung S5P/EXYNOS SoC series JPEG codec
Required properties:
- compatible : should be one of:
"samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg";
"samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg",
"samsung,exynos3250-jpeg";
- reg : address and length of the JPEG codec IP register set;
- interrupts : specifies the JPEG codec IP interrupt;
- clocks : should contain the JPEG codec IP gate clock specifier, from the
common clock bindings;
- clock-names : should contain "jpeg" entry.
- clock-names : should contain:
- "jpeg" for the core gate clock,
- "sclk" for the special clock (optional).
- clocks : should contain the clock specifier and clock ID list
matching entries in the clock-names property; from
the common clock bindings.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment