Commit 1c57de69 authored by David S. Miller's avatar David S. Miller

Merge branch 'net-aquantia-implement-vlan-offloads'

Igor Russkikh says:

====================
net: aquantia: implement vlan offloads

This patchset introduces hardware VLAN offload support and also does some
maintenance: we replace driver version with uts version string, add
documentation file for atlantic driver, and update maintainers
adding Igor as a maintainer.

v3: shuffle doc sections, per Andrew's comments

v2: updates in doc, gpl spdx tag cleanup
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 0b58f648 04f207fb
aQuantia AQtion Driver for the aQuantia Multi-Gigabit PCI Express Family of
Ethernet Adapters
=============================================================================
Contents
========
- Identifying Your Adapter
- Configuration
- Supported ethtool options
- Command Line Parameters
- Config file parameters
- Support
- License
Identifying Your Adapter
========================
The driver in this release is compatible with AQC-100, AQC-107, AQC-108 based ethernet adapters.
SFP+ Devices (for AQC-100 based adapters)
----------------------------------
This release tested with passive Direct Attach Cables (DAC) and SFP+/LC Optical Transceiver.
Configuration
=========================
Viewing Link Messages
---------------------
Link messages will not be displayed to the console if the distribution is
restricting system messages. In order to see network driver link messages on
your console, set dmesg to eight by entering the following:
dmesg -n 8
NOTE: This setting is not saved across reboots.
Jumbo Frames
------------
The driver supports Jumbo Frames for all adapters. Jumbo Frames support is
enabled by changing the MTU to a value larger than the default of 1500.
The maximum value for the MTU is 16000. Use the `ip` command to
increase the MTU size. For example:
ip link set mtu 16000 dev enp1s0
ethtool
-------
The driver utilizes the ethtool interface for driver configuration and
diagnostics, as well as displaying statistical information. The latest
ethtool version is required for this functionality.
NAPI
----
NAPI (Rx polling mode) is supported in the atlantic driver.
Supported ethtool options
============================
Viewing adapter settings
---------------------
ethtool <ethX>
Output example:
Settings for enp1s0:
Supported ports: [ TP ]
Supported link modes: 100baseT/Full
1000baseT/Full
10000baseT/Full
2500baseT/Full
5000baseT/Full
Supported pause frame use: Symmetric
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 100baseT/Full
1000baseT/Full
10000baseT/Full
2500baseT/Full
5000baseT/Full
Advertised pause frame use: Symmetric
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Speed: 10000Mb/s
Duplex: Full
Port: Twisted Pair
PHYAD: 0
Transceiver: internal
Auto-negotiation: on
MDI-X: Unknown
Supports Wake-on: g
Wake-on: d
Link detected: yes
---
Note: AQrate speeds (2.5/5 Gb/s) will be displayed only with linux kernels > 4.10.
But you can still use these speeds:
ethtool -s eth0 autoneg off speed 2500
Viewing adapter information
---------------------
ethtool -i <ethX>
Output example:
driver: atlantic
version: 5.2.0-050200rc5-generic-kern
firmware-version: 3.1.78
expansion-rom-version:
bus-info: 0000:01:00.0
supports-statistics: yes
supports-test: no
supports-eeprom-access: no
supports-register-dump: yes
supports-priv-flags: no
Viewing Ethernet adapter statistics:
---------------------
ethtool -S <ethX>
Output example:
NIC statistics:
InPackets: 13238607
InUCast: 13293852
InMCast: 52
InBCast: 3
InErrors: 0
OutPackets: 23703019
OutUCast: 23704941
OutMCast: 67
OutBCast: 11
InUCastOctects: 213182760
OutUCastOctects: 22698443
InMCastOctects: 6600
OutMCastOctects: 8776
InBCastOctects: 192
OutBCastOctects: 704
InOctects: 2131839552
OutOctects: 226938073
InPacketsDma: 95532300
OutPacketsDma: 59503397
InOctetsDma: 1137102462
OutOctetsDma: 2394339518
InDroppedDma: 0
Queue[0] InPackets: 23567131
Queue[0] OutPackets: 20070028
Queue[0] InJumboPackets: 0
Queue[0] InLroPackets: 0
Queue[0] InErrors: 0
Queue[1] InPackets: 45428967
Queue[1] OutPackets: 11306178
Queue[1] InJumboPackets: 0
Queue[1] InLroPackets: 0
Queue[1] InErrors: 0
Queue[2] InPackets: 3187011
Queue[2] OutPackets: 13080381
Queue[2] InJumboPackets: 0
Queue[2] InLroPackets: 0
Queue[2] InErrors: 0
Queue[3] InPackets: 23349136
Queue[3] OutPackets: 15046810
Queue[3] InJumboPackets: 0
Queue[3] InLroPackets: 0
Queue[3] InErrors: 0
Interrupt coalescing support
---------------------------------
ITR mode, TX/RX coalescing timings could be viewed with:
ethtool -c <ethX>
and changed with:
ethtool -C <ethX> tx-usecs <usecs> rx-usecs <usecs>
To disable coalescing:
ethtool -C <ethX> tx-usecs 0 rx-usecs 0 tx-max-frames 1 tx-max-frames 1
Wake on LAN support
---------------------------------
WOL support by magic packet:
ethtool -s <ethX> wol g
To disable WOL:
ethtool -s <ethX> wol d
Set and check the driver message level
---------------------------------
Set message level
ethtool -s <ethX> msglvl <level>
Level values:
0x0001 - general driver status.
0x0002 - hardware probing.
0x0004 - link state.
0x0008 - periodic status check.
0x0010 - interface being brought down.
0x0020 - interface being brought up.
0x0040 - receive error.
0x0080 - transmit error.
0x0200 - interrupt handling.
0x0400 - transmit completion.
0x0800 - receive completion.
0x1000 - packet contents.
0x2000 - hardware status.
0x4000 - Wake-on-LAN status.
By default, the level of debugging messages is set 0x0001(general driver status).
Check message level
ethtool <ethX> | grep "Current message level"
If you want to disable the output of messages
ethtool -s <ethX> msglvl 0
RX flow rules (ntuple filters)
---------------------------------
There are separate rules supported, that applies in that order:
1. 16 VLAN ID rules
2. 16 L2 EtherType rules
3. 8 L3/L4 5-Tuple rules
The driver utilizes the ethtool interface for configuring ntuple filters,
via "ethtool -N <device> <filter>".
To enable or disable the RX flow rules:
ethtool -K ethX ntuple <on|off>
When disabling ntuple filters, all the user programed filters are
flushed from the driver cache and hardware. All needed filters must
be re-added when ntuple is re-enabled.
Because of the fixed order of the rules, the location of filters is also fixed:
- Locations 0 - 15 for VLAN ID filters
- Locations 16 - 31 for L2 EtherType filters
- Locations 32 - 39 for L3/L4 5-tuple filters (locations 32, 36 for IPv6)
The L3/L4 5-tuple (protocol, source and destination IP address, source and
destination TCP/UDP/SCTP port) is compared against 8 filters. For IPv4, up to
8 source and destination addresses can be matched. For IPv6, up to 2 pairs of
addresses can be supported. Source and destination ports are only compared for
TCP/UDP/SCTP packets.
To add a filter that directs packet to queue 5, use <-N|-U|--config-nfc|--config-ntuple> switch:
ethtool -N <ethX> flow-type udp4 src-ip 10.0.0.1 dst-ip 10.0.0.2 src-port 2000 dst-port 2001 action 5 <loc 32>
- action is the queue number.
- loc is the rule number.
For "flow-type ip4|udp4|tcp4|sctp4|ip6|udp6|tcp6|sctp6" you must set the loc
number within 32 - 39.
For "flow-type ip4|udp4|tcp4|sctp4|ip6|udp6|tcp6|sctp6" you can set 8 rules
for traffic IPv4 or you can set 2 rules for traffic IPv6. Loc number traffic
IPv6 is 32 and 36.
At the moment you can not use IPv4 and IPv6 filters at the same time.
Example filter for IPv6 filter traffic:
sudo ethtool -N <ethX> flow-type tcp6 src-ip 2001:db8:0:f101::1 dst-ip 2001:db8:0:f101::2 action 1 loc 32
sudo ethtool -N <ethX> flow-type ip6 src-ip 2001:db8:0:f101::2 dst-ip 2001:db8:0:f101::5 action -1 loc 36
Example filter for IPv4 filter traffic:
sudo ethtool -N <ethX> flow-type udp4 src-ip 10.0.0.4 dst-ip 10.0.0.7 src-port 2000 dst-port 2001 loc 32
sudo ethtool -N <ethX> flow-type tcp4 src-ip 10.0.0.3 dst-ip 10.0.0.9 src-port 2000 dst-port 2001 loc 33
sudo ethtool -N <ethX> flow-type ip4 src-ip 10.0.0.6 dst-ip 10.0.0.4 loc 34
If you set action -1, then all traffic corresponding to the filter will be discarded.
The maximum value action is 31.
The VLAN filter (VLAN id) is compared against 16 filters.
VLAN id must be accompanied by mask 0xF000. That is to distinguish VLAN filter
from L2 Ethertype filter with UserPriority since both User Priority and VLAN ID
are passed in the same 'vlan' parameter.
To add a filter that directs packets from VLAN 2001 to queue 5:
ethtool -N <ethX> flow-type ip4 vlan 2001 m 0xF000 action 1 loc 0
L2 EtherType filters allows filter packet by EtherType field or both EtherType
and User Priority (PCP) field of 802.1Q.
UserPriority (vlan) parameter must be accompanied by mask 0x1FFF. That is to
distinguish VLAN filter from L2 Ethertype filter with UserPriority since both
User Priority and VLAN ID are passed in the same 'vlan' parameter.
To add a filter that directs IP4 packess of priority 3 to queue 3:
ethtool -N <ethX> flow-type ether proto 0x800 vlan 0x600 m 0x1FFF action 3 loc 16
To see the list of filters currently present:
ethtool <-u|-n|--show-nfc|--show-ntuple> <ethX>
Rules may be deleted from the table itself. This is done using:
sudo ethtool <-N|-U|--config-nfc|--config-ntuple> <ethX> delete <loc>
- loc is the rule number to be deleted.
Rx filters is an interface to load the filter table that funnels all flow
into queue 0 unless an alternative queue is specified using "action". In that
case, any flow that matches the filter criteria will be directed to the
appropriate queue. RX filters is supported on all kernels 2.6.30 and later.
RSS for UDP
---------------------------------
Currently, NIC does not support RSS for fragmented IP packets, which leads to
incorrect working of RSS for fragmented UDP traffic. To disable RSS for UDP the
RX Flow L3/L4 rule may be used.
Example:
ethtool -N eth0 flow-type udp4 action 0 loc 32
Command Line Parameters
=======================
The following command line parameters are available on atlantic driver:
aq_itr -Interrupt throttling mode
----------------------------------------
Accepted values: 0, 1, 0xFFFF
Default value: 0xFFFF
0 - Disable interrupt throttling.
1 - Enable interrupt throttling and use specified tx and rx rates.
0xFFFF - Auto throttling mode. Driver will choose the best RX and TX
interrupt throtting settings based on link speed.
aq_itr_tx - TX interrupt throttle rate
----------------------------------------
Accepted values: 0 - 0x1FF
Default value: 0
TX side throttling in microseconds. Adapter will setup maximum interrupt delay
to this value. Minimum interrupt delay will be a half of this value
aq_itr_rx - RX interrupt throttle rate
----------------------------------------
Accepted values: 0 - 0x1FF
Default value: 0
RX side throttling in microseconds. Adapter will setup maximum interrupt delay
to this value. Minimum interrupt delay will be a half of this value
Note: ITR settings could be changed in runtime by ethtool -c means (see below)
Config file parameters
=======================
For some fine tuning and performance optimizations,
some parameters can be changed in the {source_dir}/aq_cfg.h file.
AQ_CFG_RX_PAGEORDER
----------------------------------------
Default value: 0
RX page order override. Thats a power of 2 number of RX pages allocated for
each descriptor. Received descriptor size is still limited by AQ_CFG_RX_FRAME_MAX.
Increasing pageorder makes page reuse better (actual on iommu enabled systems).
AQ_CFG_RX_REFILL_THRES
----------------------------------------
Default value: 32
RX refill threshold. RX path will not refill freed descriptors until the
specified number of free descriptors is observed. Larger values may help
better page reuse but may lead to packet drops as well.
AQ_CFG_VECS_DEF
------------------------------------------------------------
Number of queues
Valid Range: 0 - 8 (up to AQ_CFG_VECS_MAX)
Default value: 8
Notice this value will be capped by the number of cores available on the system.
AQ_CFG_IS_RSS_DEF
------------------------------------------------------------
Enable/disable Receive Side Scaling
This feature allows the adapter to distribute receive processing
across multiple CPU-cores and to prevent from overloading a single CPU core.
Valid values
0 - disabled
1 - enabled
Default value: 1
AQ_CFG_NUM_RSS_QUEUES_DEF
------------------------------------------------------------
Number of queues for Receive Side Scaling
Valid Range: 0 - 8 (up to AQ_CFG_VECS_DEF)
Default value: AQ_CFG_VECS_DEF
AQ_CFG_IS_LRO_DEF
------------------------------------------------------------
Enable/disable Large Receive Offload
This offload enables the adapter to coalesce multiple TCP segments and indicate
them as a single coalesced unit to the OS networking subsystem.
The system consumes less energy but it also introduces more latency in packets processing.
Valid values
0 - disabled
1 - enabled
Default value: 1
AQ_CFG_TX_CLEAN_BUDGET
----------------------------------------
Maximum descriptors to cleanup on TX at once.
Default value: 256
After the aq_cfg.h file changed the driver must be rebuilt to take effect.
Support
=======
If an issue is identified with the released source code on the supported
kernel with a supported adapter, email the specific information related
to the issue to support@aquantia.com
License
=======
aQuantia Corporation Network Driver
Copyright(c) 2014 - 2019 aQuantia Corporation.
This program is free software; you can redistribute it and/or modify it
under the terms and conditions of the GNU General Public License,
version 2, as published by the Free Software Foundation.
...@@ -1140,6 +1140,15 @@ L: linux-media@vger.kernel.org ...@@ -1140,6 +1140,15 @@ L: linux-media@vger.kernel.org
S: Maintained S: Maintained
F: drivers/media/i2c/aptina-pll.* F: drivers/media/i2c/aptina-pll.*
AQUANTIA ETHERNET DRIVER (atlantic)
M: Igor Russkikh <igor.russkikh@aquantia.com>
L: netdev@vger.kernel.org
S: Supported
W: http://www.aquantia.com
Q: http://patchwork.ozlabs.org/project/netdev/list/
F: drivers/net/ethernet/aquantia/atlantic/
F: Documentation/networking/device_drivers/aquantia/atlantic.txt
ARC FRAMEBUFFER DRIVER ARC FRAMEBUFFER DRIVER
M: Jaya Kumar <jayalk@intworks.biz> M: Jaya Kumar <jayalk@intworks.biz>
S: Maintained S: Maintained
......
...@@ -9,6 +9,8 @@ ...@@ -9,6 +9,8 @@
#ifndef AQ_CFG_H #ifndef AQ_CFG_H
#define AQ_CFG_H #define AQ_CFG_H
#include <generated/utsrelease.h>
#define AQ_CFG_VECS_DEF 8U #define AQ_CFG_VECS_DEF 8U
#define AQ_CFG_TCS_DEF 1U #define AQ_CFG_TCS_DEF 1U
...@@ -86,10 +88,7 @@ ...@@ -86,10 +88,7 @@
#define AQ_CFG_DRV_AUTHOR "aQuantia" #define AQ_CFG_DRV_AUTHOR "aQuantia"
#define AQ_CFG_DRV_DESC "aQuantia Corporation(R) Network Driver" #define AQ_CFG_DRV_DESC "aQuantia Corporation(R) Network Driver"
#define AQ_CFG_DRV_NAME "atlantic" #define AQ_CFG_DRV_NAME "atlantic"
#define AQ_CFG_DRV_VERSION __stringify(NIC_MAJOR_DRIVER_VERSION)"."\ #define AQ_CFG_DRV_VERSION UTS_RELEASE \
__stringify(NIC_MINOR_DRIVER_VERSION)"."\
__stringify(NIC_BUILD_DRIVER_VERSION)"."\
__stringify(NIC_REVISION_DRIVER_VERSION) \
AQ_CFG_DRV_VERSION_SUFFIX AQ_CFG_DRV_VERSION_SUFFIX
#endif /* AQ_CFG_H */ #endif /* AQ_CFG_H */
// SPDX-License-Identifier: GPL-2.0-or-later // SPDX-License-Identifier: GPL-2.0-only
/* Copyright (C) 2014-2019 aQuantia Corporation. */ /* Copyright (C) 2014-2019 aQuantia Corporation. */
/* File aq_drvinfo.c: Definition of common code for firmware info in sys.*/ /* File aq_drvinfo.c: Definition of common code for firmware info in sys.*/
......
/* SPDX-License-Identifier: GPL-2.0-or-later */ /* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (C) 2014-2017 aQuantia Corporation. */ /* Copyright (C) 2014-2017 aQuantia Corporation. */
/* File aq_drvinfo.h: Declaration of common code for firmware info in sys.*/ /* File aq_drvinfo.h: Declaration of common code for firmware info in sys.*/
......
// SPDX-License-Identifier: GPL-2.0-or-later // SPDX-License-Identifier: GPL-2.0-only
/* Copyright (C) 2014-2017 aQuantia Corporation. */ /* Copyright (C) 2014-2017 aQuantia Corporation. */
/* File aq_filters.c: RX filters related functions. */ /* File aq_filters.c: RX filters related functions. */
......
/* SPDX-License-Identifier: GPL-2.0-or-later */ /* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (C) 2014-2017 aQuantia Corporation. */ /* Copyright (C) 2014-2017 aQuantia Corporation. */
/* File aq_filters.h: RX filters related functions. */ /* File aq_filters.h: RX filters related functions. */
......
...@@ -108,11 +108,16 @@ static int aq_ndev_change_mtu(struct net_device *ndev, int new_mtu) ...@@ -108,11 +108,16 @@ static int aq_ndev_change_mtu(struct net_device *ndev, int new_mtu)
static int aq_ndev_set_features(struct net_device *ndev, static int aq_ndev_set_features(struct net_device *ndev,
netdev_features_t features) netdev_features_t features)
{ {
bool is_vlan_rx_strip = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
bool is_vlan_tx_insert = !!(features & NETIF_F_HW_VLAN_CTAG_TX);
struct aq_nic_s *aq_nic = netdev_priv(ndev); struct aq_nic_s *aq_nic = netdev_priv(ndev);
struct aq_nic_cfg_s *aq_cfg = aq_nic_get_cfg(aq_nic); bool need_ndev_restart = false;
struct aq_nic_cfg_s *aq_cfg;
bool is_lro = false; bool is_lro = false;
int err = 0; int err = 0;
aq_cfg = aq_nic_get_cfg(aq_nic);
if (!(features & NETIF_F_NTUPLE)) { if (!(features & NETIF_F_NTUPLE)) {
if (aq_nic->ndev->features & NETIF_F_NTUPLE) { if (aq_nic->ndev->features & NETIF_F_NTUPLE) {
err = aq_clear_rxnfc_all_rules(aq_nic); err = aq_clear_rxnfc_all_rules(aq_nic);
...@@ -135,17 +140,32 @@ static int aq_ndev_set_features(struct net_device *ndev, ...@@ -135,17 +140,32 @@ static int aq_ndev_set_features(struct net_device *ndev,
if (aq_cfg->is_lro != is_lro) { if (aq_cfg->is_lro != is_lro) {
aq_cfg->is_lro = is_lro; aq_cfg->is_lro = is_lro;
need_ndev_restart = true;
if (netif_running(ndev)) {
aq_ndev_close(ndev);
aq_ndev_open(ndev);
}
} }
} }
if ((aq_nic->ndev->features ^ features) & NETIF_F_RXCSUM)
if ((aq_nic->ndev->features ^ features) & NETIF_F_RXCSUM) {
err = aq_nic->aq_hw_ops->hw_set_offload(aq_nic->aq_hw, err = aq_nic->aq_hw_ops->hw_set_offload(aq_nic->aq_hw,
aq_cfg); aq_cfg);
if (unlikely(err))
goto err_exit;
}
if (aq_cfg->is_vlan_rx_strip != is_vlan_rx_strip) {
aq_cfg->is_vlan_rx_strip = is_vlan_rx_strip;
need_ndev_restart = true;
}
if (aq_cfg->is_vlan_tx_insert != is_vlan_tx_insert) {
aq_cfg->is_vlan_tx_insert = is_vlan_tx_insert;
need_ndev_restart = true;
}
if (need_ndev_restart && netif_running(ndev)) {
aq_ndev_close(ndev);
aq_ndev_open(ndev);
}
err_exit: err_exit:
return err; return err;
} }
......
...@@ -126,6 +126,8 @@ void aq_nic_cfg_start(struct aq_nic_s *self) ...@@ -126,6 +126,8 @@ void aq_nic_cfg_start(struct aq_nic_s *self)
cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk; cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk;
cfg->features = cfg->aq_hw_caps->hw_features; cfg->features = cfg->aq_hw_caps->hw_features;
cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX);
cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX);
} }
static int aq_nic_update_link_status(struct aq_nic_s *self) static int aq_nic_update_link_status(struct aq_nic_s *self)
...@@ -285,7 +287,8 @@ void aq_nic_ndev_init(struct aq_nic_s *self) ...@@ -285,7 +287,8 @@ void aq_nic_ndev_init(struct aq_nic_s *self)
self->ndev->hw_features |= aq_hw_caps->hw_features; self->ndev->hw_features |= aq_hw_caps->hw_features;
self->ndev->features = aq_hw_caps->hw_features; self->ndev->features = aq_hw_caps->hw_features;
self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM | self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
NETIF_F_RXHASH | NETIF_F_SG | NETIF_F_LRO; NETIF_F_RXHASH | NETIF_F_SG |
NETIF_F_LRO | NETIF_F_TSO;
self->ndev->priv_flags = aq_hw_caps->hw_priv_flags; self->ndev->priv_flags = aq_hw_caps->hw_priv_flags;
self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE; self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
...@@ -426,26 +429,37 @@ static unsigned int aq_nic_map_skb(struct aq_nic_s *self, ...@@ -426,26 +429,37 @@ static unsigned int aq_nic_map_skb(struct aq_nic_s *self,
unsigned int dx = ring->sw_tail; unsigned int dx = ring->sw_tail;
struct aq_ring_buff_s *first = NULL; struct aq_ring_buff_s *first = NULL;
struct aq_ring_buff_s *dx_buff = &ring->buff_ring[dx]; struct aq_ring_buff_s *dx_buff = &ring->buff_ring[dx];
bool need_context_tag = false;
dx_buff->flags = 0U;
if (unlikely(skb_is_gso(skb))) { if (unlikely(skb_is_gso(skb))) {
dx_buff->flags = 0U; dx_buff->mss = skb_shinfo(skb)->gso_size;
dx_buff->is_gso = 1U;
dx_buff->len_pkt = skb->len; dx_buff->len_pkt = skb->len;
dx_buff->len_l2 = ETH_HLEN; dx_buff->len_l2 = ETH_HLEN;
dx_buff->len_l3 = ip_hdrlen(skb); dx_buff->len_l3 = ip_hdrlen(skb);
dx_buff->len_l4 = tcp_hdrlen(skb); dx_buff->len_l4 = tcp_hdrlen(skb);
dx_buff->mss = skb_shinfo(skb)->gso_size;
dx_buff->is_txc = 1U;
dx_buff->eop_index = 0xffffU; dx_buff->eop_index = 0xffffU;
dx_buff->is_ipv6 = dx_buff->is_ipv6 =
(ip_hdr(skb)->version == 6) ? 1U : 0U; (ip_hdr(skb)->version == 6) ? 1U : 0U;
need_context_tag = true;
}
if (self->aq_nic_cfg.is_vlan_tx_insert && skb_vlan_tag_present(skb)) {
dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb);
dx_buff->len_pkt = skb->len;
dx_buff->is_vlan = 1U;
need_context_tag = true;
}
if (need_context_tag) {
dx = aq_ring_next_dx(ring, dx); dx = aq_ring_next_dx(ring, dx);
dx_buff = &ring->buff_ring[dx]; dx_buff = &ring->buff_ring[dx];
dx_buff->flags = 0U;
++ret; ++ret;
} }
dx_buff->flags = 0U;
dx_buff->len = skb_headlen(skb); dx_buff->len = skb_headlen(skb);
dx_buff->pa = dma_map_single(aq_nic_get_dev(self), dx_buff->pa = dma_map_single(aq_nic_get_dev(self),
skb->data, skb->data,
...@@ -534,7 +548,7 @@ static unsigned int aq_nic_map_skb(struct aq_nic_s *self, ...@@ -534,7 +548,7 @@ static unsigned int aq_nic_map_skb(struct aq_nic_s *self,
--ret, dx = aq_ring_next_dx(ring, dx)) { --ret, dx = aq_ring_next_dx(ring, dx)) {
dx_buff = &ring->buff_ring[dx]; dx_buff = &ring->buff_ring[dx];
if (!dx_buff->is_txc && dx_buff->pa) { if (!dx_buff->is_gso && !dx_buff->is_vlan && dx_buff->pa) {
if (unlikely(dx_buff->is_sop)) { if (unlikely(dx_buff->is_sop)) {
dma_unmap_single(aq_nic_get_dev(self), dma_unmap_single(aq_nic_get_dev(self),
dx_buff->pa, dx_buff->pa,
......
...@@ -35,6 +35,8 @@ struct aq_nic_cfg_s { ...@@ -35,6 +35,8 @@ struct aq_nic_cfg_s {
u32 flow_control; u32 flow_control;
u32 link_speed_msk; u32 link_speed_msk;
u32 wol; u32 wol;
u8 is_vlan_rx_strip;
u8 is_vlan_tx_insert;
u16 is_mc_list_enabled; u16 is_mc_list_enabled;
u16 mc_list_count; u16 mc_list_count;
bool is_autoneg; bool is_autoneg;
......
...@@ -409,6 +409,10 @@ int aq_ring_rx_clean(struct aq_ring_s *self, ...@@ -409,6 +409,10 @@ int aq_ring_rx_clean(struct aq_ring_s *self,
} }
} }
if (buff->is_vlan)
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
buff->vlan_rx_tag);
skb->protocol = eth_type_trans(skb, ndev); skb->protocol = eth_type_trans(skb, ndev);
aq_rx_checksum(self, buff, skb); aq_rx_checksum(self, buff, skb);
......
...@@ -27,7 +27,7 @@ struct aq_rxpage { ...@@ -27,7 +27,7 @@ struct aq_rxpage {
* +----------+----------+----------+----------- * +----------+----------+----------+-----------
* 4/8bytes|len pkt |len pkt | | skb * 4/8bytes|len pkt |len pkt | | skb
* +----------+----------+----------+----------- * +----------+----------+----------+-----------
* 4/8bytes|is_txc |len,flags |len |len,is_eop * 4/8bytes|is_gso |len,flags |len |len,is_eop
* +----------+----------+----------+----------- * +----------+----------+----------+-----------
* *
* This aq_ring_buff_s doesn't have endianness dependency. * This aq_ring_buff_s doesn't have endianness dependency.
...@@ -44,6 +44,7 @@ struct __packed aq_ring_buff_s { ...@@ -44,6 +44,7 @@ struct __packed aq_ring_buff_s {
u8 is_hash_l4; u8 is_hash_l4;
u8 rsvd1; u8 rsvd1;
struct aq_rxpage rxdata; struct aq_rxpage rxdata;
u16 vlan_rx_tag;
}; };
/* EOP */ /* EOP */
struct { struct {
...@@ -59,6 +60,7 @@ struct __packed aq_ring_buff_s { ...@@ -59,6 +60,7 @@ struct __packed aq_ring_buff_s {
u8 is_ipv6:1; u8 is_ipv6:1;
u8 rsvd2:7; u8 rsvd2:7;
u32 len_pkt; u32 len_pkt;
u16 vlan_tx_tag;
}; };
}; };
union { union {
...@@ -70,11 +72,12 @@ struct __packed aq_ring_buff_s { ...@@ -70,11 +72,12 @@ struct __packed aq_ring_buff_s {
u32 is_cso_err:1; u32 is_cso_err:1;
u32 is_sop:1; u32 is_sop:1;
u32 is_eop:1; u32 is_eop:1;
u32 is_txc:1; u32 is_gso:1;
u32 is_mapped:1; u32 is_mapped:1;
u32 is_cleaned:1; u32 is_cleaned:1;
u32 is_error:1; u32 is_error:1;
u32 rsvd3:6; u32 is_vlan:1;
u32 rsvd3:5;
u16 eop_index; u16 eop_index;
u16 rsvd4; u16 rsvd4;
}; };
......
...@@ -451,7 +451,7 @@ static int hw_atl_a0_hw_ring_tx_xmit(struct aq_hw_s *self, ...@@ -451,7 +451,7 @@ static int hw_atl_a0_hw_ring_tx_xmit(struct aq_hw_s *self,
buff = &ring->buff_ring[ring->sw_tail]; buff = &ring->buff_ring[ring->sw_tail];
if (buff->is_txc) { if (buff->is_gso) {
txd->ctl |= (buff->len_l3 << 31) | txd->ctl |= (buff->len_l3 << 31) |
(buff->len_l2 << 24) | (buff->len_l2 << 24) |
HW_ATL_A0_TXD_CTL_CMD_TCP | HW_ATL_A0_TXD_CTL_CMD_TCP |
......
...@@ -40,7 +40,9 @@ ...@@ -40,7 +40,9 @@
NETIF_F_TSO | \ NETIF_F_TSO | \
NETIF_F_LRO | \ NETIF_F_LRO | \
NETIF_F_NTUPLE | \ NETIF_F_NTUPLE | \
NETIF_F_HW_VLAN_CTAG_FILTER, \ NETIF_F_HW_VLAN_CTAG_FILTER | \
NETIF_F_HW_VLAN_CTAG_RX | \
NETIF_F_HW_VLAN_CTAG_TX, \
.hw_priv_flags = IFF_UNICAST_FLT, \ .hw_priv_flags = IFF_UNICAST_FLT, \
.flow_control = true, \ .flow_control = true, \
.mtu = HW_ATL_B0_MTU_JUMBO, \ .mtu = HW_ATL_B0_MTU_JUMBO, \
...@@ -245,6 +247,9 @@ static int hw_atl_b0_hw_offload_set(struct aq_hw_s *self, ...@@ -245,6 +247,9 @@ static int hw_atl_b0_hw_offload_set(struct aq_hw_s *self,
/* LSO offloads*/ /* LSO offloads*/
hw_atl_tdm_large_send_offload_en_set(self, 0xFFFFFFFFU); hw_atl_tdm_large_send_offload_en_set(self, 0xFFFFFFFFU);
/* Outer VLAN tag offload */
hw_atl_rpo_outer_vlan_tag_mode_set(self, 1U);
/* LRO offloads */ /* LRO offloads */
{ {
unsigned int val = (8U < HW_ATL_B0_LRO_RXD_MAX) ? 0x3U : unsigned int val = (8U < HW_ATL_B0_LRO_RXD_MAX) ? 0x3U :
...@@ -487,6 +492,7 @@ static int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self, ...@@ -487,6 +492,7 @@ static int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self,
unsigned int buff_pa_len = 0U; unsigned int buff_pa_len = 0U;
unsigned int pkt_len = 0U; unsigned int pkt_len = 0U;
unsigned int frag_count = 0U; unsigned int frag_count = 0U;
bool is_vlan = false;
bool is_gso = false; bool is_gso = false;
buff = &ring->buff_ring[ring->sw_tail]; buff = &ring->buff_ring[ring->sw_tail];
...@@ -501,36 +507,44 @@ static int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self, ...@@ -501,36 +507,44 @@ static int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self,
buff = &ring->buff_ring[ring->sw_tail]; buff = &ring->buff_ring[ring->sw_tail];
if (buff->is_txc) { if (buff->is_gso) {
txd->ctl |= HW_ATL_B0_TXD_CTL_CMD_TCP;
txd->ctl |= HW_ATL_B0_TXD_CTL_DESC_TYPE_TXC;
txd->ctl |= (buff->len_l3 << 31) | txd->ctl |= (buff->len_l3 << 31) |
(buff->len_l2 << 24) | (buff->len_l2 << 24);
HW_ATL_B0_TXD_CTL_CMD_TCP | txd->ctl2 |= (buff->mss << 16);
HW_ATL_B0_TXD_CTL_DESC_TYPE_TXC; is_gso = true;
txd->ctl2 |= (buff->mss << 16) |
(buff->len_l4 << 8) |
(buff->len_l3 >> 1);
pkt_len -= (buff->len_l4 + pkt_len -= (buff->len_l4 +
buff->len_l3 + buff->len_l3 +
buff->len_l2); buff->len_l2);
is_gso = true;
if (buff->is_ipv6) if (buff->is_ipv6)
txd->ctl |= HW_ATL_B0_TXD_CTL_CMD_IPV6; txd->ctl |= HW_ATL_B0_TXD_CTL_CMD_IPV6;
} else { txd->ctl2 |= (buff->len_l4 << 8) |
(buff->len_l3 >> 1);
}
if (buff->is_vlan) {
txd->ctl |= HW_ATL_B0_TXD_CTL_DESC_TYPE_TXC;
txd->ctl |= buff->vlan_tx_tag << 4;
is_vlan = true;
}
if (!buff->is_gso && !buff->is_vlan) {
buff_pa_len = buff->len; buff_pa_len = buff->len;
txd->buf_addr = buff->pa; txd->buf_addr = buff->pa;
txd->ctl |= (HW_ATL_B0_TXD_CTL_BLEN & txd->ctl |= (HW_ATL_B0_TXD_CTL_BLEN &
((u32)buff_pa_len << 4)); ((u32)buff_pa_len << 4));
txd->ctl |= HW_ATL_B0_TXD_CTL_DESC_TYPE_TXD; txd->ctl |= HW_ATL_B0_TXD_CTL_DESC_TYPE_TXD;
/* PAY_LEN */ /* PAY_LEN */
txd->ctl2 |= HW_ATL_B0_TXD_CTL2_LEN & (pkt_len << 14); txd->ctl2 |= HW_ATL_B0_TXD_CTL2_LEN & (pkt_len << 14);
if (is_gso) { if (is_gso || is_vlan) {
txd->ctl |= HW_ATL_B0_TXD_CTL_CMD_LSO; /* enable tx context */
txd->ctl2 |= HW_ATL_B0_TXD_CTL2_CTX_EN; txd->ctl2 |= HW_ATL_B0_TXD_CTL2_CTX_EN;
} }
if (is_gso)
txd->ctl |= HW_ATL_B0_TXD_CTL_CMD_LSO;
/* Tx checksum offloads */ /* Tx checksum offloads */
if (buff->is_ip_cso) if (buff->is_ip_cso)
...@@ -539,13 +553,16 @@ static int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self, ...@@ -539,13 +553,16 @@ static int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self,
if (buff->is_udp_cso || buff->is_tcp_cso) if (buff->is_udp_cso || buff->is_tcp_cso)
txd->ctl |= HW_ATL_B0_TXD_CTL_CMD_TUCSO; txd->ctl |= HW_ATL_B0_TXD_CTL_CMD_TUCSO;
if (is_vlan)
txd->ctl |= HW_ATL_B0_TXD_CTL_CMD_VLAN;
if (unlikely(buff->is_eop)) { if (unlikely(buff->is_eop)) {
txd->ctl |= HW_ATL_B0_TXD_CTL_EOP; txd->ctl |= HW_ATL_B0_TXD_CTL_EOP;
txd->ctl |= HW_ATL_B0_TXD_CTL_CMD_WB; txd->ctl |= HW_ATL_B0_TXD_CTL_CMD_WB;
is_gso = false; is_gso = false;
is_vlan = false;
} }
} }
ring->sw_tail = aq_ring_next_dx(ring, ring->sw_tail); ring->sw_tail = aq_ring_next_dx(ring, ring->sw_tail);
} }
...@@ -559,6 +576,7 @@ static int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self, ...@@ -559,6 +576,7 @@ static int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self,
{ {
u32 dma_desc_addr_lsw = (u32)aq_ring->dx_ring_pa; u32 dma_desc_addr_lsw = (u32)aq_ring->dx_ring_pa;
u32 dma_desc_addr_msw = (u32)(((u64)aq_ring->dx_ring_pa) >> 32); u32 dma_desc_addr_msw = (u32)(((u64)aq_ring->dx_ring_pa) >> 32);
u32 vlan_rx_stripping = self->aq_nic_cfg->is_vlan_rx_strip;
hw_atl_rdm_rx_desc_en_set(self, false, aq_ring->idx); hw_atl_rdm_rx_desc_en_set(self, false, aq_ring->idx);
...@@ -578,7 +596,8 @@ static int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self, ...@@ -578,7 +596,8 @@ static int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self,
hw_atl_rdm_rx_desc_head_buff_size_set(self, 0U, aq_ring->idx); hw_atl_rdm_rx_desc_head_buff_size_set(self, 0U, aq_ring->idx);
hw_atl_rdm_rx_desc_head_splitting_set(self, 0U, aq_ring->idx); hw_atl_rdm_rx_desc_head_splitting_set(self, 0U, aq_ring->idx);
hw_atl_rpo_rx_desc_vlan_stripping_set(self, 0U, aq_ring->idx); hw_atl_rpo_rx_desc_vlan_stripping_set(self, !!vlan_rx_stripping,
aq_ring->idx);
/* Rx ring set mode */ /* Rx ring set mode */
...@@ -681,11 +700,15 @@ static int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self, ...@@ -681,11 +700,15 @@ static int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self,
buff = &ring->buff_ring[ring->hw_head]; buff = &ring->buff_ring[ring->hw_head];
buff->flags = 0U;
buff->is_hash_l4 = 0U;
rx_stat = (0x0000003CU & rxd_wb->status) >> 2; rx_stat = (0x0000003CU & rxd_wb->status) >> 2;
is_rx_check_sum_enabled = (rxd_wb->type >> 19) & 0x3U; is_rx_check_sum_enabled = (rxd_wb->type >> 19) & 0x3U;
pkt_type = 0xFFU & (rxd_wb->type >> 4); pkt_type = (rxd_wb->type & HW_ATL_B0_RXD_WB_STAT_PKTTYPE) >>
HW_ATL_B0_RXD_WB_STAT_PKTTYPE_SHIFT;
if (is_rx_check_sum_enabled & BIT(0) && if (is_rx_check_sum_enabled & BIT(0) &&
(0x0U == (pkt_type & 0x3U))) (0x0U == (pkt_type & 0x3U)))
...@@ -706,6 +729,13 @@ static int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self, ...@@ -706,6 +729,13 @@ static int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self,
buff->is_cso_err = 0U; buff->is_cso_err = 0U;
} }
if (self->aq_nic_cfg->is_vlan_rx_strip &&
((pkt_type & HW_ATL_B0_RXD_WB_PKTTYPE_VLAN) ||
(pkt_type & HW_ATL_B0_RXD_WB_PKTTYPE_VLAN_DOUBLE))) {
buff->is_vlan = 1;
buff->vlan_rx_tag = le16_to_cpu(rxd_wb->vlan);
}
if ((rx_stat & BIT(0)) || rxd_wb->type & 0x1000U) { if ((rx_stat & BIT(0)) || rxd_wb->type & 0x1000U) {
/* MAC error or DMA error */ /* MAC error or DMA error */
buff->is_error = 1U; buff->is_error = 1U;
......
...@@ -107,10 +107,17 @@ ...@@ -107,10 +107,17 @@
#define HW_ATL_B0_RXD_NCEA0 (0x1) #define HW_ATL_B0_RXD_NCEA0 (0x1)
#define HW_ATL_B0_RXD_WB_STAT_RSSTYPE (0x0000000F) #define HW_ATL_B0_RXD_WB_STAT_RSSTYPE (0x0000000F)
#define HW_ATL_B0_RXD_WB_STAT_RSSTYPE_SHIFT (0x0)
#define HW_ATL_B0_RXD_WB_STAT_PKTTYPE (0x00000FF0) #define HW_ATL_B0_RXD_WB_STAT_PKTTYPE (0x00000FF0)
#define HW_ATL_B0_RXD_WB_STAT_PKTTYPE_SHIFT (0x4)
#define HW_ATL_B0_RXD_WB_STAT_RXCTRL (0x00180000) #define HW_ATL_B0_RXD_WB_STAT_RXCTRL (0x00180000)
#define HW_ATL_B0_RXD_WB_STAT_RXCTRL_SHIFT (0x13)
#define HW_ATL_B0_RXD_WB_STAT_SPLHDR (0x00200000) #define HW_ATL_B0_RXD_WB_STAT_SPLHDR (0x00200000)
#define HW_ATL_B0_RXD_WB_STAT_HDRLEN (0xFFC00000) #define HW_ATL_B0_RXD_WB_STAT_HDRLEN (0xFFC00000)
#define HW_ATL_B0_RXD_WB_STAT_HDRLEN_SHIFT (0x16)
#define HW_ATL_B0_RXD_WB_PKTTYPE_VLAN BIT(5)
#define HW_ATL_B0_RXD_WB_PKTTYPE_VLAN_DOUBLE BIT(6)
#define HW_ATL_B0_RXD_WB_STAT2_DD (0x0001) #define HW_ATL_B0_RXD_WB_STAT2_DD (0x0001)
#define HW_ATL_B0_RXD_WB_STAT2_EOP (0x0002) #define HW_ATL_B0_RXD_WB_STAT2_EOP (0x0002)
......
...@@ -1004,6 +1004,22 @@ void hw_atl_rpo_rx_desc_vlan_stripping_set(struct aq_hw_s *aq_hw, ...@@ -1004,6 +1004,22 @@ void hw_atl_rpo_rx_desc_vlan_stripping_set(struct aq_hw_s *aq_hw,
rx_desc_vlan_stripping); rx_desc_vlan_stripping);
} }
void hw_atl_rpo_outer_vlan_tag_mode_set(void *context,
u32 outervlantagmode)
{
aq_hw_write_reg_bit(context, HW_ATL_RPO_OUTER_VL_INS_MODE_ADR,
HW_ATL_RPO_OUTER_VL_INS_MODE_MSK,
HW_ATL_RPO_OUTER_VL_INS_MODE_SHIFT,
outervlantagmode);
}
u32 hw_atl_rpo_outer_vlan_tag_mode_get(void *context)
{
return aq_hw_read_reg_bit(context, HW_ATL_RPO_OUTER_VL_INS_MODE_ADR,
HW_ATL_RPO_OUTER_VL_INS_MODE_MSK,
HW_ATL_RPO_OUTER_VL_INS_MODE_SHIFT);
}
void hw_atl_rpo_tcp_udp_crc_offload_en_set(struct aq_hw_s *aq_hw, void hw_atl_rpo_tcp_udp_crc_offload_en_set(struct aq_hw_s *aq_hw,
u32 tcp_udp_crc_offload_en) u32 tcp_udp_crc_offload_en)
{ {
......
...@@ -488,6 +488,11 @@ void hw_atl_rpo_rx_desc_vlan_stripping_set(struct aq_hw_s *aq_hw, ...@@ -488,6 +488,11 @@ void hw_atl_rpo_rx_desc_vlan_stripping_set(struct aq_hw_s *aq_hw,
u32 rx_desc_vlan_stripping, u32 rx_desc_vlan_stripping,
u32 descriptor); u32 descriptor);
void hw_atl_rpo_outer_vlan_tag_mode_set(void *context,
u32 outervlantagmode);
u32 hw_atl_rpo_outer_vlan_tag_mode_get(void *context);
/* set tcp/udp checksum offload enable */ /* set tcp/udp checksum offload enable */
void hw_atl_rpo_tcp_udp_crc_offload_en_set(struct aq_hw_s *aq_hw, void hw_atl_rpo_tcp_udp_crc_offload_en_set(struct aq_hw_s *aq_hw,
u32 tcp_udp_crc_offload_en); u32 tcp_udp_crc_offload_en);
......
...@@ -1383,6 +1383,24 @@ ...@@ -1383,6 +1383,24 @@
/* default value of bitfield l4_chk_en */ /* default value of bitfield l4_chk_en */
#define HW_ATL_RPOL4CHK_EN_DEFAULT 0x0 #define HW_ATL_RPOL4CHK_EN_DEFAULT 0x0
/* RX outer_vl_ins_mode Bitfield Definitions
* Preprocessor definitions for the bitfield "outer_vl_ins_mode".
* PORT="pif_rpo_outer_vl_mode_i"
*/
/* Register address for bitfield outer_vl_ins_mode */
#define HW_ATL_RPO_OUTER_VL_INS_MODE_ADR 0x00005580
/* Bitmask for bitfield outer_vl_ins_mode */
#define HW_ATL_RPO_OUTER_VL_INS_MODE_MSK 0x00000004
/* Inverted bitmask for bitfield outer_vl_ins_mode */
#define HW_ATL_RPO_OUTER_VL_INS_MODE_MSKN 0xFFFFFFFB
/* Lower bit position of bitfield outer_vl_ins_mode */
#define HW_ATL_RPO_OUTER_VL_INS_MODE_SHIFT 2
/* Width of bitfield outer_vl_ins_mode */
#define HW_ATL_RPO_OUTER_VL_INS_MODE_WIDTH 1
/* Default value of bitfield outer_vl_ins_mode */
#define HW_ATL_RPO_OUTER_VL_INS_MODE_DEFAULT 0x0
/* rx reg_res_dsbl bitfield definitions /* rx reg_res_dsbl bitfield definitions
* preprocessor definitions for the bitfield "reg_res_dsbl". * preprocessor definitions for the bitfield "reg_res_dsbl".
* port="pif_rx_reg_res_dsbl_i" * port="pif_rx_reg_res_dsbl_i"
......
...@@ -7,11 +7,6 @@ ...@@ -7,11 +7,6 @@
#ifndef VER_H #ifndef VER_H
#define VER_H #define VER_H
#define NIC_MAJOR_DRIVER_VERSION 2
#define NIC_MINOR_DRIVER_VERSION 0
#define NIC_BUILD_DRIVER_VERSION 4
#define NIC_REVISION_DRIVER_VERSION 0
#define AQ_CFG_DRV_VERSION_SUFFIX "-kern" #define AQ_CFG_DRV_VERSION_SUFFIX "-kern"
#endif /* VER_H */ #endif /* VER_H */
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