Commit 1c901a46 authored by Giuseppe CAVALLARO's avatar Giuseppe CAVALLARO Committed by David S. Miller

stmmac: add MMC support exported via ethtool (v3)

This patch adds the MMC management counters support.
MMC module is an extension of the register address
space and all the hardware counters can be accessed
via ethtoo -S ethX.

Note that, the MMC interrupts remain masked and the logic
to handle this kind of interrupt will be added later (if
actually useful).
Signed-off-by: default avatarGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3172d3af
...@@ -2,4 +2,5 @@ obj-$(CONFIG_STMMAC_ETH) += stmmac.o ...@@ -2,4 +2,5 @@ obj-$(CONFIG_STMMAC_ETH) += stmmac.o
stmmac-$(CONFIG_STMMAC_TIMER) += stmmac_timer.o stmmac-$(CONFIG_STMMAC_TIMER) += stmmac_timer.o
stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o \ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o \
dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \ dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \
dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o $(stmmac-y) dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o \
mmc_core.o $(stmmac-y)
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#endif #endif
#include "descs.h" #include "descs.h"
#include "mmc.h"
#undef CHIP_DEBUG_PRINT #undef CHIP_DEBUG_PRINT
/* Turn-on extra printk debug for MAC core, dma and descriptors */ /* Turn-on extra printk debug for MAC core, dma and descriptors */
......
...@@ -118,13 +118,6 @@ static void dwmac1000_dma_operation_mode(void __iomem *ioaddr, int txmode, ...@@ -118,13 +118,6 @@ static void dwmac1000_dma_operation_mode(void __iomem *ioaddr, int txmode,
writel(csr6, ioaddr + DMA_CONTROL); writel(csr6, ioaddr + DMA_CONTROL);
} }
/* Not yet implemented --- no RMON module */
static void dwmac1000_dma_diagnostic_fr(void *data,
struct stmmac_extra_stats *x, void __iomem *ioaddr)
{
return;
}
static void dwmac1000_dump_dma_regs(void __iomem *ioaddr) static void dwmac1000_dump_dma_regs(void __iomem *ioaddr)
{ {
int i; int i;
...@@ -143,7 +136,6 @@ const struct stmmac_dma_ops dwmac1000_dma_ops = { ...@@ -143,7 +136,6 @@ const struct stmmac_dma_ops dwmac1000_dma_ops = {
.init = dwmac1000_dma_init, .init = dwmac1000_dma_init,
.dump_regs = dwmac1000_dump_dma_regs, .dump_regs = dwmac1000_dump_dma_regs,
.dma_mode = dwmac1000_dma_operation_mode, .dma_mode = dwmac1000_dma_operation_mode,
.dma_diagnostic_fr = dwmac1000_dma_diagnostic_fr,
.enable_dma_transmission = dwmac_enable_dma_transmission, .enable_dma_transmission = dwmac_enable_dma_transmission,
.enable_dma_irq = dwmac_enable_dma_irq, .enable_dma_irq = dwmac_enable_dma_irq,
.disable_dma_irq = dwmac_disable_dma_irq, .disable_dma_irq = dwmac_disable_dma_irq,
......
/*******************************************************************************
MMC Header file
Copyright (C) 2011 STMicroelectronics Ltd
This program is free software; you can redistribute it and/or modify it
under the terms and conditions of the GNU General Public License,
version 2, as published by the Free Software Foundation.
This program is distributed in the hope it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along with
this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
The full GNU General Public License is included in this distribution in
the file called "COPYING".
Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
*******************************************************************************/
/* MMC control register */
/* When set, all counter are reset */
#define MMC_CNTRL_COUNTER_RESET 0x1
/* When set, do not roll over zero
* after reaching the max value*/
#define MMC_CNTRL_COUNTER_STOP_ROLLOVER 0x2
#define MMC_CNTRL_RESET_ON_READ 0x4 /* Reset after reading */
#define MMC_CNTRL_COUNTER_FREEZER 0x8 /* Freeze counter values to the
* current value.*/
#define MMC_CNTRL_PRESET 0x10
#define MMC_CNTRL_FULL_HALF_PRESET 0x20
struct stmmac_counters {
unsigned int mmc_tx_octetcount_gb;
unsigned int mmc_tx_framecount_gb;
unsigned int mmc_tx_broadcastframe_g;
unsigned int mmc_tx_multicastframe_g;
unsigned int mmc_tx_64_octets_gb;
unsigned int mmc_tx_65_to_127_octets_gb;
unsigned int mmc_tx_128_to_255_octets_gb;
unsigned int mmc_tx_256_to_511_octets_gb;
unsigned int mmc_tx_512_to_1023_octets_gb;
unsigned int mmc_tx_1024_to_max_octets_gb;
unsigned int mmc_tx_unicast_gb;
unsigned int mmc_tx_multicast_gb;
unsigned int mmc_tx_broadcast_gb;
unsigned int mmc_tx_underflow_error;
unsigned int mmc_tx_singlecol_g;
unsigned int mmc_tx_multicol_g;
unsigned int mmc_tx_deferred;
unsigned int mmc_tx_latecol;
unsigned int mmc_tx_exesscol;
unsigned int mmc_tx_carrier_error;
unsigned int mmc_tx_octetcount_g;
unsigned int mmc_tx_framecount_g;
unsigned int mmc_tx_excessdef;
unsigned int mmc_tx_pause_frame;
unsigned int mmc_tx_vlan_frame_g;
/* MMC RX counter registers */
unsigned int mmc_rx_framecount_gb;
unsigned int mmc_rx_octetcount_gb;
unsigned int mmc_rx_octetcount_g;
unsigned int mmc_rx_broadcastframe_g;
unsigned int mmc_rx_multicastframe_g;
unsigned int mmc_rx_crc_errror;
unsigned int mmc_rx_align_error;
unsigned int mmc_rx_run_error;
unsigned int mmc_rx_jabber_error;
unsigned int mmc_rx_undersize_g;
unsigned int mmc_rx_oversize_g;
unsigned int mmc_rx_64_octets_gb;
unsigned int mmc_rx_65_to_127_octets_gb;
unsigned int mmc_rx_128_to_255_octets_gb;
unsigned int mmc_rx_256_to_511_octets_gb;
unsigned int mmc_rx_512_to_1023_octets_gb;
unsigned int mmc_rx_1024_to_max_octets_gb;
unsigned int mmc_rx_unicast_g;
unsigned int mmc_rx_length_error;
unsigned int mmc_rx_autofrangetype;
unsigned int mmc_rx_pause_frames;
unsigned int mmc_rx_fifo_overflow;
unsigned int mmc_rx_vlan_frames_gb;
unsigned int mmc_rx_watchdog_error;
/* IPC */
unsigned int mmc_rx_ipc_intr_mask;
unsigned int mmc_rx_ipc_intr;
/* IPv4 */
unsigned int mmc_rx_ipv4_gd;
unsigned int mmc_rx_ipv4_hderr;
unsigned int mmc_rx_ipv4_nopay;
unsigned int mmc_rx_ipv4_frag;
unsigned int mmc_rx_ipv4_udsbl;
unsigned int mmc_rx_ipv4_gd_octets;
unsigned int mmc_rx_ipv4_hderr_octets;
unsigned int mmc_rx_ipv4_nopay_octets;
unsigned int mmc_rx_ipv4_frag_octets;
unsigned int mmc_rx_ipv4_udsbl_octets;
/* IPV6 */
unsigned int mmc_rx_ipv6_gd_octets;
unsigned int mmc_rx_ipv6_hderr_octets;
unsigned int mmc_rx_ipv6_nopay_octets;
unsigned int mmc_rx_ipv6_gd;
unsigned int mmc_rx_ipv6_hderr;
unsigned int mmc_rx_ipv6_nopay;
/* Protocols */
unsigned int mmc_rx_udp_gd;
unsigned int mmc_rx_udp_err;
unsigned int mmc_rx_tcp_gd;
unsigned int mmc_rx_tcp_err;
unsigned int mmc_rx_icmp_gd;
unsigned int mmc_rx_icmp_err;
unsigned int mmc_rx_udp_gd_octets;
unsigned int mmc_rx_udp_err_octets;
unsigned int mmc_rx_tcp_gd_octets;
unsigned int mmc_rx_tcp_err_octets;
unsigned int mmc_rx_icmp_gd_octets;
unsigned int mmc_rx_icmp_err_octets;
};
extern void dwmac_mmc_ctrl(void __iomem *ioaddr, unsigned int mode);
extern void dwmac_mmc_intr_all_mask(void __iomem *ioaddr);
extern void dwmac_mmc_read(void __iomem *ioaddr, struct stmmac_counters *mmc);
This diff is collapsed.
...@@ -77,6 +77,7 @@ struct stmmac_priv { ...@@ -77,6 +77,7 @@ struct stmmac_priv {
struct stmmac_timer *tm; struct stmmac_timer *tm;
#endif #endif
struct plat_stmmacenet_data *plat; struct plat_stmmacenet_data *plat;
struct stmmac_counters mmc;
}; };
extern int stmmac_mdio_unregister(struct net_device *ndev); extern int stmmac_mdio_unregister(struct net_device *ndev);
......
...@@ -91,19 +91,106 @@ static const struct stmmac_stats stmmac_gstrings_stats[] = { ...@@ -91,19 +91,106 @@ static const struct stmmac_stats stmmac_gstrings_stats[] = {
}; };
#define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats) #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
/* HW MAC Management counters (if supported) */
#define STMMAC_MMC_STAT(m) \
{ #m, FIELD_SIZEOF(struct stmmac_counters, m), \
offsetof(struct stmmac_priv, mmc.m)}
static const struct stmmac_stats stmmac_gstr_mmc[] = {
STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
STMMAC_MMC_STAT(mmc_tx_framecount_gb),
STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
STMMAC_MMC_STAT(mmc_tx_unicast_gb),
STMMAC_MMC_STAT(mmc_tx_multicast_gb),
STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
STMMAC_MMC_STAT(mmc_tx_underflow_error),
STMMAC_MMC_STAT(mmc_tx_singlecol_g),
STMMAC_MMC_STAT(mmc_tx_multicol_g),
STMMAC_MMC_STAT(mmc_tx_deferred),
STMMAC_MMC_STAT(mmc_tx_latecol),
STMMAC_MMC_STAT(mmc_tx_exesscol),
STMMAC_MMC_STAT(mmc_tx_carrier_error),
STMMAC_MMC_STAT(mmc_tx_octetcount_g),
STMMAC_MMC_STAT(mmc_tx_framecount_g),
STMMAC_MMC_STAT(mmc_tx_excessdef),
STMMAC_MMC_STAT(mmc_tx_pause_frame),
STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
STMMAC_MMC_STAT(mmc_rx_framecount_gb),
STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
STMMAC_MMC_STAT(mmc_rx_octetcount_g),
STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
STMMAC_MMC_STAT(mmc_rx_crc_errror),
STMMAC_MMC_STAT(mmc_rx_align_error),
STMMAC_MMC_STAT(mmc_rx_run_error),
STMMAC_MMC_STAT(mmc_rx_jabber_error),
STMMAC_MMC_STAT(mmc_rx_undersize_g),
STMMAC_MMC_STAT(mmc_rx_oversize_g),
STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
STMMAC_MMC_STAT(mmc_rx_unicast_g),
STMMAC_MMC_STAT(mmc_rx_length_error),
STMMAC_MMC_STAT(mmc_rx_autofrangetype),
STMMAC_MMC_STAT(mmc_rx_pause_frames),
STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
STMMAC_MMC_STAT(mmc_rx_watchdog_error),
STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
STMMAC_MMC_STAT(mmc_rx_ipc_intr),
STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
STMMAC_MMC_STAT(mmc_rx_udp_gd),
STMMAC_MMC_STAT(mmc_rx_udp_err),
STMMAC_MMC_STAT(mmc_rx_tcp_gd),
STMMAC_MMC_STAT(mmc_rx_tcp_err),
STMMAC_MMC_STAT(mmc_rx_icmp_gd),
STMMAC_MMC_STAT(mmc_rx_icmp_err),
STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
};
#define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_gstr_mmc)
static void stmmac_ethtool_getdrvinfo(struct net_device *dev, static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
struct ethtool_drvinfo *info) struct ethtool_drvinfo *info)
{ {
struct stmmac_priv *priv = netdev_priv(dev); struct stmmac_priv *priv = netdev_priv(dev);
if (!priv->plat->has_gmac) if (priv->plat->has_gmac)
strcpy(info->driver, MAC100_ETHTOOL_NAME);
else
strcpy(info->driver, GMAC_ETHTOOL_NAME); strcpy(info->driver, GMAC_ETHTOOL_NAME);
else
strcpy(info->driver, MAC100_ETHTOOL_NAME);
strcpy(info->version, DRV_MODULE_VERSION); strcpy(info->version, DRV_MODULE_VERSION);
info->fw_version[0] = '\0'; info->fw_version[0] = '\0';
info->n_stats = STMMAC_STATS_LEN;
} }
static int stmmac_ethtool_getsettings(struct net_device *dev, static int stmmac_ethtool_getsettings(struct net_device *dev,
...@@ -252,24 +339,44 @@ static void stmmac_get_ethtool_stats(struct net_device *dev, ...@@ -252,24 +339,44 @@ static void stmmac_get_ethtool_stats(struct net_device *dev,
struct ethtool_stats *dummy, u64 *data) struct ethtool_stats *dummy, u64 *data)
{ {
struct stmmac_priv *priv = netdev_priv(dev); struct stmmac_priv *priv = netdev_priv(dev);
int i; int i, j = 0;
/* Update HW stats if supported */ /* Update the DMA HW counters for dwmac10/100 */
priv->hw->dma->dma_diagnostic_fr(&dev->stats, (void *) &priv->xstats, if (!priv->plat->has_gmac)
priv->hw->dma->dma_diagnostic_fr(&dev->stats,
(void *) &priv->xstats,
priv->ioaddr); priv->ioaddr);
else {
/* If supported, for new GMAC chips expose the MMC counters */
dwmac_mmc_read(priv->ioaddr, &priv->mmc);
for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
char *p = (char *)priv + stmmac_gstr_mmc[i].stat_offset;
data[j++] = (stmmac_gstr_mmc[i].sizeof_stat ==
sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
}
}
for (i = 0; i < STMMAC_STATS_LEN; i++) { for (i = 0; i < STMMAC_STATS_LEN; i++) {
char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset; char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
data[i] = (stmmac_gstrings_stats[i].sizeof_stat == data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p); sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
} }
} }
static int stmmac_get_sset_count(struct net_device *netdev, int sset) static int stmmac_get_sset_count(struct net_device *netdev, int sset)
{ {
struct stmmac_priv *priv = netdev_priv(netdev);
int len;
switch (sset) { switch (sset) {
case ETH_SS_STATS: case ETH_SS_STATS:
return STMMAC_STATS_LEN; len = STMMAC_STATS_LEN;
if (priv->plat->has_gmac)
len += STMMAC_MMC_STATS_LEN;
return len;
default: default:
return -EOPNOTSUPP; return -EOPNOTSUPP;
} }
...@@ -279,9 +386,16 @@ static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data) ...@@ -279,9 +386,16 @@ static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
{ {
int i; int i;
u8 *p = data; u8 *p = data;
struct stmmac_priv *priv = netdev_priv(dev);
switch (stringset) { switch (stringset) {
case ETH_SS_STATS: case ETH_SS_STATS:
if (priv->plat->has_gmac)
for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
memcpy(p, stmmac_gstr_mmc[i].stat_string,
ETH_GSTRING_LEN);
p += ETH_GSTRING_LEN;
}
for (i = 0; i < STMMAC_STATS_LEN; i++) { for (i = 0; i < STMMAC_STATS_LEN; i++) {
memcpy(p, stmmac_gstrings_stats[i].stat_string, memcpy(p, stmmac_gstrings_stats[i].stat_string,
ETH_GSTRING_LEN); ETH_GSTRING_LEN);
......
...@@ -748,6 +748,17 @@ static void stmmac_dma_interrupt(struct stmmac_priv *priv) ...@@ -748,6 +748,17 @@ static void stmmac_dma_interrupt(struct stmmac_priv *priv)
stmmac_tx_err(priv); stmmac_tx_err(priv);
} }
static void stmmac_mmc_setup(struct stmmac_priv *priv)
{
unsigned int mode = MMC_CNTRL_RESET_ON_READ | MMC_CNTRL_COUNTER_RESET |
MMC_CNTRL_PRESET | MMC_CNTRL_FULL_HALF_PRESET;
/* Do not manage MMC IRQ (FIXME) */
dwmac_mmc_intr_all_mask(priv->ioaddr);
dwmac_mmc_ctrl(priv->ioaddr, mode);
memset(&priv->mmc, 0, sizeof(struct stmmac_counters));
}
/** /**
* stmmac_open - open entry point of the driver * stmmac_open - open entry point of the driver
* @dev : pointer to the device structure. * @dev : pointer to the device structure.
...@@ -846,6 +857,8 @@ static int stmmac_open(struct net_device *dev) ...@@ -846,6 +857,8 @@ static int stmmac_open(struct net_device *dev)
memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats)); memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
priv->xstats.threshold = tc; priv->xstats.threshold = tc;
stmmac_mmc_setup(priv);
/* Start the ball rolling... */ /* Start the ball rolling... */
DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name); DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
priv->hw->dma->start_tx(priv->ioaddr); priv->hw->dma->start_tx(priv->ioaddr);
......
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