Commit 2043f43e authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amd/powerplay: enable set lowest mclk clock on baffin.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 971f8daa
...@@ -3136,7 +3136,7 @@ static int polaris10_force_dpm_lowest(struct pp_hwmgr *hwmgr) ...@@ -3136,7 +3136,7 @@ static int polaris10_force_dpm_lowest(struct pp_hwmgr *hwmgr)
(1 << level)); (1 << level));
} }
/* uvd is enabled, can't set mclk low right now
if (!data->mclk_dpm_key_disabled) { if (!data->mclk_dpm_key_disabled) {
if (data->dpm_level_enable_mask.mclk_dpm_enable_mask) { if (data->dpm_level_enable_mask.mclk_dpm_enable_mask) {
level = phm_get_lowest_enabled_level(hwmgr, level = phm_get_lowest_enabled_level(hwmgr,
...@@ -3146,7 +3146,7 @@ static int polaris10_force_dpm_lowest(struct pp_hwmgr *hwmgr) ...@@ -3146,7 +3146,7 @@ static int polaris10_force_dpm_lowest(struct pp_hwmgr *hwmgr)
(1 << level)); (1 << level));
} }
} }
*/
if (!data->pcie_dpm_key_disabled) { if (!data->pcie_dpm_key_disabled) {
if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) { if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) {
level = phm_get_lowest_enabled_level(hwmgr, level = phm_get_lowest_enabled_level(hwmgr,
......
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