[PATCH] nautilus update

- make irongate_ioremap() use generic __alpha_remap_area_pages();
- remove huge debugging printk;
- AGP remapping hardware disabled for now. Any attempt to use it
  would result in corrupted memory;
- albacore (UP1500) support:
  - handle differences between AMD-761 (UP1500) and AMD-751 (UP1000/1100)
    chipsets, namely ECC mode/status and pci_mem registers;
  - customized nautilus_init_pci() to minimize amount of system memory
    consumed by PCI MMIO for 4Gb configuration.

Ivan.

arch/alpha/kernel/sys_nautilus.c

@@ -31,6 +31,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/reboot.h>
+#include <linux/bootmem.h>
 
 #include <asm/ptrace.h>
 #include <asm/system.h>
@@ -174,6 +175,70 @@ nautilus_machine_check(unsigned long vector, unsigned long la_ptr,
 	mb();
 }
 
+extern void free_reserved_mem(void *, void *);
+
+void __init
+nautilus_init_pci(void)
+{
+	struct pci_controller *hose = hose_head;
+	struct pci_bus *bus;
+	struct pci_dev *irongate;
+	unsigned long saved_io_start, saved_io_end;
+	unsigned long saved_mem_start, saved_mem_end;
+	unsigned long bus_align, bus_size, pci_mem;
+	unsigned long memtop = max_low_pfn << PAGE_SHIFT;
+
+	/* Scan our single hose.  */
+	bus = pci_scan_bus(0, alpha_mv.pci_ops, hose);
+	hose->bus = bus;
+	hose->last_busno = bus->subordinate;
+
+	/* We're going to size the root bus, so we must
+	   - have a non-NULL PCI device associated with the bus
+	   - preserve hose resources. */
+	irongate = pci_find_slot(0, 0);
+	bus->self = irongate;
+	saved_io_start = bus->resource[0]->start;
+	saved_io_end = bus->resource[0]->end;
+	saved_mem_start = bus->resource[1]->start;
+	saved_mem_end = bus->resource[1]->end;
+
+	pci_bus_size_bridges(bus);
+
+	/* Don't care about IO. */
+	bus->resource[0]->start = saved_io_start;
+	bus->resource[0]->end = saved_io_end;
+
+	bus_align = bus->resource[1]->start;
+	bus_size = bus->resource[1]->end + 1 - bus_align;
+	/* Align to 16Mb. */
+	if (bus_align < 0x1000000UL)
+		bus_align = 0x1000000UL;
+
+	/* Restore hose MEM resource. */
+	bus->resource[1]->start = saved_mem_start;
+	bus->resource[1]->end = saved_mem_end;
+
+	pci_mem = (0x100000000UL - bus_size) & -bus_align;
+
+	if (pci_mem < memtop && pci_mem > alpha_mv.min_mem_address) {
+		free_reserved_mem(__va(alpha_mv.min_mem_address),
+				  __va(pci_mem));
+		printk("nautilus_init_arch: %ldk freed\n",
+			(pci_mem - alpha_mv.min_mem_address) >> 10);
+	}
+
+	alpha_mv.min_mem_address = pci_mem;
+	if ((IRONGATE0->dev_vendor >> 16) > 0x7006)	/* Albacore? */
+		IRONGATE0->pci_mem = pci_mem;
+
+	pci_bus_assign_resources(bus);
+
+	/* To break the loop in common_swizzle() */
+	bus->self = NULL;
+
+	pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq);
+}
 
 /*
  * The System Vectors
@@ -196,7 +261,7 @@ struct alpha_machine_vector nautilus_mv __initmv = {
 	.init_arch		= irongate_init_arch,
 	.init_irq		= nautilus_init_irq,
 	.init_rtc		= common_init_rtc,
-	.init_pci		= common_init_pci,
+	.init_pci		= nautilus_init_pci,
 	.kill_arch		= nautilus_kill_arch,
 	.pci_map_irq		= nautilus_map_irq,
 	.pci_swizzle		= common_swizzle,

include/asm-alpha/core_irongate.h

@@ -50,13 +50,14 @@ typedef struct {
 
 	igcsr32 bacsr10;		/* 0x40 - base address chip selects */
 	igcsr32 bacsr32;		/* 0x44 - base address chip selects */
-	igcsr32 bacsr54;		/* 0x48 - base address chip selects */
+	igcsr32 bacsr54_eccms761;	/* 0x48 - 751: base addr. chip selects
+						  761: ECC, mode/status */
 
 	igcsr32 rsrvd2[1];		/* 0x4C-0x4F reserved */
 
 	igcsr32 drammap;		/* 0x50 - address mapping control */
 	igcsr32 dramtm;			/* 0x54 - timing, driver strength */
-	igcsr32 dramms;			/* 0x58 - ECC, mode/status */
+	igcsr32 dramms;			/* 0x58 - DRAM mode/status */
 
 	igcsr32 rsrvd3[1];		/* 0x5C-0x5F reserved */
 
@@ -73,7 +74,10 @@ typedef struct {
 	igcsr32 pciarb;			/* 0x84 - PCI arbitration control */
 	igcsr32 pcicfg;			/* 0x88 - PCI config status */
 
-	igcsr32 rsrvd6[5];		/* 0x8C-0x9F reserved */
+	igcsr32 rsrvd6[4];		/* 0x8C-0x9B reserved */
+
+	igcsr32 pci_mem;		/* 0x9C - PCI top of memory,
+						  761 only */
 
 	/* AGP (bus 1) control registers */
 	igcsr32 agpcap;			/* 0xA0 - AGP Capability Identifier */
@@ -102,6 +106,7 @@ typedef struct {
 
 } Irongate1;
 
+extern igcsr32 *IronECC;
 
 /*
  * Memory spaces: