Commit 22e9af4e authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://kernel.bkbits.net/davem/sparc-2.6

into ppc970.osdl.org:/home/torvalds/v2.5/linux
parents 558dadec 333876f3
......@@ -569,28 +569,37 @@ ide_startstop_t __ide_do_rw_disk (ide_drive_t *drive, struct request *rq, sector
}
EXPORT_SYMBOL_GPL(__ide_do_rw_disk);
static task_ioreg_t get_command (ide_drive_t *drive, int cmd)
static u8 get_command(ide_drive_t *drive, int cmd, ide_task_t *task)
{
int lba48bit = (drive->addressing == 1) ? 1 : 0;
if ((cmd == READ) && drive->using_tcq)
return lba48bit ? WIN_READDMA_QUEUED_EXT : WIN_READDMA_QUEUED;
if ((cmd == READ) && (drive->using_dma))
return (lba48bit) ? WIN_READDMA_EXT : WIN_READDMA;
else if ((cmd == READ) && (drive->mult_count))
return (lba48bit) ? WIN_MULTREAD_EXT : WIN_MULTREAD;
else if (cmd == READ)
return (lba48bit) ? WIN_READ_EXT : WIN_READ;
else if ((cmd == WRITE) && drive->using_tcq)
return lba48bit ? WIN_WRITEDMA_QUEUED_EXT : WIN_WRITEDMA_QUEUED;
else if ((cmd == WRITE) && (drive->using_dma))
return (lba48bit) ? WIN_WRITEDMA_EXT : WIN_WRITEDMA;
else if ((cmd == WRITE) && (drive->mult_count))
return (lba48bit) ? WIN_MULTWRITE_EXT : WIN_MULTWRITE;
else if (cmd == WRITE)
return (lba48bit) ? WIN_WRITE_EXT : WIN_WRITE;
else
return WIN_NOP;
unsigned int lba48 = (drive->addressing == 1) ? 1 : 0;
if (cmd == READ) {
task->command_type = IDE_DRIVE_TASK_IN;
if (drive->using_tcq)
return lba48 ? WIN_READDMA_QUEUED_EXT : WIN_READDMA_QUEUED;
if (drive->using_dma)
return lba48 ? WIN_READDMA_EXT : WIN_READDMA;
if (drive->mult_count) {
task->handler = &task_mulin_intr;
return lba48 ? WIN_MULTREAD_EXT : WIN_MULTREAD;
}
task->handler = &task_in_intr;
return lba48 ? WIN_READ_EXT : WIN_READ;
} else {
task->command_type = IDE_DRIVE_TASK_RAW_WRITE;
if (drive->using_tcq)
return lba48 ? WIN_WRITEDMA_QUEUED_EXT : WIN_WRITEDMA_QUEUED;
if (drive->using_dma)
return lba48 ? WIN_WRITEDMA_EXT : WIN_WRITEDMA;
if (drive->mult_count) {
task->prehandler = &pre_task_mulout_intr;
task->handler = &task_mulout_intr;
return lba48 ? WIN_MULTWRITE_EXT : WIN_MULTWRITE;
}
task->prehandler = &pre_task_out_intr;
task->handler = &task_out_intr;
return lba48 ? WIN_WRITE_EXT : WIN_WRITE;
}
}
static ide_startstop_t chs_rw_disk (ide_drive_t *drive, struct request *rq, unsigned long block)
......@@ -598,7 +607,6 @@ static ide_startstop_t chs_rw_disk (ide_drive_t *drive, struct request *rq, unsi
ide_task_t args;
int sectors;
ata_nsector_t nsectors;
task_ioreg_t command = get_command(drive, rq_data_dir(rq));
unsigned int track = (block / drive->sect);
unsigned int sect = (block % drive->sect) + 1;
unsigned int head = (track % drive->head);
......@@ -628,8 +636,7 @@ static ide_startstop_t chs_rw_disk (ide_drive_t *drive, struct request *rq, unsi
args.tfRegister[IDE_HCYL_OFFSET] = (cyl>>8);
args.tfRegister[IDE_SELECT_OFFSET] = head;
args.tfRegister[IDE_SELECT_OFFSET] |= drive->select.all;
args.tfRegister[IDE_COMMAND_OFFSET] = command;
args.command_type = ide_cmd_type_parser(&args);
args.tfRegister[IDE_COMMAND_OFFSET] = get_command(drive, rq_data_dir(rq), &args);
args.rq = (struct request *) rq;
rq->special = (ide_task_t *)&args;
return do_rw_taskfile(drive, &args);
......@@ -640,7 +647,6 @@ static ide_startstop_t lba_28_rw_disk (ide_drive_t *drive, struct request *rq, u
ide_task_t args;
int sectors;
ata_nsector_t nsectors;
task_ioreg_t command = get_command(drive, rq_data_dir(rq));
nsectors.all = (u16) rq->nr_sectors;
......@@ -666,8 +672,7 @@ static ide_startstop_t lba_28_rw_disk (ide_drive_t *drive, struct request *rq, u
args.tfRegister[IDE_HCYL_OFFSET] = (block>>=8);
args.tfRegister[IDE_SELECT_OFFSET] = ((block>>8)&0x0f);
args.tfRegister[IDE_SELECT_OFFSET] |= drive->select.all;
args.tfRegister[IDE_COMMAND_OFFSET] = command;
args.command_type = ide_cmd_type_parser(&args);
args.tfRegister[IDE_COMMAND_OFFSET] = get_command(drive, rq_data_dir(rq), &args);
args.rq = (struct request *) rq;
rq->special = (ide_task_t *)&args;
return do_rw_taskfile(drive, &args);
......@@ -684,7 +689,6 @@ static ide_startstop_t lba_48_rw_disk (ide_drive_t *drive, struct request *rq, u
ide_task_t args;
int sectors;
ata_nsector_t nsectors;
task_ioreg_t command = get_command(drive, rq_data_dir(rq));
nsectors.all = (u16) rq->nr_sectors;
......@@ -702,24 +706,23 @@ static ide_startstop_t lba_48_rw_disk (ide_drive_t *drive, struct request *rq, u
if (blk_rq_tagged(rq)) {
args.tfRegister[IDE_FEATURE_OFFSET] = sectors;
args.tfRegister[IDE_NSECTOR_OFFSET] = rq->tag << 3;
args.hobRegister[IDE_FEATURE_OFFSET_HOB] = sectors >> 8;
args.hobRegister[IDE_NSECTOR_OFFSET_HOB] = 0;
args.hobRegister[IDE_FEATURE_OFFSET] = sectors >> 8;
args.hobRegister[IDE_NSECTOR_OFFSET] = 0;
} else {
args.tfRegister[IDE_NSECTOR_OFFSET] = sectors;
args.hobRegister[IDE_NSECTOR_OFFSET_HOB] = sectors >> 8;
args.hobRegister[IDE_NSECTOR_OFFSET] = sectors >> 8;
}
args.tfRegister[IDE_SECTOR_OFFSET] = block; /* low lba */
args.tfRegister[IDE_LCYL_OFFSET] = (block>>=8); /* mid lba */
args.tfRegister[IDE_HCYL_OFFSET] = (block>>=8); /* hi lba */
args.tfRegister[IDE_SELECT_OFFSET] = drive->select.all;
args.tfRegister[IDE_COMMAND_OFFSET] = command;
args.hobRegister[IDE_SECTOR_OFFSET_HOB] = (block>>=8); /* low lba */
args.hobRegister[IDE_LCYL_OFFSET_HOB] = (block>>=8); /* mid lba */
args.hobRegister[IDE_HCYL_OFFSET_HOB] = (block>>=8); /* hi lba */
args.hobRegister[IDE_SELECT_OFFSET_HOB] = drive->select.all;
args.tfRegister[IDE_COMMAND_OFFSET] = get_command(drive, rq_data_dir(rq), &args);
args.hobRegister[IDE_SECTOR_OFFSET] = (block>>=8); /* low lba */
args.hobRegister[IDE_LCYL_OFFSET] = (block>>=8); /* mid lba */
args.hobRegister[IDE_HCYL_OFFSET] = (block>>=8); /* hi lba */
args.hobRegister[IDE_SELECT_OFFSET] = drive->select.all;
args.hobRegister[IDE_CONTROL_OFFSET_HOB]= (drive->ctl|0x80);
args.command_type = ide_cmd_type_parser(&args);
args.rq = (struct request *) rq;
rq->special = (ide_task_t *)&args;
return do_rw_taskfile(drive, &args);
......@@ -927,7 +930,8 @@ static unsigned long idedisk_read_native_max_address(ide_drive_t *drive)
memset(&args, 0, sizeof(ide_task_t));
args.tfRegister[IDE_SELECT_OFFSET] = 0x40;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_READ_NATIVE_MAX;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &task_no_data_intr;
/* submit command request */
ide_raw_taskfile(drive, &args, NULL);
......@@ -952,15 +956,16 @@ static unsigned long long idedisk_read_native_max_address_ext(ide_drive_t *drive
args.tfRegister[IDE_SELECT_OFFSET] = 0x40;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_READ_NATIVE_MAX_EXT;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &task_no_data_intr;
/* submit command request */
ide_raw_taskfile(drive, &args, NULL);
/* if OK, compute maximum address value */
if ((args.tfRegister[IDE_STATUS_OFFSET] & 0x01) == 0) {
u32 high = ((args.hobRegister[IDE_HCYL_OFFSET_HOB])<<16) |
((args.hobRegister[IDE_LCYL_OFFSET_HOB])<<8) |
(args.hobRegister[IDE_SECTOR_OFFSET_HOB]);
u32 high = (args.hobRegister[IDE_HCYL_OFFSET] << 16) |
(args.hobRegister[IDE_LCYL_OFFSET] << 8) |
args.hobRegister[IDE_SECTOR_OFFSET];
u32 low = ((args.tfRegister[IDE_HCYL_OFFSET])<<16) |
((args.tfRegister[IDE_LCYL_OFFSET])<<8) |
(args.tfRegister[IDE_SECTOR_OFFSET]);
......@@ -988,7 +993,8 @@ static unsigned long idedisk_set_max_address(ide_drive_t *drive, unsigned long a
args.tfRegister[IDE_HCYL_OFFSET] = ((addr_req >> 16) & 0xff);
args.tfRegister[IDE_SELECT_OFFSET] = ((addr_req >> 24) & 0x0f) | 0x40;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_SET_MAX;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &task_no_data_intr;
/* submit command request */
ide_raw_taskfile(drive, &args, NULL);
/* if OK, read new maximum address value */
......@@ -1015,19 +1021,20 @@ static unsigned long long idedisk_set_max_address_ext(ide_drive_t *drive, unsign
args.tfRegister[IDE_HCYL_OFFSET] = ((addr_req >>= 8) & 0xff);
args.tfRegister[IDE_SELECT_OFFSET] = 0x40;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_SET_MAX_EXT;
args.hobRegister[IDE_SECTOR_OFFSET_HOB] = ((addr_req >>= 8) & 0xff);
args.hobRegister[IDE_LCYL_OFFSET_HOB] = ((addr_req >>= 8) & 0xff);
args.hobRegister[IDE_HCYL_OFFSET_HOB] = ((addr_req >>= 8) & 0xff);
args.hobRegister[IDE_SELECT_OFFSET_HOB] = 0x40;
args.hobRegister[IDE_SECTOR_OFFSET] = (addr_req >>= 8) & 0xff;
args.hobRegister[IDE_LCYL_OFFSET] = (addr_req >>= 8) & 0xff;
args.hobRegister[IDE_HCYL_OFFSET] = (addr_req >>= 8) & 0xff;
args.hobRegister[IDE_SELECT_OFFSET] = 0x40;
args.hobRegister[IDE_CONTROL_OFFSET_HOB]= (drive->ctl|0x80);
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &task_no_data_intr;
/* submit command request */
ide_raw_taskfile(drive, &args, NULL);
/* if OK, compute maximum address value */
if ((args.tfRegister[IDE_STATUS_OFFSET] & 0x01) == 0) {
u32 high = ((args.hobRegister[IDE_HCYL_OFFSET_HOB])<<16) |
((args.hobRegister[IDE_LCYL_OFFSET_HOB])<<8) |
(args.hobRegister[IDE_SECTOR_OFFSET_HOB]);
u32 high = (args.hobRegister[IDE_HCYL_OFFSET] << 16) |
(args.hobRegister[IDE_LCYL_OFFSET] << 8) |
args.hobRegister[IDE_SECTOR_OFFSET];
u32 low = ((args.tfRegister[IDE_HCYL_OFFSET])<<16) |
((args.tfRegister[IDE_LCYL_OFFSET])<<8) |
(args.tfRegister[IDE_SECTOR_OFFSET]);
......@@ -1158,7 +1165,8 @@ static ide_startstop_t idedisk_special (ide_drive_t *drive)
args.tfRegister[IDE_HCYL_OFFSET] = drive->cyl>>8;
args.tfRegister[IDE_SELECT_OFFSET] = ((drive->head-1)|drive->select.all)&0xBF;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_SPECIFY;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &set_geometry_intr;
do_rw_taskfile(drive, &args);
}
} else if (s->b.recalibrate) {
......@@ -1168,7 +1176,8 @@ static ide_startstop_t idedisk_special (ide_drive_t *drive)
memset(&args, 0, sizeof(ide_task_t));
args.tfRegister[IDE_NSECTOR_OFFSET] = drive->sect;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_RESTORE;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &recal_intr;
do_rw_taskfile(drive, &args);
}
} else if (s->b.set_multmode) {
......@@ -1180,7 +1189,8 @@ static ide_startstop_t idedisk_special (ide_drive_t *drive)
memset(&args, 0, sizeof(ide_task_t));
args.tfRegister[IDE_NSECTOR_OFFSET] = drive->mult_req;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_SETMULT;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &set_multmode_intr;
do_rw_taskfile(drive, &args);
}
} else if (s->all) {
......@@ -1218,7 +1228,8 @@ static int smart_enable(ide_drive_t *drive)
args.tfRegister[IDE_LCYL_OFFSET] = SMART_LCYL_PASS;
args.tfRegister[IDE_HCYL_OFFSET] = SMART_HCYL_PASS;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_SMART;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &task_no_data_intr;
return ide_raw_taskfile(drive, &args, NULL);
}
......@@ -1232,7 +1243,8 @@ static int get_smart_values(ide_drive_t *drive, u8 *buf)
args.tfRegister[IDE_LCYL_OFFSET] = SMART_LCYL_PASS;
args.tfRegister[IDE_HCYL_OFFSET] = SMART_HCYL_PASS;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_SMART;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_IN;
args.handler = &task_in_intr;
(void) smart_enable(drive);
return ide_raw_taskfile(drive, &args, buf);
}
......@@ -1246,7 +1258,8 @@ static int get_smart_thresholds(ide_drive_t *drive, u8 *buf)
args.tfRegister[IDE_LCYL_OFFSET] = SMART_LCYL_PASS;
args.tfRegister[IDE_HCYL_OFFSET] = SMART_HCYL_PASS;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_SMART;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_IN;
args.handler = &task_in_intr;
(void) smart_enable(drive);
return ide_raw_taskfile(drive, &args, buf);
}
......@@ -1356,7 +1369,8 @@ static int write_cache (ide_drive_t *drive, int arg)
args.tfRegister[IDE_FEATURE_OFFSET] = (arg) ?
SETFEATURES_EN_WCACHE : SETFEATURES_DIS_WCACHE;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_SETFEATURES;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &task_no_data_intr;
(void) ide_raw_taskfile(drive, &args, NULL);
drive->wcache = arg;
......@@ -1372,7 +1386,8 @@ static int do_idedisk_flushcache (ide_drive_t *drive)
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_FLUSH_CACHE_EXT;
else
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_FLUSH_CACHE;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &task_no_data_intr;
return ide_raw_taskfile(drive, &args, NULL);
}
......@@ -1385,7 +1400,8 @@ static int set_acoustic (ide_drive_t *drive, int arg)
SETFEATURES_DIS_AAM;
args.tfRegister[IDE_NSECTOR_OFFSET] = arg;
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_SETFEATURES;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &task_no_data_intr;
ide_raw_taskfile(drive, &args, NULL);
drive->acoustic = arg;
return 0;
......@@ -1504,11 +1520,13 @@ static ide_startstop_t idedisk_start_power_step (ide_drive_t *drive, struct requ
args->tfRegister[IDE_COMMAND_OFFSET] = WIN_FLUSH_CACHE_EXT;
else
args->tfRegister[IDE_COMMAND_OFFSET] = WIN_FLUSH_CACHE;
args->command_type = ide_cmd_type_parser(args);
args->command_type = IDE_DRIVE_TASK_NO_DATA;
args->handler = &task_no_data_intr;
return do_rw_taskfile(drive, args);
case idedisk_pm_standby: /* Suspend step 2 (standby) */
args->tfRegister[IDE_COMMAND_OFFSET] = WIN_STANDBYNOW1;
args->command_type = ide_cmd_type_parser(args);
args->command_type = IDE_DRIVE_TASK_NO_DATA;
args->handler = &task_no_data_intr;
return do_rw_taskfile(drive, args);
case idedisk_pm_restore_dma: /* Resume step 1 (restore DMA) */
......@@ -1716,7 +1734,8 @@ static int idedisk_open(struct inode *inode, struct file *filp)
u8 cf;
memset(&args, 0, sizeof(ide_task_t));
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_DOORLOCK;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &task_no_data_intr;
check_disk_change(inode->i_bdev);
/*
* Ignore the return code from door_lock,
......@@ -1762,7 +1781,8 @@ static int idedisk_release(struct inode *inode, struct file *filp)
ide_task_t args;
memset(&args, 0, sizeof(ide_task_t));
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_DOORUNLOCK;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_NO_DATA;
args.handler = &task_no_data_intr;
if (drive->doorlocking && ide_raw_taskfile(drive, &args, NULL))
drive->doorlocking = 0;
}
......
......@@ -197,7 +197,7 @@ void ide_end_drive_cmd (ide_drive_t *drive, u8 stat, u8 err)
if (args->tf_in_flags.b.data) {
u16 data = hwif->INW(IDE_DATA_REG);
args->tfRegister[IDE_DATA_OFFSET] = (data) & 0xFF;
args->hobRegister[IDE_DATA_OFFSET_HOB] = (data >> 8) & 0xFF;
args->hobRegister[IDE_DATA_OFFSET] = (data >> 8) & 0xFF;
}
args->tfRegister[IDE_ERROR_OFFSET] = err;
args->tfRegister[IDE_NSECTOR_OFFSET] = hwif->INB(IDE_NSECTOR_REG);
......@@ -208,12 +208,12 @@ void ide_end_drive_cmd (ide_drive_t *drive, u8 stat, u8 err)
args->tfRegister[IDE_STATUS_OFFSET] = stat;
if (drive->addressing == 1) {
hwif->OUTB(drive->ctl|0x80, IDE_CONTROL_REG_HOB);
args->hobRegister[IDE_FEATURE_OFFSET_HOB] = hwif->INB(IDE_FEATURE_REG);
args->hobRegister[IDE_NSECTOR_OFFSET_HOB] = hwif->INB(IDE_NSECTOR_REG);
args->hobRegister[IDE_SECTOR_OFFSET_HOB] = hwif->INB(IDE_SECTOR_REG);
args->hobRegister[IDE_LCYL_OFFSET_HOB] = hwif->INB(IDE_LCYL_REG);
args->hobRegister[IDE_HCYL_OFFSET_HOB] = hwif->INB(IDE_HCYL_REG);
hwif->OUTB(drive->ctl|0x80, IDE_CONTROL_REG);
args->hobRegister[IDE_FEATURE_OFFSET] = hwif->INB(IDE_FEATURE_REG);
args->hobRegister[IDE_NSECTOR_OFFSET] = hwif->INB(IDE_NSECTOR_REG);
args->hobRegister[IDE_SECTOR_OFFSET] = hwif->INB(IDE_SECTOR_REG);
args->hobRegister[IDE_LCYL_OFFSET] = hwif->INB(IDE_LCYL_REG);
args->hobRegister[IDE_HCYL_OFFSET] = hwif->INB(IDE_HCYL_REG);
}
}
} else if (blk_pm_request(rq)) {
......
......@@ -101,7 +101,8 @@ int taskfile_lib_get_identify (ide_drive_t *drive, u8 *buf)
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_IDENTIFY;
else
args.tfRegister[IDE_COMMAND_OFFSET] = WIN_PIDENTIFY;
args.command_type = ide_cmd_type_parser(&args);
args.command_type = IDE_DRIVE_TASK_IN;
args.handler = &task_in_intr;
return ide_raw_taskfile(drive, &args, buf);
}
......@@ -120,13 +121,13 @@ void debug_taskfile (ide_drive_t *drive, ide_task_t *args)
printk("TF.6=x%02x ", args->tfRegister[IDE_SELECT_OFFSET]);
printk("TF.7=x%02x\n", args->tfRegister[IDE_COMMAND_OFFSET]);
printk(KERN_INFO "%s: ", drive->name);
// printk("HTF.0=x%02x ", args->hobRegister[IDE_DATA_OFFSET_HOB]);
printk("HTF.1=x%02x ", args->hobRegister[IDE_FEATURE_OFFSET_HOB]);
printk("HTF.2=x%02x ", args->hobRegister[IDE_NSECTOR_OFFSET_HOB]);
printk("HTF.3=x%02x ", args->hobRegister[IDE_SECTOR_OFFSET_HOB]);
printk("HTF.4=x%02x ", args->hobRegister[IDE_LCYL_OFFSET_HOB]);
printk("HTF.5=x%02x ", args->hobRegister[IDE_HCYL_OFFSET_HOB]);
printk("HTF.6=x%02x ", args->hobRegister[IDE_SELECT_OFFSET_HOB]);
// printk("HTF.0=x%02x ", args->hobRegister[IDE_DATA_OFFSET]);
printk("HTF.1=x%02x ", args->hobRegister[IDE_FEATURE_OFFSET]);
printk("HTF.2=x%02x ", args->hobRegister[IDE_NSECTOR_OFFSET]);
printk("HTF.3=x%02x ", args->hobRegister[IDE_SECTOR_OFFSET]);
printk("HTF.4=x%02x ", args->hobRegister[IDE_LCYL_OFFSET]);
printk("HTF.5=x%02x ", args->hobRegister[IDE_HCYL_OFFSET]);
printk("HTF.6=x%02x ", args->hobRegister[IDE_SELECT_OFFSET]);
printk("HTF.7=x%02x\n", args->hobRegister[IDE_CONTROL_OFFSET_HOB]);
}
#endif /* CONFIG_IDE_TASK_IOCTL_DEBUG */
......@@ -990,336 +991,11 @@ EXPORT_SYMBOL(pre_task_mulout_intr);
#endif /* !CONFIG_IDE_TASKFILE_IO */
/* Called by internal to feature out type of command being called */
//ide_pre_handler_t * ide_pre_handler_parser (task_struct_t *taskfile, hob_struct_t *hobfile)
ide_pre_handler_t * ide_pre_handler_parser (struct hd_drive_task_hdr *taskfile, struct hd_drive_hob_hdr *hobfile)
{
switch(taskfile->command) {
/* IDE_DRIVE_TASK_RAW_WRITE */
case CFA_WRITE_MULTI_WO_ERASE:
// case WIN_WRITE_LONG:
// case WIN_WRITE_LONG_ONCE:
case WIN_MULTWRITE:
case WIN_MULTWRITE_EXT:
return &pre_task_mulout_intr;
/* IDE_DRIVE_TASK_OUT */
case WIN_WRITE:
// case WIN_WRITE_ONCE:
case WIN_WRITE_EXT:
case WIN_WRITE_VERIFY:
case WIN_WRITE_BUFFER:
case CFA_WRITE_SECT_WO_ERASE:
case WIN_DOWNLOAD_MICROCODE:
return &pre_task_out_intr;
/* IDE_DRIVE_TASK_OUT */
case WIN_SMART:
if (taskfile->feature == SMART_WRITE_LOG_SECTOR)
return &pre_task_out_intr;
case WIN_WRITEDMA:
// case WIN_WRITEDMA_ONCE:
case WIN_WRITEDMA_QUEUED:
case WIN_WRITEDMA_EXT:
case WIN_WRITEDMA_QUEUED_EXT:
/* IDE_DRIVE_TASK_OUT */
default:
break;
}
return(NULL);
}
EXPORT_SYMBOL(ide_pre_handler_parser);
/* Called by internal to feature out type of command being called */
//ide_handler_t * ide_handler_parser (task_struct_t *taskfile, hob_struct_t *hobfile)
ide_handler_t * ide_handler_parser (struct hd_drive_task_hdr *taskfile, struct hd_drive_hob_hdr *hobfile)
{
switch(taskfile->command) {
case WIN_IDENTIFY:
case WIN_PIDENTIFY:
case CFA_TRANSLATE_SECTOR:
case WIN_READ_BUFFER:
case WIN_READ:
// case WIN_READ_ONCE:
case WIN_READ_EXT:
return &task_in_intr;
case WIN_SECURITY_DISABLE:
case WIN_SECURITY_ERASE_UNIT:
case WIN_SECURITY_SET_PASS:
case WIN_SECURITY_UNLOCK:
case WIN_DOWNLOAD_MICROCODE:
case CFA_WRITE_SECT_WO_ERASE:
case WIN_WRITE_BUFFER:
case WIN_WRITE_VERIFY:
case WIN_WRITE:
// case WIN_WRITE_ONCE:
case WIN_WRITE_EXT:
return &task_out_intr;
// case WIN_READ_LONG:
// case WIN_READ_LONG_ONCE:
case WIN_MULTREAD:
case WIN_MULTREAD_EXT:
return &task_mulin_intr;
// case WIN_WRITE_LONG:
// case WIN_WRITE_LONG_ONCE:
case CFA_WRITE_MULTI_WO_ERASE:
case WIN_MULTWRITE:
case WIN_MULTWRITE_EXT:
return &task_mulout_intr;
case WIN_SMART:
switch(taskfile->feature) {
case SMART_READ_VALUES:
case SMART_READ_THRESHOLDS:
case SMART_READ_LOG_SECTOR:
return &task_in_intr;
case SMART_WRITE_LOG_SECTOR:
return &task_out_intr;
default:
return &task_no_data_intr;
}
case CFA_REQ_EXT_ERROR_CODE:
case CFA_ERASE_SECTORS:
case WIN_VERIFY:
// case WIN_VERIFY_ONCE:
case WIN_VERIFY_EXT:
case WIN_SEEK:
return &task_no_data_intr;
case WIN_SPECIFY:
return &set_geometry_intr;
case WIN_RECAL:
// case WIN_RESTORE:
return &recal_intr;
case WIN_NOP:
case WIN_DIAGNOSE:
case WIN_FLUSH_CACHE:
case WIN_FLUSH_CACHE_EXT:
case WIN_STANDBYNOW1:
case WIN_STANDBYNOW2:
case WIN_SLEEPNOW1:
case WIN_SLEEPNOW2:
case WIN_SETIDLE1:
case WIN_CHECKPOWERMODE1:
case WIN_CHECKPOWERMODE2:
case WIN_GETMEDIASTATUS:
case WIN_MEDIAEJECT:
return &task_no_data_intr;
case WIN_SETMULT:
return &set_multmode_intr;
case WIN_READ_NATIVE_MAX:
case WIN_SET_MAX:
case WIN_READ_NATIVE_MAX_EXT:
case WIN_SET_MAX_EXT:
case WIN_SECURITY_ERASE_PREPARE:
case WIN_SECURITY_FREEZE_LOCK:
case WIN_DOORLOCK:
case WIN_DOORUNLOCK:
case WIN_SETFEATURES:
return &task_no_data_intr;
case DISABLE_SEAGATE:
case EXABYTE_ENABLE_NEST:
return &task_no_data_intr;
case WIN_READDMA:
// case WIN_READDMA_ONCE:
case WIN_IDENTIFY_DMA:
case WIN_READDMA_QUEUED:
case WIN_READDMA_EXT:
case WIN_READDMA_QUEUED_EXT:
case WIN_WRITEDMA:
// case WIN_WRITEDMA_ONCE:
case WIN_WRITEDMA_QUEUED:
case WIN_WRITEDMA_EXT:
case WIN_WRITEDMA_QUEUED_EXT:
case WIN_FORMAT:
case WIN_INIT:
case WIN_DEVICE_RESET:
case WIN_QUEUED_SERVICE:
case WIN_PACKETCMD:
default:
return(NULL);
}
}
EXPORT_SYMBOL(ide_handler_parser);
ide_post_handler_t * ide_post_handler_parser (struct hd_drive_task_hdr *taskfile, struct hd_drive_hob_hdr *hobfile)
{
switch(taskfile->command) {
case WIN_SPECIFY: /* set_geometry_intr */
case WIN_RESTORE: /* recal_intr */
case WIN_SETMULT: /* set_multmode_intr */
default:
return(NULL);
}
}
EXPORT_SYMBOL(ide_post_handler_parser);
/* Called by ioctl to feature out type of command being called */
int ide_cmd_type_parser (ide_task_t *args)
{
task_struct_t *taskfile = (task_struct_t *) args->tfRegister;
hob_struct_t *hobfile = (hob_struct_t *) args->hobRegister;
args->prehandler = ide_pre_handler_parser(taskfile, hobfile);
args->handler = ide_handler_parser(taskfile, hobfile);
args->posthandler = ide_post_handler_parser(taskfile, hobfile);
switch(args->tfRegister[IDE_COMMAND_OFFSET]) {
case WIN_IDENTIFY:
case WIN_PIDENTIFY:
return IDE_DRIVE_TASK_IN;
case CFA_TRANSLATE_SECTOR:
case WIN_READ:
// case WIN_READ_ONCE:
case WIN_READ_EXT:
case WIN_READ_BUFFER:
return IDE_DRIVE_TASK_IN;
case WIN_WRITE:
// case WIN_WRITE_ONCE:
case WIN_WRITE_EXT:
case WIN_WRITE_VERIFY:
case WIN_WRITE_BUFFER:
case CFA_WRITE_SECT_WO_ERASE:
case WIN_DOWNLOAD_MICROCODE:
return IDE_DRIVE_TASK_RAW_WRITE;
// case WIN_READ_LONG:
// case WIN_READ_LONG_ONCE:
case WIN_MULTREAD:
case WIN_MULTREAD_EXT:
return IDE_DRIVE_TASK_IN;
// case WIN_WRITE_LONG:
// case WIN_WRITE_LONG_ONCE:
case CFA_WRITE_MULTI_WO_ERASE:
case WIN_MULTWRITE:
case WIN_MULTWRITE_EXT:
return IDE_DRIVE_TASK_RAW_WRITE;
case WIN_SECURITY_DISABLE:
case WIN_SECURITY_ERASE_UNIT:
case WIN_SECURITY_SET_PASS:
case WIN_SECURITY_UNLOCK:
return IDE_DRIVE_TASK_OUT;
case WIN_SMART:
args->tfRegister[IDE_LCYL_OFFSET] = SMART_LCYL_PASS;
args->tfRegister[IDE_HCYL_OFFSET] = SMART_HCYL_PASS;
switch(args->tfRegister[IDE_FEATURE_OFFSET]) {
case SMART_READ_VALUES:
case SMART_READ_THRESHOLDS:
case SMART_READ_LOG_SECTOR:
return IDE_DRIVE_TASK_IN;
case SMART_WRITE_LOG_SECTOR:
return IDE_DRIVE_TASK_OUT;
default:
return IDE_DRIVE_TASK_NO_DATA;
}
case WIN_READDMA:
// case WIN_READDMA_ONCE:
case WIN_IDENTIFY_DMA:
case WIN_READDMA_QUEUED:
case WIN_READDMA_EXT:
case WIN_READDMA_QUEUED_EXT:
return IDE_DRIVE_TASK_IN;
case WIN_WRITEDMA:
// case WIN_WRITEDMA_ONCE:
case WIN_WRITEDMA_QUEUED:
case WIN_WRITEDMA_EXT:
case WIN_WRITEDMA_QUEUED_EXT:
return IDE_DRIVE_TASK_RAW_WRITE;
case WIN_SETFEATURES:
switch(args->tfRegister[IDE_FEATURE_OFFSET]) {
case SETFEATURES_EN_8BIT:
case SETFEATURES_EN_WCACHE:
return IDE_DRIVE_TASK_NO_DATA;
case SETFEATURES_XFER:
return IDE_DRIVE_TASK_SET_XFER;
case SETFEATURES_DIS_DEFECT:
case SETFEATURES_EN_APM:
case SETFEATURES_DIS_MSN:
case SETFEATURES_DIS_RETRY:
case SETFEATURES_EN_AAM:
case SETFEATURES_RW_LONG:
case SETFEATURES_SET_CACHE:
case SETFEATURES_DIS_RLA:
case SETFEATURES_EN_RI:
case SETFEATURES_EN_SI:
case SETFEATURES_DIS_RPOD:
case SETFEATURES_DIS_WCACHE:
case SETFEATURES_EN_DEFECT:
case SETFEATURES_DIS_APM:
case SETFEATURES_EN_ECC:
case SETFEATURES_EN_MSN:
case SETFEATURES_EN_RETRY:
case SETFEATURES_EN_RLA:
case SETFEATURES_PREFETCH:
case SETFEATURES_4B_RW_LONG:
case SETFEATURES_DIS_AAM:
case SETFEATURES_EN_RPOD:
case SETFEATURES_DIS_RI:
case SETFEATURES_DIS_SI:
default:
return IDE_DRIVE_TASK_NO_DATA;
}
case WIN_NOP:
case CFA_REQ_EXT_ERROR_CODE:
case CFA_ERASE_SECTORS:
case WIN_VERIFY:
// case WIN_VERIFY_ONCE:
case WIN_VERIFY_EXT:
case WIN_SEEK:
case WIN_SPECIFY:
case WIN_RESTORE:
case WIN_DIAGNOSE:
case WIN_FLUSH_CACHE:
case WIN_FLUSH_CACHE_EXT:
case WIN_STANDBYNOW1:
case WIN_STANDBYNOW2:
case WIN_SLEEPNOW1:
case WIN_SLEEPNOW2:
case WIN_SETIDLE1:
case DISABLE_SEAGATE:
case WIN_CHECKPOWERMODE1:
case WIN_CHECKPOWERMODE2:
case WIN_GETMEDIASTATUS:
case WIN_MEDIAEJECT:
case WIN_SETMULT:
case WIN_READ_NATIVE_MAX:
case WIN_SET_MAX:
case WIN_READ_NATIVE_MAX_EXT:
case WIN_SET_MAX_EXT:
case WIN_SECURITY_ERASE_PREPARE:
case WIN_SECURITY_FREEZE_LOCK:
case EXABYTE_ENABLE_NEST:
case WIN_DOORLOCK:
case WIN_DOORUNLOCK:
return IDE_DRIVE_TASK_NO_DATA;
case WIN_FORMAT:
case WIN_INIT:
case WIN_DEVICE_RESET:
case WIN_QUEUED_SERVICE:
case WIN_PACKETCMD:
default:
return IDE_DRIVE_TASK_INVALID;
}
}
EXPORT_SYMBOL(ide_cmd_type_parser);
/*
* This function is intended to be used prior to invoking ide_do_drive_cmd().
*/
void ide_init_drive_taskfile (struct request *rq)
{
memset(rq, 0, sizeof(*rq));
rq->flags = REQ_DRIVE_TASKFILE;
}
EXPORT_SYMBOL(ide_init_drive_taskfile);
int ide_diag_taskfile (ide_drive_t *drive, ide_task_t *args, unsigned long data_size, u8 *buf)
{
struct request rq;
ide_init_drive_taskfile(&rq);
memset(&rq, 0, sizeof(rq));
rq.flags = REQ_DRIVE_TASKFILE;
rq.buffer = buf;
......@@ -1331,7 +1007,7 @@ int ide_diag_taskfile (ide_drive_t *drive, ide_task_t *args, unsigned long data_
*/
if (args->command_type != IDE_DRIVE_TASK_NO_DATA) {
if (data_size == 0)
rq.nr_sectors = (args->hobRegister[IDE_NSECTOR_OFFSET_HOB] << 8) | args->tfRegister[IDE_NSECTOR_OFFSET];
rq.nr_sectors = (args->hobRegister[IDE_NSECTOR_OFFSET] << 8) | args->tfRegister[IDE_NSECTOR_OFFSET];
else
rq.nr_sectors = data_size / SECTOR_SIZE;
......@@ -1339,16 +1015,6 @@ int ide_diag_taskfile (ide_drive_t *drive, ide_task_t *args, unsigned long data_
rq.hard_cur_sectors = rq.current_nr_sectors = rq.nr_sectors;
}
if (args->tf_out_flags.all == 0) {
/*
* clean up kernel settings for driver sanity, regardless.
* except for discrete diag services.
*/
args->posthandler = ide_post_handler_parser(
(struct hd_drive_task_hdr *) args->tfRegister,
(struct hd_drive_hob_hdr *) args->hobRegister);
}
rq.special = args;
return ide_do_drive_cmd(drive, &rq, ide_wait);
}
......@@ -1451,11 +1117,9 @@ int ide_taskfile_ioctl (ide_drive_t *drive, unsigned int cmd, unsigned long arg)
#if 0
args.prehandler = &pre_task_out_intr;
args.handler = &task_out_intr;
args.posthandler = NULL;
err = ide_diag_taskfile(drive, &args, taskout, outbuf);
args.prehandler = NULL;
args.handler = &task_in_intr;
args.posthandler = NULL;
err = ide_diag_taskfile(drive, &args, taskin, inbuf);
break;
#else
......
......@@ -483,7 +483,7 @@ static int ide_tcq_check_autopoll(ide_drive_t *drive)
args->tfRegister[IDE_FEATURE_OFFSET] = 0x01;
args->tfRegister[IDE_COMMAND_OFFSET] = WIN_NOP;
args->command_type = ide_cmd_type_parser(args);
args->command_type = IDE_DRIVE_TASK_NO_DATA;
args->handler = ide_tcq_nop_handler;
return ide_raw_taskfile(drive, args, NULL);
}
......@@ -513,7 +513,8 @@ static int ide_tcq_configure(ide_drive_t *drive)
memset(args, 0, sizeof(ide_task_t));
args->tfRegister[IDE_COMMAND_OFFSET] = WIN_SETFEATURES;
args->tfRegister[IDE_FEATURE_OFFSET] = SETFEATURES_EN_WCACHE;
args->command_type = ide_cmd_type_parser(args);
args->command_type = IDE_DRIVE_TASK_NO_DATA;
args->handler = &task_no_data_intr;
if (ide_raw_taskfile(drive, args, NULL)) {
printk(KERN_WARNING "%s: failed to enable write cache\n", drive->name);
......@@ -527,7 +528,8 @@ static int ide_tcq_configure(ide_drive_t *drive)
memset(args, 0, sizeof(ide_task_t));
args->tfRegister[IDE_COMMAND_OFFSET] = WIN_SETFEATURES;
args->tfRegister[IDE_FEATURE_OFFSET] = SETFEATURES_DIS_RI;
args->command_type = ide_cmd_type_parser(args);
args->command_type = IDE_DRIVE_TASK_NO_DATA;
args->handler = &task_no_data_intr;
if (ide_raw_taskfile(drive, args, NULL)) {
printk(KERN_ERR "%s: disabling release interrupt fail\n", drive->name);
......@@ -541,7 +543,8 @@ static int ide_tcq_configure(ide_drive_t *drive)
memset(args, 0, sizeof(ide_task_t));
args->tfRegister[IDE_COMMAND_OFFSET] = WIN_SETFEATURES;
args->tfRegister[IDE_FEATURE_OFFSET] = SETFEATURES_EN_SI;
args->command_type = ide_cmd_type_parser(args);
args->command_type = IDE_DRIVE_TASK_NO_DATA;
args->handler = &task_no_data_intr;
if (ide_raw_taskfile(drive, args, NULL)) {
printk(KERN_ERR "%s: enabling service interrupt fail\n", drive->name);
......
......@@ -814,10 +814,9 @@ static ide_startstop_t promise_rw_disk (ide_drive_t *drive, struct request *rq,
memcpy(args.tfRegister, &taskfile, sizeof(struct hd_drive_task_hdr));
memset(args.hobRegister, 0, sizeof(struct hd_drive_hob_hdr));
/* We can't call ide_cmd_type_parser here, since it won't understand
our command, but that doesn't matter, since we don't use the
generic interrupt handlers either. Setup the bits of args that we
do need.
/*
* Setup the bits of args that we do need.
* Note that we don't use the generic interrupt handlers.
*/
args.handler = NULL;
args.rq = (struct request *) rq;
......
......@@ -140,108 +140,6 @@ static int check_in_drive_lists (ide_drive_t *drive, const char **list)
return 0;
}
static int pdcnew_tune_chipset (ide_drive_t *drive, u8 xferspeed)
{
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *dev = hwif->pci_dev;
u8 drive_pci = 0x60 + (drive->dn << 2);
u8 speed = ide_rate_filter(pdcnew_ratemask(drive), xferspeed);
u32 drive_conf;
u8 AP, BP, CP, DP;
u8 TA = 0, TB = 0, TC = 0;
if ((drive->media != ide_disk) && (speed < XFER_SW_DMA_0))
return -1;
pci_read_config_dword(dev, drive_pci, &drive_conf);
pci_read_config_byte(dev, (drive_pci), &AP);
pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
pci_read_config_byte(dev, (drive_pci)|0x02, &CP);
pci_read_config_byte(dev, (drive_pci)|0x03, &DP);
if (speed < XFER_SW_DMA_0) {
if ((AP & 0x0F) || (BP & 0x07)) {
/* clear PIO modes of lower 8421 bits of A Register */
pci_write_config_byte(dev, (drive_pci), AP &~0x0F);
pci_read_config_byte(dev, (drive_pci), &AP);
/* clear PIO modes of lower 421 bits of B Register */
pci_write_config_byte(dev, (drive_pci)|0x01, BP &~0x07);
pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
pci_read_config_byte(dev, (drive_pci), &AP);
pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
}
} else {
if ((BP & 0xF0) && (CP & 0x0F)) {
/* clear DMA modes of upper 842 bits of B Register */
/* clear PIO forced mode upper 1 bit of B Register */
pci_write_config_byte(dev, (drive_pci)|0x01, BP &~0xF0);
pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
/* clear DMA modes of lower 8421 bits of C Register */
pci_write_config_byte(dev, (drive_pci)|0x02, CP &~0x0F);
pci_read_config_byte(dev, (drive_pci)|0x02, &CP);
}
}
pci_read_config_byte(dev, (drive_pci), &AP);
pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
pci_read_config_byte(dev, (drive_pci)|0x02, &CP);
switch(speed) {
case XFER_UDMA_6: speed = XFER_UDMA_5;
case XFER_UDMA_5:
case XFER_UDMA_4: TB = 0x20; TC = 0x01; break;
case XFER_UDMA_2: TB = 0x20; TC = 0x01; break;
case XFER_UDMA_3:
case XFER_UDMA_1: TB = 0x40; TC = 0x02; break;
case XFER_UDMA_0:
case XFER_MW_DMA_2: TB = 0x60; TC = 0x03; break;
case XFER_MW_DMA_1: TB = 0x60; TC = 0x04; break;
case XFER_MW_DMA_0:
case XFER_SW_DMA_2: TB = 0x60; TC = 0x05; break;
case XFER_SW_DMA_1: TB = 0x80; TC = 0x06; break;
case XFER_SW_DMA_0: TB = 0xC0; TC = 0x0B; break;
case XFER_PIO_4: TA = 0x01; TB = 0x04; break;
case XFER_PIO_3: TA = 0x02; TB = 0x06; break;
case XFER_PIO_2: TA = 0x03; TB = 0x08; break;
case XFER_PIO_1: TA = 0x05; TB = 0x0C; break;
case XFER_PIO_0:
default: TA = 0x09; TB = 0x13; break;
}
if (speed < XFER_SW_DMA_0) {
pci_write_config_byte(dev, (drive_pci), AP|TA);
pci_write_config_byte(dev, (drive_pci)|0x01, BP|TB);
} else {
pci_write_config_byte(dev, (drive_pci)|0x01, BP|TB);
pci_write_config_byte(dev, (drive_pci)|0x02, CP|TC);
}
#if PDC202XX_DECODE_REGISTER_INFO
pci_read_config_byte(dev, (drive_pci), &AP);
pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
pci_read_config_byte(dev, (drive_pci)|0x02, &CP);
pci_read_config_byte(dev, (drive_pci)|0x03, &DP);
decode_registers(REG_A, AP);
decode_registers(REG_B, BP);
decode_registers(REG_C, CP);
decode_registers(REG_D, DP);
#endif /* PDC202XX_DECODE_REGISTER_INFO */
#if PDC202XX_DEBUG_DRIVE_INFO
printk(KERN_DEBUG "%s: %s drive%d 0x%08x ",
drive->name, ide_xfer_verbose(speed),
drive->dn, drive_conf);
pci_read_config_dword(dev, drive_pci, &drive_conf);
printk("0x%08x\n", drive_conf);
#endif /* PDC202XX_DEBUG_DRIVE_INFO */
return (ide_config_drive_speed(drive, speed));
}
static int pdcnew_new_tune_chipset (ide_drive_t *drive, u8 xferspeed)
{
ide_hwif_t *hwif = HWIF(drive);
......@@ -288,19 +186,14 @@ static int pdcnew_new_tune_chipset (ide_drive_t *drive, u8 xferspeed)
* 180, 120, 90, 90, 90, 60, 30
* 11, 5, 4, 3, 2, 1, 0
*/
static int config_chipset_for_pio (ide_drive_t *drive, u8 pio)
static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio)
{
u8 speed = 0;
u8 speed;
if (pio == 5) pio = 4;
speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, pio, NULL);
return ((int) pdcnew_tune_chipset(drive, speed));
}
static void pdcnew_tune_drive (ide_drive_t *drive, u8 pio)
{
(void) config_chipset_for_pio(drive, pio);
(void)pdcnew_new_tune_chipset(drive, speed);
}
static u8 pdcnew_new_cable_detect (ide_hwif_t *hwif)
......@@ -312,56 +205,15 @@ static int config_chipset_for_dma (ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *dev = hwif->pci_dev;
u8 speed = -1;
u8 cable = 0;
u8 cable;
u8 ultra_66 = ((id->dma_ultra & 0x0010) ||
(id->dma_ultra & 0x0008)) ? 1 : 0;
switch(dev->device) {
case PCI_DEVICE_ID_PROMISE_20277:
case PCI_DEVICE_ID_PROMISE_20276:
case PCI_DEVICE_ID_PROMISE_20275:
case PCI_DEVICE_ID_PROMISE_20271:
case PCI_DEVICE_ID_PROMISE_20269:
case PCI_DEVICE_ID_PROMISE_20270:
case PCI_DEVICE_ID_PROMISE_20268:
cable = pdcnew_new_cable_detect(hwif);
#if PDC202_DEBUG_CABLE
printk(KERN_DEBUG "%s: %s-pin cable, %s-pin cable, %d\n",
hwif->name, hwif->udma_four ? "80" : "40",
cable ? "40" : "80", cable);
#endif /* PDC202_DEBUG_CABLE */
break;
default:
/* If it's not one we know we should never
arrive here.. */
BUG();
}
/*
* Set the control register to use the 66Mhz system
* clock for UDMA 3/4 mode operation. If one drive on
* a channel is U66 capable but the other isn't we
* fall back to U33 mode. The BIOS INT 13 hooks turn
* the clock on then off for each read/write issued. I don't
* do that here because it would require modifying the
* kernel, separating the fop routines from the kernel or
* somehow hooking the fops calls. It may also be possible to
* leave the 66Mhz clock on and readjust the timing
* parameters.
*/
if ((ultra_66) && (cable)) {
#ifdef DEBUG
printk(KERN_DEBUG "ULTRA 66/100/133: %s channel of Ultra 66/100/133 "
"requires an 80-pin cable for Ultra66 operation.\n",
hwif->channel ? "Secondary" : "Primary");
printk(KERN_DEBUG " Switching to Ultra33 mode.\n");
#endif /* DEBUG */
/* Primary : zero out second bit */
/* Secondary : zero out fourth bit */
if (ultra_66 && cable) {
printk(KERN_WARNING "Warning: %s channel requires an 80-pin cable for operation.\n", hwif->channel ? "Secondary":"Primary");
printk(KERN_WARNING "%s reduced to Ultra33 mode.\n", drive->name);
}
......@@ -590,10 +442,7 @@ static void __init init_hwif_pdc202new (ide_hwif_t *hwif)
hwif->speedproc = &pdcnew_new_tune_chipset;
hwif->resetproc = &pdcnew_new_reset;
if (!hwif->dma_base) {
hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
return;
}
hwif->ultra_mask = 0x7f;
hwif->mwdma_mask = 0x07;
......
......@@ -5,15 +5,6 @@
#include <linux/pci.h>
#include <linux/ide.h>
#define DISPLAY_PDC202XX_TIMINGS
#ifndef SPLIT_BYTE
#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
#endif
#define PDC202XX_DEBUG_DRIVE_INFO 0
#define PDC202XX_DECODE_REGISTER_INFO 0
const static char *pdc_quirk_drives[] = {
"QUANTUM FIREBALLlct08 08",
"QUANTUM FIREBALLP KA6.4",
......@@ -26,116 +17,6 @@ const static char *pdc_quirk_drives[] = {
NULL
};
/* A Register */
#define SYNC_ERRDY_EN 0xC0
#define SYNC_IN 0x80 /* control bit, different for master vs. slave drives */
#define ERRDY_EN 0x40 /* control bit, different for master vs. slave drives */
#define IORDY_EN 0x20 /* PIO: IOREADY */
#define PREFETCH_EN 0x10 /* PIO: PREFETCH */
#define PA3 0x08 /* PIO"A" timing */
#define PA2 0x04 /* PIO"A" timing */
#define PA1 0x02 /* PIO"A" timing */
#define PA0 0x01 /* PIO"A" timing */
/* B Register */
#define MB2 0x80 /* DMA"B" timing */
#define MB1 0x40 /* DMA"B" timing */
#define MB0 0x20 /* DMA"B" timing */
#define PB4 0x10 /* PIO_FORCE 1:0 */
#define PB3 0x08 /* PIO"B" timing */ /* PIO flow Control mode */
#define PB2 0x04 /* PIO"B" timing */ /* PIO 4 */
#define PB1 0x02 /* PIO"B" timing */ /* PIO 3 half */
#define PB0 0x01 /* PIO"B" timing */ /* PIO 3 other half */
/* C Register */
#define IORDYp_NO_SPEED 0x4F
#define SPEED_DIS 0x0F
#define DMARQp 0x80
#define IORDYp 0x40
#define DMAR_EN 0x20
#define DMAW_EN 0x10
#define MC3 0x08 /* DMA"C" timing */
#define MC2 0x04 /* DMA"C" timing */
#define MC1 0x02 /* DMA"C" timing */
#define MC0 0x01 /* DMA"C" timing */
#if PDC202XX_DECODE_REGISTER_INFO
#define REG_A 0x01
#define REG_B 0x02
#define REG_C 0x04
#define REG_D 0x08
static void decode_registers (u8 registers, u8 value)
{
u8 bit = 0, bit1 = 0, bit2 = 0;
switch(registers) {
case REG_A:
bit2 = 0;
printk("A Register ");
if (value & 0x80) printk("SYNC_IN ");
if (value & 0x40) printk("ERRDY_EN ");
if (value & 0x20) printk("IORDY_EN ");
if (value & 0x10) printk("PREFETCH_EN ");
if (value & 0x08) { printk("PA3 ");bit2 |= 0x08; }
if (value & 0x04) { printk("PA2 ");bit2 |= 0x04; }
if (value & 0x02) { printk("PA1 ");bit2 |= 0x02; }
if (value & 0x01) { printk("PA0 ");bit2 |= 0x01; }
printk("PIO(A) = %d ", bit2);
break;
case REG_B:
bit1 = 0;bit2 = 0;
printk("B Register ");
if (value & 0x80) { printk("MB2 ");bit1 |= 0x80; }
if (value & 0x40) { printk("MB1 ");bit1 |= 0x40; }
if (value & 0x20) { printk("MB0 ");bit1 |= 0x20; }
printk("DMA(B) = %d ", bit1 >> 5);
if (value & 0x10) printk("PIO_FORCED/PB4 ");
if (value & 0x08) { printk("PB3 ");bit2 |= 0x08; }
if (value & 0x04) { printk("PB2 ");bit2 |= 0x04; }
if (value & 0x02) { printk("PB1 ");bit2 |= 0x02; }
if (value & 0x01) { printk("PB0 ");bit2 |= 0x01; }
printk("PIO(B) = %d ", bit2);
break;
case REG_C:
bit2 = 0;
printk("C Register ");
if (value & 0x80) printk("DMARQp ");
if (value & 0x40) printk("IORDYp ");
if (value & 0x20) printk("DMAR_EN ");
if (value & 0x10) printk("DMAW_EN ");
if (value & 0x08) { printk("MC3 ");bit2 |= 0x08; }
if (value & 0x04) { printk("MC2 ");bit2 |= 0x04; }
if (value & 0x02) { printk("MC1 ");bit2 |= 0x02; }
if (value & 0x01) { printk("MC0 ");bit2 |= 0x01; }
printk("DMA(C) = %d ", bit2);
break;
case REG_D:
printk("D Register ");
break;
default:
return;
}
printk("\n %s ", (registers & REG_D) ? "DP" :
(registers & REG_C) ? "CP" :
(registers & REG_B) ? "BP" :
(registers & REG_A) ? "AP" : "ERROR");
for (bit=128;bit>0;bit/=2)
printk("%s", (value & bit) ? "1" : "0");
printk("\n");
}
#endif /* PDC202XX_DECODE_REGISTER_INFO */
#define set_2regs(a, b) \
do { \
hwif->OUTB((a + adj), indexreg); \
......
......@@ -814,7 +814,7 @@ static struct pci_driver driver = {
.probe = piix_init_one,
};
static int piix_ide_init(void)
static int __init piix_ide_init(void)
{
piix_check_450nx();
return ide_pci_register_driver(&driver);
......
......@@ -1791,13 +1791,7 @@ static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *
static int __init pdc_sata_init(void)
{
int rc;
rc = pci_module_init(&pdc_sata_pci_driver);
if (rc)
return rc;
return 0;
return pci_module_init(&pdc_sata_pci_driver);
}
......
......@@ -244,13 +244,9 @@ static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
static void sil_dev_config(struct ata_port *ap, struct ata_device *dev)
{
unsigned int n, quirks = 0;
u32 class_rev = 0;
const char *s = &dev->product[0];
unsigned int len = strnlen(s, sizeof(dev->product));
pci_read_config_dword(ap->host_set->pdev, PCI_CLASS_REVISION, &class_rev);
class_rev &= 0xff;
/* ATAPI specifies that empty space is blank-filled; remove blanks */
while ((len > 0) && (s[len - 1] == ' '))
len--;
......@@ -263,7 +259,7 @@ static void sil_dev_config(struct ata_port *ap, struct ata_device *dev)
}
/* limit requests to 15 sectors */
if ((class_rev <= 0x01) && (quirks & SIL_QUIRK_MOD15WRITE)) {
if (quirks & SIL_QUIRK_MOD15WRITE) {
printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n",
ap->id, dev->devno);
ap->host->max_sectors = 15;
......@@ -272,7 +268,6 @@ static void sil_dev_config(struct ata_port *ap, struct ata_device *dev)
}
/* limit to udma5 */
/* is this for (class_rev <= 0x01) only, too? */
if (quirks & SIL_QUIRK_UDMA5MAX) {
printk(KERN_INFO "ata%u(%u): applying Maxtor errata fix %s\n",
ap->id, dev->devno, s);
......@@ -405,13 +400,7 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
static int __init sil_init(void)
{
int rc;
rc = pci_module_init(&sil_pci_driver);
if (rc)
return rc;
return 0;
return pci_module_init(&sil_pci_driver);
}
static void __exit sil_exit(void)
......
......@@ -375,16 +375,9 @@ static struct pci_driver k2_sata_pci_driver = {
static int __init k2_sata_init(void)
{
int rc;
rc = pci_module_init(&k2_sata_pci_driver);
if (rc)
return rc;
return 0;
return pci_module_init(&k2_sata_pci_driver);
}
static void __exit k2_sata_exit(void)
{
pci_unregister_driver(&k2_sata_pci_driver);
......
......@@ -5,25 +5,11 @@
*
* Bits from Jeff Garzik, Copyright RedHat, Inc.
*
* The contents of this file are subject to the Open
* Software License version 1.1 that can be found at
* http://www.opensource.org/licenses/osl-1.1.txt and is included herein
* by reference.
*
* Alternatively, the contents of this file may be used under the terms
* of the GNU General Public License version 2 (the "GPL") as distributed
* in the kernel source COPYING file, in which case the provisions of
* the GPL are applicable instead of the above. If you wish to allow
* the use of your version of this file only under the terms of the
* GPL and not to allow others to use your version of this file under
* the OSL, indicate your decision by deleting the provisions above and
* replace them with the notice and other provisions required by the GPL.
* If you do not delete the provisions above, a recipient may use your
* version of this file under either the OSL or the GPL.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
......@@ -232,7 +218,7 @@ static struct ata_port_operations vsc_sata_ops = {
.port_stop = ata_port_stop,
};
static void vsc_sata_setup_port(struct ata_ioports *port, unsigned long base)
static void __devinit vsc_sata_setup_port(struct ata_ioports *port, unsigned long base)
{
port->cmd_addr = base + VSC_SATA_TF_CMD_OFFSET;
port->data_addr = base + VSC_SATA_TF_DATA_OFFSET;
......@@ -252,7 +238,7 @@ static void vsc_sata_setup_port(struct ata_ioports *port, unsigned long base)
}
static int vsc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
{
static int printed_version;
struct ata_probe_ent *probe_ent = NULL;
......@@ -350,6 +336,11 @@ static int vsc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *
}
/*
* 0x1725/0x7174 is the Vitesse VSC-7174
* 0x8086/0x3200 is the Intel 31244, which is supposed to be identical
* compatibility is untested as of yet
*/
static struct pci_device_id vsc_sata_pci_tbl[] = {
{ 0x1725, 0x7174, PCI_ANY_ID, PCI_ANY_ID, 0x10600, 0xFFFFFF, 0 },
{ 0x8086, 0x3200, PCI_ANY_ID, PCI_ANY_ID, 0x10600, 0xFFFFFF, 0 },
......@@ -367,13 +358,7 @@ static struct pci_driver vsc_sata_pci_driver = {
static int __init vsc_sata_init(void)
{
int rc;
rc = pci_module_init(&vsc_sata_pci_driver);
if (rc)
return rc;
return 0;
return pci_module_init(&vsc_sata_pci_driver);
}
......
......@@ -143,17 +143,8 @@ typedef unsigned char byte; /* used everywhere */
#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
#define IDE_DATA_OFFSET_HOB (0)
#define IDE_ERROR_OFFSET_HOB (1)
#define IDE_NSECTOR_OFFSET_HOB (2)
#define IDE_SECTOR_OFFSET_HOB (3)
#define IDE_LCYL_OFFSET_HOB (4)
#define IDE_HCYL_OFFSET_HOB (5)
#define IDE_SELECT_OFFSET_HOB (6)
#define IDE_CONTROL_OFFSET_HOB (7)
#define IDE_FEATURE_OFFSET_HOB IDE_ERROR_OFFSET_HOB
#define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
#define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
#define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
......@@ -165,16 +156,6 @@ typedef unsigned char byte; /* used everywhere */
#define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
#define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
#define IDE_DATA_REG_HOB (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
#define IDE_ERROR_REG_HOB (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
#define IDE_NSECTOR_REG_HOB (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
#define IDE_SECTOR_REG_HOB (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
#define IDE_LCYL_REG_HOB (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
#define IDE_HCYL_REG_HOB (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
#define IDE_SELECT_REG_HOB (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
#define IDE_STATUS_REG_HOB (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
#define IDE_CONTROL_REG_HOB (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
#define IDE_FEATURE_REG IDE_ERROR_REG
#define IDE_COMMAND_REG IDE_STATUS_REG
#define IDE_ALTSTATUS_REG IDE_CONTROL_REG
......@@ -998,7 +979,6 @@ typedef struct hwif_s {
*/
typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *);
typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
typedef ide_startstop_t (ide_post_handler_t)(ide_drive_t *);
typedef int (ide_expiry_t)(ide_drive_t *);
typedef struct hwgroup_s {
......@@ -1360,7 +1340,6 @@ typedef struct ide_task_s {
int command_type;
ide_pre_handler_t *prehandler;
ide_handler_t *handler;
ide_post_handler_t *posthandler;
struct request *rq; /* copy of request */
void *special; /* valid_t generally */
} ide_task_t;
......@@ -1455,19 +1434,9 @@ extern ide_startstop_t pre_task_out_intr(ide_drive_t *, struct request *);
extern ide_startstop_t task_out_intr(ide_drive_t *);
extern ide_startstop_t pre_task_mulout_intr(ide_drive_t *, struct request *);
extern ide_startstop_t task_mulout_intr(ide_drive_t *);
extern void ide_init_drive_taskfile(struct request *);
extern int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *);
extern ide_pre_handler_t * ide_pre_handler_parser(struct hd_drive_task_hdr *, struct hd_drive_hob_hdr *);
extern ide_handler_t * ide_handler_parser(struct hd_drive_task_hdr *, struct hd_drive_hob_hdr *);
extern ide_post_handler_t * ide_post_handler_parser(struct hd_drive_task_hdr *, struct hd_drive_hob_hdr *);
/* Expects args is a full set of TF registers and parses the command type */
extern int ide_cmd_type_parser(ide_task_t *);
int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
......
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