drm/nouveau/kms/nv50-: extend window image data for stereo/planar formats

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/dispnv50/atom.h

@@ -162,12 +162,12 @@ struct nv50_wndw_atom {
 		u8  kind:7;
 		u8  layout:1;
 		u8  block:4;
-		u32 pitch:20;
+		u32 pitch[3];
 		u16 w;
 		u16 h;
 
-		u32 handle;
-		u64 offset;
+		u32 handle[6];
+		u64 offset[6];
 	} image;
 
 	struct {

drivers/gpu/drm/nouveau/dispnv50/base507c.c

@@ -74,13 +74,13 @@ base507c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
 		evo_data(push, asyw->image.mode << 8 |
 			       asyw->image.interval << 4);
 		evo_mthd(push, 0x00c0, 1);
-		evo_data(push, asyw->image.handle);
+		evo_data(push, asyw->image.handle[0]);
 		evo_mthd(push, 0x0800, 5);
-		evo_data(push, asyw->image.offset >> 8);
+		evo_data(push, asyw->image.offset[0] >> 8);
 		evo_data(push, 0x00000000);
 		evo_data(push, asyw->image.h << 16 | asyw->image.w);
 		evo_data(push, asyw->image.layout << 20 |
-			       asyw->image.pitch |
+			       asyw->image.pitch[0] |
 			       asyw->image.block);
 		evo_data(push, asyw->image.kind << 16 |
 			       asyw->image.format << 8);

drivers/gpu/drm/nouveau/dispnv50/base827c.c

@@ -30,13 +30,13 @@ base827c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
 		evo_data(push, asyw->image.mode << 8 |
 			       asyw->image.interval << 4);
 		evo_mthd(push, 0x00c0, 1);
-		evo_data(push, asyw->image.handle);
+		evo_data(push, asyw->image.handle[0]);
 		evo_mthd(push, 0x0800, 5);
-		evo_data(push, asyw->image.offset >> 8);
+		evo_data(push, asyw->image.offset[0] >> 8);
 		evo_data(push, 0x00000000);
 		evo_data(push, asyw->image.h << 16 | asyw->image.w);
 		evo_data(push, asyw->image.layout << 20 |
-			       asyw->image.pitch |
+			       asyw->image.pitch[0] |
 			       asyw->image.block);
 		evo_data(push, asyw->image.format << 8);
 		evo_kick(push, &wndw->wndw);

drivers/gpu/drm/nouveau/dispnv50/base907c.c

@@ -43,13 +43,13 @@ base907c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
 		evo_data(push, asyw->image.mode << 8 |
 			       asyw->image.interval << 4);
 		evo_mthd(push, 0x00c0, 1);
-		evo_data(push, asyw->image.handle);
+		evo_data(push, asyw->image.handle[0]);
 		evo_mthd(push, 0x0400, 5);
-		evo_data(push, asyw->image.offset >> 8);
+		evo_data(push, asyw->image.offset[0] >> 8);
 		evo_data(push, 0x00000000);
 		evo_data(push, asyw->image.h << 16 | asyw->image.w);
 		evo_data(push, asyw->image.layout << 24 |
-			       asyw->image.pitch |
+			       asyw->image.pitch[0] |
 			       asyw->image.block);
 		evo_data(push, asyw->image.format << 8);
 		evo_kick(push, &wndw->wndw);

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

@@ -52,7 +52,7 @@ curs507a_prepare(struct nv50_wndw *wndw, struct nv50_head_atom *asyh,
 		 struct nv50_wndw_atom *asyw)
 {
 	u32 handle = nv50_disp(wndw->plane.dev)->core->chan.vram.handle;
-	u32 offset = asyw->image.offset;
+	u32 offset = asyw->image.offset[0];
 	if (asyh->curs.handle != handle || asyh->curs.offset != offset) {
 		asyh->curs.handle = handle;
 		asyh->curs.offset = offset;

drivers/gpu/drm/nouveau/dispnv50/wndw.c

@@ -219,11 +219,11 @@ nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw,
 			asyw->image.block = fb->nvbo->mode >> 4;
 		else
 			asyw->image.block = fb->nvbo->mode;
-		asyw->image.pitch = (fb->base.pitches[0] / 4) << 4;
+		asyw->image.pitch[0] = (fb->base.pitches[0] / 4) << 4;
 	} else {
 		asyw->image.layout = 1;
 		asyw->image.block  = 0;
-		asyw->image.pitch  = fb->base.pitches[0];
+		asyw->image.pitch[0] = fb->base.pitches[0];
 	}
 
 	ret = wndw->func->acquire(wndw, asyw, asyh);
@@ -287,7 +287,7 @@ nv50_wndw_atomic_check(struct drm_plane *plane, struct drm_plane_state *state)
 		asyw->clr.ntfy = armw->ntfy.handle != 0;
 		asyw->clr.sema = armw->sema.handle != 0;
 		if (wndw->func->image_clr)
-			asyw->clr.image = armw->image.handle != 0;
+			asyw->clr.image = armw->image.handle[0] != 0;
 		asyw->set.lut = wndw->func->lut && asyv;
 	}
 
@@ -333,8 +333,8 @@ nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state)
 	}
 
 	asyw->state.fence = reservation_object_get_excl_rcu(fb->nvbo->bo.resv);
-	asyw->image.handle = ctxdma->object.handle;
-	asyw->image.offset = fb->nvbo->bo.offset;
+	asyw->image.handle[0] = ctxdma->object.handle;
+	asyw->image.offset[0] = fb->nvbo->bo.offset;
 
 	if (wndw->func->prepare) {
 		asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);