Commit 276c6222 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown

ASoC: TWL4030: DAPM based capture implementation

This patch adds DAPM implementaion for the capture path
on twlx030.

TWL has two physical ADC and two digital microphone (stereo) connections.
The CPU interface has four microphone channels.
For simplicity the microphone channel paths are named as:
TX1 (Left/Right) - when using i2s mode, only the TX1 data is valid
TX2 (Left/Right)

Input routing (simplified version):
There is two levels of mux settings for TWL in input path:
Analog input mux:
 ADCL <- {Off, Main mic, Headset mic, AUXL, Carkit mic}
 ADCR <- {Off, Sub mic, AUXR}

Analog/Digital mux:
TX1 Analog mode:
 TX1L <- ADCL
 TX1R <- ADCR
TX1 Digital mode:
 TX1L <- Digimic0 (Left)
 TX1R <- Digimic0 (Right)

TX2 Analog mode:
 TX2L <- ADCL
 TX2R <- ADCR
TX2 Digital mode:
 TX2L <- Digimic1 (Left)
 TX2R <- Digimic1 (Right)

The patch provides the following user controls for the capture path:
Mux settings:
"TX1 Capture Route": {Analog, Digimic0}
"TX2 Capture Route": {Analog, Digimic1}
"Analog Left Capture Route":  {Off, Main Mic, Headset Mic, AUXL, Carkit Mic}
"Analog Right Capture Route": {Off, Sub Mic, AUXR}

Volume/Gain controls:
"TX1 Digital Capture Volume": Stereo gain control for TX1 path
"TX2 Digital Capture Volume": Stereo gain control for TX2 path
"Analog Capture Volume":      Stereo gain control for the analog path only

Important things for the board files:
Microphone bias:
"Mic Bias 1":       Bias for Main mic or for digimic0 (analog or digital path)
"Mic Bias 2":       Bias for Sub mic or for digimic1 (analog or digital path)
"Headset Mic Bias": Bias for Headset mic

When the routing configured correctly only the needed components will be
powered/enabled.
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent f9a3fba2
This diff is collapsed.
...@@ -147,6 +147,13 @@ ...@@ -147,6 +147,13 @@
#define TWL4030_AVADC_CLK_PRIORITY 0x04 #define TWL4030_AVADC_CLK_PRIORITY 0x04
#define TWL4030_ADCR_EN 0x02 #define TWL4030_ADCR_EN 0x02
/* TWL4030_REG_ADCMICSEL (0x08) Fields */
#define TWL4030_DIGMIC1_EN 0x08
#define TWL4030_TX2IN_SEL 0x04
#define TWL4030_DIGMIC0_EN 0x02
#define TWL4030_TX1IN_SEL 0x01
/* AUDIO_IF (0x0E) Fields */ /* AUDIO_IF (0x0E) Fields */
#define TWL4030_AIF_SLAVE_EN 0x80 #define TWL4030_AIF_SLAVE_EN 0x80
......
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