ide: checkpatch.pl fixes for ide-timing.h

Also fix placement of comments in ide_timing_compute() while at it.

There should be no functional changes caused by this patch
(md5sum was verified to be the same before/after the patch).
Acked-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
parent bd887f72
...@@ -3,9 +3,7 @@ ...@@ -3,9 +3,7 @@
/* /*
* Copyright (c) 1999-2001 Vojtech Pavlik * Copyright (c) 1999-2001 Vojtech Pavlik
*/ *
/*
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or * the Free Software Foundation; either version 2 of the License, or
...@@ -67,10 +65,11 @@ static struct ide_timing ide_timing[] = { ...@@ -67,10 +65,11 @@ static struct ide_timing ide_timing[] = {
{ 0xff } { 0xff }
}; };
#define ENOUGH(v,unit) (((v)-1)/(unit)+1) #define ENOUGH(v, unit) (((v) - 1) / (unit) + 1)
#define EZ(v,unit) ((v)?ENOUGH(v,unit):0) #define EZ(v, unit) ((v) ? ENOUGH(v, unit) : 0)
static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q, int T, int UT) static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q,
int T, int UT)
{ {
q->setup = EZ(t->setup * 1000, T); q->setup = EZ(t->setup * 1000, T);
q->act8b = EZ(t->act8b * 1000, T); q->act8b = EZ(t->act8b * 1000, T);
...@@ -82,16 +81,25 @@ static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q, int ...@@ -82,16 +81,25 @@ static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q, int
q->udma = EZ(t->udma * 1000, UT); q->udma = EZ(t->udma * 1000, UT);
} }
static void ide_timing_merge(struct ide_timing *a, struct ide_timing *b, struct ide_timing *m, unsigned int what) static void ide_timing_merge(struct ide_timing *a, struct ide_timing *b,
struct ide_timing *m, unsigned int what)
{ {
if (what & IDE_TIMING_SETUP ) m->setup = max(a->setup, b->setup); if (what & IDE_TIMING_SETUP)
if (what & IDE_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); m->setup = max(a->setup, b->setup);
if (what & IDE_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); if (what & IDE_TIMING_ACT8B)
if (what & IDE_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); m->act8b = max(a->act8b, b->act8b);
if (what & IDE_TIMING_ACTIVE ) m->active = max(a->active, b->active); if (what & IDE_TIMING_REC8B)
if (what & IDE_TIMING_RECOVER) m->recover = max(a->recover, b->recover); m->rec8b = max(a->rec8b, b->rec8b);
if (what & IDE_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); if (what & IDE_TIMING_CYC8B)
if (what & IDE_TIMING_UDMA ) m->udma = max(a->udma, b->udma); m->cyc8b = max(a->cyc8b, b->cyc8b);
if (what & IDE_TIMING_ACTIVE)
m->active = max(a->active, b->active);
if (what & IDE_TIMING_RECOVER)
m->recover = max(a->recover, b->recover);
if (what & IDE_TIMING_CYCLE)
m->cycle = max(a->cycle, b->cycle);
if (what & IDE_TIMING_UDMA)
m->udma = max(a->udma, b->udma);
} }
static struct ide_timing *ide_timing_find_mode(u8 speed) static struct ide_timing *ide_timing_find_mode(u8 speed)
...@@ -110,24 +118,22 @@ static int ide_timing_compute(ide_drive_t *drive, u8 speed, ...@@ -110,24 +118,22 @@ static int ide_timing_compute(ide_drive_t *drive, u8 speed,
struct hd_driveid *id = drive->id; struct hd_driveid *id = drive->id;
struct ide_timing *s, p; struct ide_timing *s, p;
/* /*
* Find the mode. * Find the mode.
*/ */
s = ide_timing_find_mode(speed);
if (!(s = ide_timing_find_mode(speed))) if (s == NULL)
return -EINVAL; return -EINVAL;
/* /*
* Copy the timing from the table. * Copy the timing from the table.
*/ */
*t = *s; *t = *s;
/* /*
* If the drive is an EIDE drive, it can tell us it needs extended * If the drive is an EIDE drive, it can tell us it needs extended
* PIO/MWDMA cycle timing. * PIO/MWDMA cycle timing.
*/ */
if (id && id->field_valid & 2) { /* EIDE drive */ if (id && id->field_valid & 2) { /* EIDE drive */
memset(&p, 0, sizeof(p)); memset(&p, 0, sizeof(p));
...@@ -142,28 +148,25 @@ static int ide_timing_compute(ide_drive_t *drive, u8 speed, ...@@ -142,28 +148,25 @@ static int ide_timing_compute(ide_drive_t *drive, u8 speed,
ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B); ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B);
} }
/* /*
* Convert the timing to bus clock counts. * Convert the timing to bus clock counts.
*/ */
ide_timing_quantize(t, t, T, UT); ide_timing_quantize(t, t, T, UT);
/* /*
* Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
* and some other commands. We have to ensure that the DMA cycle timing is * S.M.A.R.T and some other commands. We have to ensure that the
* slower/equal than the fastest PIO timing. * DMA cycle timing is slower/equal than the fastest PIO timing.
*/ */
if (speed >= XFER_SW_DMA_0) { if (speed >= XFER_SW_DMA_0) {
u8 pio = ide_get_best_pio_mode(drive, 255, 5); u8 pio = ide_get_best_pio_mode(drive, 255, 5);
ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT); ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT);
ide_timing_merge(&p, t, t, IDE_TIMING_ALL); ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
} }
/* /*
* Lengthen active & recovery time so that cycle time is correct. * Lengthen active & recovery time so that cycle time is correct.
*/ */
if (t->act8b + t->rec8b < t->cyc8b) { if (t->act8b + t->rec8b < t->cyc8b) {
t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
t->rec8b = t->cyc8b - t->act8b; t->rec8b = t->cyc8b - t->act8b;
......
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