Commit 2d4a22e7 authored by Johan Jonker's avatar Johan Jonker Committed by Rob Herring

dt-bindings: sram: convert rockchip-pmu-sram bindings to yaml

Current dts files with 'rockchip-pmu-sram' compatible nodes
are now verified with sram.yaml, although the original
text document still exists. Merge rockchip-pmu-sram.txt
with sram.yaml by adding it as description with an example.
Make #address-cells, #size-cells and ranges optional
if there are no child nodes to prevent yaml warnings.
Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 8d3cdfec
Rockchip SRAM for pmu:
------------------------------
The sram of pmu is used to store the function of resume from maskrom(the 1st
level loader). This is a common use of the "pmu-sram" because it keeps power
even in low power states in the system.
Required node properties:
- compatible : should be "rockchip,rk3288-pmu-sram"
- reg : physical base address and the size of the registers window
Example:
sram@ff720000 {
compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
reg = <0xff720000 0x1000>;
};
...@@ -29,6 +29,7 @@ properties: ...@@ -29,6 +29,7 @@ properties:
enum: enum:
- mmio-sram - mmio-sram
- atmel,sama5d2-securam - atmel,sama5d2-securam
- rockchip,rk3288-pmu-sram
reg: reg:
maxItems: 1 maxItems: 1
...@@ -120,6 +121,15 @@ patternProperties: ...@@ -120,6 +121,15 @@ patternProperties:
required: required:
- compatible - compatible
- reg - reg
if:
properties:
compatible:
contains:
const: rockchip,rk3288-pmu-sram
else:
required:
- "#address-cells" - "#address-cells"
- "#size-cells" - "#size-cells"
- ranges - ranges
...@@ -225,6 +235,16 @@ examples: ...@@ -225,6 +235,16 @@ examples:
}; };
}; };
- |
// Rockchip's rk3288 SoC uses the sram of pmu to store the function of
// resume from maskrom(the 1st level loader). This is a common use of
// the "pmu-sram" because it keeps power even in low power states
// in the system.
sram@ff720000 {
compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
reg = <0xff720000 0x1000>;
};
- | - |
// Allwinner's A80 SoC uses part of the secure sram for hotplugging of the // Allwinner's A80 SoC uses part of the secure sram for hotplugging of the
// primary core (cpu0). Once the core gets powered up it checks if a magic // primary core (cpu0). Once the core gets powered up it checks if a magic
......
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