Commit 2d9b0391 authored by Keith Owens's avatar Keith Owens Committed by David Mosberger

[PATCH] ia64: sync pal/sal/salinfo/mca with 2.4 code

Forward port the recent changes to pal.h, sal.h, mca.h, salinfo.c and
mca.c from 2.4.23-rc2 to 2.6.0-test9.

This converts 2.6 to use salinfo instead of printing CMC/CPE/MCA/INIT
records in the kernel.  It makes the two kernel versions as close
together as possible.
parent 79bff944
......@@ -399,16 +399,6 @@ config IA64_PALINFO
To use this option, you have to ensure that the "/proc file system
support" (CONFIG_PROC_FS) is enabled, too.
config IA64_SALINFO
tristate "/proc/sal support"
help
The /proc/sal directory exports the SAL (system abstraction layer)
feature bits, like whether the platform is subject to ITC drift. It
is intended to be used by user programs that care about such things.
To use this option, you have to ensure that the "/proc file system
support" (CONFIG_PROC_FS) is enabled, too.
config EFI_VARS
tristate "/proc/efi/vars support"
help
......
......@@ -6,7 +6,7 @@ extra-y := head.o init_task.o vmlinux.lds.s
obj-y := acpi.o entry.o efi.o efi_stub.o gate-data.o fsys.o ia64_ksyms.o irq.o irq_ia64.o \
irq_lsapic.o ivt.o machvec.o pal.o patch.o process.o perfmon.o ptrace.o sal.o \
semaphore.o setup.o signal.o sys_ia64.o time.o traps.o unaligned.o unwind.o
salinfo.o semaphore.o setup.o signal.o sys_ia64.o time.o traps.o unaligned.o unwind.o
obj-$(CONFIG_EFI_VARS) += efivars.o
obj-$(CONFIG_IA64_BRL_EMU) += brl_emu.o
......@@ -14,7 +14,6 @@ obj-$(CONFIG_IA64_GENERIC) += acpi-ext.o
obj-$(CONFIG_IA64_HP_ZX1) += acpi-ext.o
obj-$(CONFIG_IA64_MCA) += mca.o mca_asm.o
obj-$(CONFIG_IA64_PALINFO) += palinfo.o
obj-$(CONFIG_IA64_SALINFO) += salinfo.o
obj-$(CONFIG_IOSAPIC) += iosapic.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_SMP) += smp.o smpboot.o
......
......@@ -87,6 +87,7 @@ static void ia64_mca_wakeup_all(void);
static void ia64_log_init(int);
extern void ia64_monarch_init_handler (void);
extern void ia64_slave_init_handler (void);
static u64 ia64_log_get(int sal_info_type, u8 **buffer);
extern struct hw_interrupt_type irq_type_iosapic_level;
static struct irqaction cmci_irqaction = {
......@@ -149,12 +150,14 @@ static int cmc_polling_enabled = 1;
*/
static int cpe_poll_enabled = 1;
extern void salinfo_log_wakeup(int type, u8 *buffer, u64 size);
/*
* ia64_mca_log_sal_error_record
*
* This function retrieves a specified error record type from SAL, sends it to
* the system log, and notifies SALs to clear the record from its non-volatile
* memory.
* This function retrieves a specified error record type from SAL,
* wakes up any processes waiting for error records, and sends it to
* the system log.
*
* Inputs : sal_info_type (Type of error record MCA/CMC/CPE/INIT)
* Outputs : platform error status
......@@ -162,11 +165,13 @@ static int cpe_poll_enabled = 1;
int
ia64_mca_log_sal_error_record(int sal_info_type, int called_from_init)
{
int platform_err = 0;
u8 *buffer;
u64 size;
int platform_err;
/* Get the MCA error record */
if (!ia64_log_get(sal_info_type, (prfunc_t)printk))
return platform_err; /* no record retrieved */
size = ia64_log_get(sal_info_type, &buffer);
if (!size)
return 0;
/* TODO:
* 1. analyze error logs to determine recoverability
......@@ -174,10 +179,10 @@ ia64_mca_log_sal_error_record(int sal_info_type, int called_from_init)
* 3. set ia64_os_mca_recovery_successful flag, if applicable
*/
salinfo_log_wakeup(sal_info_type, buffer, size);
platform_err = ia64_log_print(sal_info_type, (prfunc_t)printk);
/* temporary: only clear SAL logs on hardware-corrected errors
or if we're logging an error after an MCA-initiated reboot */
if ((sal_info_type > 1) || (called_from_init))
/* Clear logs from corrected errors in case there's no user-level logger */
if (sal_info_type == SAL_INFO_TYPE_CPE || sal_info_type == SAL_INFO_TYPE_CMC)
ia64_sal_clear_state_info(sal_info_type);
return platform_err;
......@@ -450,7 +455,10 @@ static void
ia64_mca_register_cpev (int cpev)
{
/* Register the CPE interrupt vector with SAL */
if (ia64_sal_mc_set_params(SAL_MC_PARAM_CPE_INT, SAL_MC_PARAM_MECHANISM_INT, cpev, 0, 0)) {
struct ia64_sal_retval isrv;
isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_CPE_INT, SAL_MC_PARAM_MECHANISM_INT, cpev, 0, 0);
if (isrv.status) {
printk(KERN_ERR "ia64_mca_platform_init: failed to register Corrected "
"Platform Error interrupt vector with SAL.\n");
return;
......@@ -629,6 +637,8 @@ ia64_mca_init(void)
ia64_fptr_t *mca_hldlr_ptr = (ia64_fptr_t *)ia64_os_mca_dispatch;
int i;
s64 rc;
struct ia64_sal_retval isrv;
u64 timeout = IA64_MCA_RENDEZ_TIMEOUT; /* platform specific */
IA64_MCA_DEBUG("ia64_mca_init: begin\n");
......@@ -644,23 +654,33 @@ ia64_mca_init(void)
*/
/* Register the rendezvous interrupt vector with SAL */
if ((rc = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_INT,
while (1) {
isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_INT,
SAL_MC_PARAM_MECHANISM_INT,
IA64_MCA_RENDEZ_VECTOR,
IA64_MCA_RENDEZ_TIMEOUT,
SAL_MC_PARAM_RZ_ALWAYS)))
{
timeout,
SAL_MC_PARAM_RZ_ALWAYS);
rc = isrv.status;
if (rc == 0)
break;
if (rc == -2) {
printk(KERN_INFO "ia64_mca_init: increasing MCA rendezvous timeout from "
"%ld to %ld\n", timeout, isrv.v0);
timeout = isrv.v0;
continue;
}
printk(KERN_ERR "ia64_mca_init: Failed to register rendezvous interrupt "
"with SAL. rc = %ld\n", rc);
return;
}
/* Register the wakeup interrupt vector with SAL */
if ((rc = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_WAKEUP,
isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_WAKEUP,
SAL_MC_PARAM_MECHANISM_INT,
IA64_MCA_WAKEUP_VECTOR,
0, 0)))
{
0, 0);
rc = isrv.status;
if (rc) {
printk(KERN_ERR "ia64_mca_init: Failed to register wakeup interrupt with SAL. "
"rc = %ld\n", rc);
return;
......@@ -1399,12 +1419,12 @@ ia64_log_init(int sal_info_type)
* Get the current MCA log from SAL and copy it into the OS log buffer.
*
* Inputs : info_type (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
* prfunc (fn ptr of log output function)
* Outputs : size (total record length)
* *buffer (ptr to error record)
*
*/
u64
ia64_log_get(int sal_info_type, prfunc_t prfunc)
static u64
ia64_log_get(int sal_info_type, u8 **buffer)
{
sal_log_record_header_t *log_buffer;
u64 total_len = 0;
......@@ -1422,6 +1442,7 @@ ia64_log_get(int sal_info_type, prfunc_t prfunc)
IA64_LOG_UNLOCK(sal_info_type);
IA64_MCA_DEBUG("ia64_log_get: SAL error record type %d retrieved. "
"Record length = %ld\n", sal_info_type, total_len);
*buffer = (u8 *) log_buffer;
return total_len;
} else {
IA64_LOG_UNLOCK(sal_info_type);
......@@ -1466,7 +1487,7 @@ ia64_log_prt_oem_data (int header_len, int sect_len, u8 *p_data, prfunc_t prfunc
void
ia64_log_rec_header_print (sal_log_record_header_t *lh, prfunc_t prfunc)
{
prfunc("+Err Record ID: %d SAL Rev: %2x.%02x\n", lh->id,
prfunc("+Err Record ID: %ld SAL Rev: %2x.%02x\n", lh->id,
lh->revision.major, lh->revision.minor);
prfunc("+Time: %02x/%02x/%02x%02x %02x:%02x:%02x Severity %d\n",
lh->timestamp.slh_month, lh->timestamp.slh_day,
......@@ -1589,13 +1610,13 @@ ia64_log_cache_check_info_print (int i,
if (info->dl)
prfunc(" Line: Data,");
prfunc(" Operation: %s,", pal_cache_op[info->op]);
if (info->wv)
if (info->wiv)
prfunc(" Way: %d,", info->way);
if (cache_check_info->valid.target_identifier)
/* Hope target address is saved in target_identifier */
if (info->tv)
prfunc(" Target Addr: 0x%lx,", target_addr);
if (info->mc)
if (info->mcc)
prfunc(" MC: Corrected");
prfunc("\n");
}
......@@ -1631,13 +1652,13 @@ ia64_log_tlb_check_info_print (int i,
prfunc(" Failure: Data Translation Cache");
if (info->itr) {
prfunc(" Failure: Instruction Translation Register");
prfunc(" ,Slot: %d", info->tr_slot);
prfunc(" ,Slot: %ld", info->tr_slot);
}
if (info->dtr) {
prfunc(" Failure: Data Translation Register");
prfunc(" ,Slot: %d", info->tr_slot);
prfunc(" ,Slot: %ld", info->tr_slot);
}
if (info->mc)
if (info->mcc)
prfunc(" ,MC: Corrected");
prfunc("\n");
}
......@@ -1683,7 +1704,7 @@ ia64_log_bus_check_info_print (int i,
prfunc(" ,Error: Internal");
if (info->eb)
prfunc(" ,Error: External");
if (info->mc)
if (info->mcc)
prfunc(" ,MC: Corrected");
if (info->tv)
prfunc(" ,Target Address: 0x%lx", targ_addr);
......@@ -1970,9 +1991,9 @@ ia64_log_plat_specific_err_info_print (sal_log_plat_specific_err_info_t *psei,
ia64_log_prt_guid(&psei->guid, prfunc);
}
if (psei->valid.oem_data) {
platform_plat_specific_err_print((int)psei->header.len,
(int)sizeof(sal_log_plat_specific_err_info_t) - 1,
&(psei->oem_data[0]), prfunc);
platform_plat_specific_err_print((int) psei->header.len,
(char *) psei->oem_data - (char *) psei,
&psei->oem_data[0], prfunc);
}
prfunc("\n");
}
......@@ -2352,13 +2373,12 @@ ia64_log_print(int sal_info_type, prfunc_t prfunc)
switch(sal_info_type) {
case SAL_INFO_TYPE_MCA:
prfunc("+BEGIN HARDWARE ERROR STATE AT MCA\n");
platform_err = ia64_log_platform_info_print(IA64_LOG_CURR_BUFFER(sal_info_type),
prfunc);
prfunc("+END HARDWARE ERROR STATE AT MCA\n");
prfunc("+CPU %d: SAL log contains MCA error record\n", smp_processor_id());
ia64_log_rec_header_print(IA64_LOG_CURR_BUFFER(sal_info_type), prfunc);
break;
case SAL_INFO_TYPE_INIT:
prfunc("+MCA INIT ERROR LOG (UNIMPLEMENTED)\n");
prfunc("+CPU %d: SAL log contains INIT error record\n", smp_processor_id());
ia64_log_rec_header_print(IA64_LOG_CURR_BUFFER(sal_info_type), prfunc);
break;
case SAL_INFO_TYPE_CMC:
prfunc("+BEGIN HARDWARE ERROR STATE AT CMC\n");
......
This diff is collapsed.
......@@ -141,7 +141,6 @@ extern irqreturn_t ia64_mca_cpe_int_caller(int,void *,struct pt_regs *);
extern int ia64_log_print(int,prfunc_t);
extern void ia64_mca_cmc_vector_setup(void);
extern int ia64_mca_check_errors(void);
extern u64 ia64_log_get(int, prfunc_t);
#define PLATFORM_CALL(fn, args) printk("Platform call TBD\n")
......
......@@ -461,23 +461,13 @@ typedef struct pal_process_state_info_s {
} pal_processor_state_info_t;
typedef struct pal_cache_check_info_s {
u64 reserved1 : 16,
way : 5, /* Way in which the
* error occurred
*/
reserved2 : 1,
mc : 1, /* Machine check corrected */
tv : 1, /* Target address
* structure is valid
*/
wv : 1, /* Way field valid */
op : 3, /* Type of cache
u64 op : 4, /* Type of cache
* operation that
* caused the machine
* check.
*/
level : 2, /* Cache level */
reserved1 : 2,
dl : 1, /* Failure in data part
* of cache line
*/
......@@ -486,11 +476,34 @@ typedef struct pal_cache_check_info_s {
*/
dc : 1, /* Failure in dcache */
ic : 1, /* Failure in icache */
index : 24, /* Cache line index */
mv : 1, /* mesi valid */
mesi : 3, /* Cache line state */
level : 4; /* Cache level */
mv : 1, /* mesi valid */
way : 5, /* Way in which the
* error occurred
*/
wiv : 1, /* Way field valid */
reserved2 : 10,
index : 20, /* Cache line index */
reserved3 : 2,
is : 1, /* instruction set (1 == ia32) */
iv : 1, /* instruction set field valid */
pl : 2, /* privilege level */
pv : 1, /* privilege level field valid */
mcc : 1, /* Machine check corrected */
tv : 1, /* Target address
* structure is valid
*/
rq : 1, /* Requester identifier
* structure is valid
*/
rp : 1, /* Responder identifier
* structure is valid
*/
pi : 1; /* Precise instruction pointer
* structure is valid
*/
} pal_cache_check_info_t;
typedef struct pal_tlb_check_info_s {
......@@ -498,18 +511,38 @@ typedef struct pal_tlb_check_info_s {
u64 tr_slot : 8, /* Slot# of TR where
* error occurred
*/
reserved2 : 8,
trv : 1, /* tr_slot field is valid */
reserved1 : 1,
level : 2, /* TLB level where failure occurred */
reserved2 : 4,
dtr : 1, /* Fail in data TR */
itr : 1, /* Fail in inst TR */
dtc : 1, /* Fail in data TC */
itc : 1, /* Fail in inst. TC */
mc : 1, /* Machine check corrected */
reserved1 : 43;
op : 4, /* Cache operation */
reserved3 : 30,
is : 1, /* instruction set (1 == ia32) */
iv : 1, /* instruction set field valid */
pl : 2, /* privilege level */
pv : 1, /* privilege level field valid */
mcc : 1, /* Machine check corrected */
tv : 1, /* Target address
* structure is valid
*/
rq : 1, /* Requester identifier
* structure is valid
*/
rp : 1, /* Responder identifier
* structure is valid
*/
pi : 1; /* Precise instruction pointer
* structure is valid
*/
} pal_tlb_check_info_t;
typedef struct pal_bus_check_info_s {
u64 size : 5, /* Xaction size*/
u64 size : 5, /* Xaction size */
ib : 1, /* Internal bus error */
eb : 1, /* External bus error */
cc : 1, /* Error occurred
......@@ -518,22 +551,99 @@ typedef struct pal_bus_check_info_s {
*/
type : 8, /* Bus xaction type*/
sev : 5, /* Bus error severity*/
tv : 1, /* Targ addr valid */
rp : 1, /* Resp addr valid */
rq : 1, /* Req addr valid */
hier : 2, /* Bus hierarchy level */
reserved1 : 1,
bsi : 8, /* Bus error status
* info
*/
mc : 1, /* Machine check corrected */
reserved1 : 31;
reserved2 : 22,
is : 1, /* instruction set (1 == ia32) */
iv : 1, /* instruction set field valid */
pl : 2, /* privilege level */
pv : 1, /* privilege level field valid */
mcc : 1, /* Machine check corrected */
tv : 1, /* Target address
* structure is valid
*/
rq : 1, /* Requester identifier
* structure is valid
*/
rp : 1, /* Responder identifier
* structure is valid
*/
pi : 1; /* Precise instruction pointer
* structure is valid
*/
} pal_bus_check_info_t;
typedef struct pal_reg_file_check_info_s {
u64 id : 4, /* Register file identifier */
op : 4, /* Type of register
* operation that
* caused the machine
* check.
*/
reg_num : 7, /* Register number */
rnv : 1, /* reg_num valid */
reserved2 : 38,
is : 1, /* instruction set (1 == ia32) */
iv : 1, /* instruction set field valid */
pl : 2, /* privilege level */
pv : 1, /* privilege level field valid */
mcc : 1, /* Machine check corrected */
reserved3 : 3,
pi : 1; /* Precise instruction pointer
* structure is valid
*/
} pal_reg_file_check_info_t;
typedef struct pal_uarch_check_info_s {
u64 sid : 5, /* Structure identification */
level : 3, /* Level of failure */
array_id : 4, /* Array identification */
op : 4, /* Type of
* operation that
* caused the machine
* check.
*/
way : 6, /* Way of structure */
wv : 1, /* way valid */
xv : 1, /* index valid */
reserved1 : 8,
index : 8, /* Index or set of the uarch
* structure that failed.
*/
reserved2 : 24,
is : 1, /* instruction set (1 == ia32) */
iv : 1, /* instruction set field valid */
pl : 2, /* privilege level */
pv : 1, /* privilege level field valid */
mcc : 1, /* Machine check corrected */
tv : 1, /* Target address
* structure is valid
*/
rq : 1, /* Requester identifier
* structure is valid
*/
rp : 1, /* Responder identifier
* structure is valid
*/
pi : 1; /* Precise instruction pointer
* structure is valid
*/
} pal_uarch_check_info_t;
typedef union pal_mc_error_info_u {
u64 pmei_data;
pal_processor_state_info_t pme_processor;
pal_cache_check_info_t pme_cache;
pal_tlb_check_info_t pme_tlb;
pal_bus_check_info_t pme_bus;
pal_reg_file_check_info_t pme_reg_file;
pal_uarch_check_info_t pme_uarch;
} pal_mc_error_info_t;
#define pmci_proc_unknown_check pme_processor.uc
......
......@@ -727,14 +727,16 @@ ia64_sal_mc_rendez (void)
* Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
* the machine check rendezvous sequence as well as the mechanism to wake up the
* non-monarch processor at the end of machine check processing.
* Returns the complete ia64_sal_retval because some calls return more than just a status
* value.
*/
static inline s64
static inline struct ia64_sal_retval
ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
{
struct ia64_sal_retval isrv;
SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
timeout, rz_always, 0, 0);
return isrv.status;
return isrv;
}
/* Read from PCI configuration space */
......@@ -806,10 +808,12 @@ ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
extern unsigned long sal_platform_features;
extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
struct sal_ret_values {
long r8; long r9; long r10; long r11;
};
#endif /* __ASSEMBLY__ */
#endif /* _ASM_IA64_PAL_H */
#endif /* _ASM_IA64_SAL_H */
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