Commit 31bded67 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman

arm64: dts: renesas: eagle: add SCIF0 pins

Add the (previously omitted) SCIF0 pin data to the Eagle board's
device tree.
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 15981bab
...@@ -52,11 +52,21 @@ &extalr_clk { ...@@ -52,11 +52,21 @@ &extalr_clk {
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
&pfc {
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
};
};
&rwdt { &rwdt {
timeout-sec = <60>; timeout-sec = <60>;
status = "okay"; status = "okay";
}; };
&scif0 { &scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay"; status = "okay";
}; };
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